mirror of
https://git.eden-emu.dev/eden-emu/eden.git
synced 2026-08-15 13:16:43 +00:00
[TEST] Adjustments on descriptors payloads
This commit is contained in:
@@ -78,6 +78,11 @@ public:
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[[nodiscard]] virtual TextureType ReadTextureType(u32 raw_handle) = 0;
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[[nodiscard]] virtual u32 ResolveBindlessHandle(u32 cbuf_index, u32 cbuf_offset,
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u32 raw_handle) {
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return raw_handle;
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}
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[[nodiscard]] virtual TexturePixelFormat ReadTexturePixelFormat(u32 raw_handle) = 0;
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[[nodiscard]] virtual bool IsTexturePixelFormatInteger(u32 raw_handle) = 0;
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@@ -502,7 +502,7 @@ u32 GetTextureHandle(Environment& env, const ConstBufferAddr& cbuf) {
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const u32 lhs_raw{env.ReadCbufValue(cbuf.index, cbuf.offset) << cbuf.shift_left};
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const u32 rhs_raw{env.ReadCbufValue(secondary_index, secondary_offset)
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<< cbuf.secondary_shift_left};
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return lhs_raw | rhs_raw;
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return env.ResolveBindlessHandle(cbuf.index, cbuf.offset, lhs_raw | rhs_raw);
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}
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[[maybe_unused]] TextureType ReadTextureType(Environment& env, const ConstBufferAddr& cbuf) {
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@@ -18,6 +18,7 @@
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#include "video_core/renderer_vulkan/vk_pipeline_cache.h"
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#include "video_core/renderer_vulkan/vk_scheduler.h"
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#include "video_core/renderer_vulkan/vk_update_descriptor.h"
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#include "video_core/shader_environment.h"
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#include "video_core/shader_notify.h"
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#include "video_core/vulkan_common/vulkan_device.h"
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#include "video_core/vulkan_common/vulkan_wrapper.h"
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@@ -148,6 +149,7 @@ void ComputePipeline::Configure(Tegra::Engines::KeplerCompute& kepler_compute,
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const auto& qmd{kepler_compute.launch_description};
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const auto& cbufs{qmd.const_buffer_config};
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const bool via_header_index{qmd.linked_tsc != 0};
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const u32 tic_limit{kepler_compute.regs.tic.limit};
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const auto read_handle{[&](const auto& desc, u32 index) {
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ASSERT(((qmd.const_buffer_enable_mask >> desc.cbuf_index) & 1) != 0);
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const u32 index_offset{index << desc.size_shift};
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@@ -162,10 +164,17 @@ void ComputePipeline::Configure(Tegra::Engines::KeplerCompute& kepler_compute,
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secondary_offset};
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const u32 lhs_raw{gpu_memory.Read<u32>(addr) << desc.shift_left};
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const u32 rhs_raw{gpu_memory.Read<u32>(separate_addr) << desc.secondary_shift_left};
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return TexturePair(lhs_raw | rhs_raw, via_header_index);
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const u32 combined{VideoCommon::ResolveBindlessHandleTable(
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gpu_memory, addr, lhs_raw | rhs_raw,
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TexturePair(lhs_raw | rhs_raw, via_header_index).first, tic_limit)};
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return TexturePair(combined, via_header_index);
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}
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}
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return TexturePair(gpu_memory.Read<u32>(addr), via_header_index);
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const u32 single_raw{gpu_memory.Read<u32>(addr)};
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return TexturePair(VideoCommon::ResolveBindlessHandleTable(
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gpu_memory, addr, single_raw,
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TexturePair(single_raw, via_header_index).first, tic_limit),
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via_header_index);
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}};
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const auto add_image{[&](const auto& desc, bool blacklist) {
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for (u32 index = 0; index < desc.count; ++index) {
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@@ -203,7 +203,8 @@ RasterizerVulkan::RasterizerVulkan(Core::Frontend::EmuWindow& emu_window_, Tegra
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: gpu{gpu_}, device_memory{device_memory_}, device{device_},
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memory_allocator{memory_allocator_}, state_tracker{state_tracker_}, scheduler{scheduler_},
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staging_pool(device, memory_allocator, scheduler), descriptor_pool(device, scheduler),
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guest_descriptor_queue(device), compute_pass_descriptor_queue(device),
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guest_descriptor_queue(device, UpdateDescriptorQueue::GUEST_FRAME_PAYLOAD_SIZE),
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compute_pass_descriptor_queue(device, UpdateDescriptorQueue::COMPUTE_FRAME_PAYLOAD_SIZE),
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blit_image(device, scheduler, state_tracker, descriptor_pool), render_pass_cache(device),
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texture_cache_runtime{
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device, scheduler, memory_allocator, staging_pool,
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@@ -16,11 +16,12 @@
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namespace Vulkan {
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UpdateDescriptorQueue::UpdateDescriptorQueue(const Device& device_)
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: device{device_}
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UpdateDescriptorQueue::UpdateDescriptorQueue(const Device& device_, size_t frame_payload_size_)
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: device{device_}, frame_payload_size{frame_payload_size_},
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payload{std::make_unique<DescriptorUpdateEntry[]>(frame_payload_size_ * FRAMES_IN_FLIGHT)}
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{
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payload_start = payload.data();
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payload_cursor = payload.data();
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payload_start = payload.get();
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payload_cursor = payload.get();
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}
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UpdateDescriptorQueue::~UpdateDescriptorQueue() = default;
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@@ -29,19 +30,19 @@ void UpdateDescriptorQueue::TickFrame() {
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if (++frame_index >= FRAMES_IN_FLIGHT) {
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frame_index = 0;
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}
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payload_start = payload.data() + frame_index * FRAME_PAYLOAD_SIZE;
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payload_start = payload.get() + frame_index * frame_payload_size;
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payload_cursor = payload_start;
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}
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void UpdateDescriptorQueue::Acquire(Scheduler& scheduler, size_t required_entries) {
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static constexpr size_t DEFAULT_REQUIRED_ENTRIES = 0x400;
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const size_t reserve = required_entries > 0 ? required_entries : DEFAULT_REQUIRED_ENTRIES;
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ASSERT_MSG(reserve < FRAME_PAYLOAD_SIZE, "Descriptor reservation {} >= frame capacity {}",
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reserve, FRAME_PAYLOAD_SIZE);
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ASSERT_MSG(reserve < frame_payload_size, "Descriptor reservation {} >= frame capacity {}",
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reserve, frame_payload_size);
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const size_t used = static_cast<size_t>(std::distance(payload_start, payload_cursor));
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if (used + reserve >= FRAME_PAYLOAD_SIZE) {
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if (used + reserve >= frame_payload_size) {
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LOG_WARNING(Render_Vulkan, "Payload overflow (used={}, reserve={}, capacity={})",
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used, reserve, FRAME_PAYLOAD_SIZE);
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used, reserve, frame_payload_size);
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scheduler.WaitWorker();
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payload_cursor = payload_start;
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}
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@@ -6,7 +6,7 @@
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#pragma once
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#include <array>
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#include <memory>
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#include <variant>
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#include "video_core/vulkan_common/vulkan_wrapper.h"
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@@ -30,11 +30,12 @@ class UpdateDescriptorQueue final {
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// This should be plenty for the vast majority of cases. Most desktop platforms only
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// provide up to 3 swapchain images.
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static constexpr size_t FRAMES_IN_FLIGHT = 8;
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static constexpr size_t FRAME_PAYLOAD_SIZE = 0x40000;
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static constexpr size_t PAYLOAD_SIZE = FRAME_PAYLOAD_SIZE * FRAMES_IN_FLIGHT;
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public:
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explicit UpdateDescriptorQueue(const Device& device_);
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static constexpr size_t GUEST_FRAME_PAYLOAD_SIZE = 0x80000;
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static constexpr size_t COMPUTE_FRAME_PAYLOAD_SIZE = 0x20000;
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explicit UpdateDescriptorQueue(const Device& device_, size_t frame_payload_size_);
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~UpdateDescriptorQueue();
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void TickFrame();
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@@ -74,11 +75,12 @@ public:
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private:
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const Device& device;
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const size_t frame_payload_size;
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size_t frame_index{0};
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DescriptorUpdateEntry* payload_cursor = nullptr;
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DescriptorUpdateEntry* payload_start = nullptr;
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const DescriptorUpdateEntry* upload_start = nullptr;
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std::array<DescriptorUpdateEntry, PAYLOAD_SIZE> payload;
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std::unique_ptr<DescriptorUpdateEntry[]> payload;
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};
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// TODO: should these be separate classes instead?
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@@ -281,6 +281,34 @@ std::optional<u64> GenericEnvironment::TryFindSize() {
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return std::nullopt;
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}
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u32 ResolveBindlessHandleTable(Tegra::MemoryManager& gpu_memory, GPUVAddr record_addr,
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u32 raw_handle, u32 tic_index, u32 tic_limit) {
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static constexpr u32 HandleRecordSize = 16;
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static constexpr u32 MaxHandleTableBytes = 64 * 1024;
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if (tic_index <= tic_limit) {
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return raw_handle;
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}
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const u32 addr_low{gpu_memory.Read<u32>(record_addr)};
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const u32 addr_high{gpu_memory.Read<u32>(record_addr + 4)};
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const u32 table_size{gpu_memory.Read<u32>(record_addr + 8)};
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const GPUVAddr table_addr{(static_cast<GPUVAddr>(addr_high) << 32) |
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static_cast<GPUVAddr>(addr_low)};
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if (table_addr == 0 || table_size < HandleRecordSize || table_size > MaxHandleTableBytes) {
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return raw_handle;
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}
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const u32 count{table_size / HandleRecordSize};
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for (u32 i = 0; i < count; ++i) {
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const GPUVAddr entry_addr{table_addr + static_cast<GPUVAddr>(i) * HandleRecordSize};
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const u32 handle{gpu_memory.Read<u32>(entry_addr)};
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const u32 live{gpu_memory.Read<u32>(entry_addr + 4)};
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if (live != 0 && handle != 0 && handle <= tic_limit) {
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return handle;
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}
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}
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return raw_handle;
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}
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Tegra::Texture::TICEntry GenericEnvironment::ReadTextureInfo(GPUVAddr tic_addr, u32 tic_limit,
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bool via_header_index, u32 raw) {
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const auto handle{Tegra::Texture::TexturePair(raw, via_header_index)};
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@@ -431,6 +459,24 @@ u32 ComputeEnvironment::ReadCbufValue(u32 cbuf_index, u32 cbuf_offset) {
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return value;
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}
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u32 ComputeEnvironment::ResolveBindlessHandle(u32 cbuf_index, u32 cbuf_offset, u32 raw_handle) {
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const auto& regs{kepler_compute->regs};
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const auto& qmd{kepler_compute->launch_description};
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const auto pair{Tegra::Texture::TexturePair(raw_handle, qmd.linked_tsc != 0)};
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if (pair.first <= regs.tic.limit) {
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return raw_handle;
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}
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if (((qmd.const_buffer_enable_mask.Value() >> cbuf_index) & 1) == 0) {
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return raw_handle;
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}
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const auto& cbuf{qmd.const_buffer_config[cbuf_index]};
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if (cbuf_offset + 12 > cbuf.size) {
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return raw_handle;
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}
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return ResolveBindlessHandleTable(*gpu_memory, cbuf.Address() + cbuf_offset, raw_handle,
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pair.first, regs.tic.limit);
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}
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Shader::TextureType ComputeEnvironment::ReadTextureType(u32 handle) {
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const auto& regs{kepler_compute->regs};
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const auto& qmd{kepler_compute->launch_description};
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@@ -29,6 +29,9 @@ class Memorymanager;
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namespace VideoCommon {
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[[nodiscard]] u32 ResolveBindlessHandleTable(Tegra::MemoryManager& gpu_memory, GPUVAddr record_addr,
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u32 raw_handle, u32 tic_index, u32 tic_limit);
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class GenericEnvironment : public Shader::Environment {
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public:
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explicit GenericEnvironment() = default;
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@@ -140,6 +143,8 @@ public:
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u32 ReadCbufValue(u32 cbuf_index, u32 cbuf_offset) override;
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u32 ResolveBindlessHandle(u32 cbuf_index, u32 cbuf_offset, u32 raw_handle) override;
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Shader::TextureType ReadTextureType(u32 handle) override;
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Shader::TexturePixelFormat ReadTexturePixelFormat(u32 handle) override;
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