[video_core, hle] remove redundant parent references in system structs (#3908)

reworked a bit to remove references of parent objects and instead pass as arguments to methods to prevent useless reloads

Signed-off-by: lizzie <lizzie@eden-emu.dev>
Co-authored-by: maufeat <sahyno1996@gmail.com>
Reviewed-on: https://git.eden-emu.dev/eden-emu/eden/pulls/3908
Reviewed-by: Maufeat <sahyno1996@gmail.com>
Reviewed-by: crueter <crueter@eden-emu.dev>

src/video_core/control/channel_state.cpp

@@ -17,28 +17,36 @@
 
 namespace Tegra::Control {
 
-ChannelState::ChannelState(s32 bind_id_) : bind_id{bind_id_}, initialized{} {}
+ChannelState::Payload::Payload(Core::System& system, MemoryManager& memory_manager, ChannelState& channel_state)
+    : maxwell_3d(memory_manager)
+    , fermi_2d(memory_manager)
+    , kepler_compute(memory_manager)
+    , maxwell_dma(memory_manager)
+    , kepler_memory(memory_manager)
+    , nv01_timer(memory_manager)
+    , dma_pusher(system, memory_manager, channel_state)
+{}
 
-void ChannelState::Init(Core::System& system, GPU& gpu, u64 program_id_) {
+ChannelState::ChannelState(s32 bind_id_)
+    : bind_id{bind_id_}
+{}
+
+void ChannelState::Init(Core::System& system, u64 program_id_) {
     ASSERT(memory_manager);
     program_id = program_id_;
-    dma_pusher.emplace(system, gpu, *memory_manager, *this);
-    maxwell_3d.emplace(system, *memory_manager);
-    fermi_2d.emplace(*memory_manager);
-    kepler_compute.emplace(system, *memory_manager);
-    maxwell_dma.emplace(system, *memory_manager);
-    kepler_memory.emplace(system, *memory_manager);
+    payload.emplace(system, *memory_manager, *this);
     initialized = true;
 }
 
 void ChannelState::BindRasterizer(VideoCore::RasterizerInterface* rasterizer) {
-    dma_pusher->BindRasterizer(rasterizer);
+    payload->dma_pusher.BindRasterizer(rasterizer);
     memory_manager->BindRasterizer(rasterizer);
-    maxwell_3d->BindRasterizer(rasterizer);
-    fermi_2d->BindRasterizer(rasterizer);
-    kepler_memory->BindRasterizer(rasterizer);
-    kepler_compute->BindRasterizer(rasterizer);
-    maxwell_dma->BindRasterizer(rasterizer);
+    payload->maxwell_3d.BindRasterizer(rasterizer);
+    payload->fermi_2d.BindRasterizer(rasterizer);
+    payload->kepler_memory.BindRasterizer(rasterizer);
+    payload->kepler_compute.BindRasterizer(rasterizer);
+    payload->maxwell_dma.BindRasterizer(rasterizer);
+    //payload->nv01_timer.BindRasterizer(rasterizer);
 }
 
 } // namespace Tegra::Control

src/video_core/control/channel_state.h

@@ -14,6 +14,7 @@
 #include "video_core/engines/kepler_compute.h"
 #include "video_core/engines/maxwell_3d.h"
 #include "video_core/engines/maxwell_dma.h"
+#include "video_core/engines/nv01_timer.h"
 #include "video_core/dma_pusher.h"
 
 namespace Core {
@@ -34,28 +35,33 @@ namespace Control {
 struct ChannelState {
     explicit ChannelState(s32 bind_id);
 
-    void Init(Core::System& system, GPU& gpu, u64 program_id);
+    void Init(Core::System& system, u64 program_id);
 
     void BindRasterizer(VideoCore::RasterizerInterface* rasterizer);
 
-    /// 3D engine
-    std::optional<Engines::Maxwell3D> maxwell_3d;
-    /// 2D engine
-    std::optional<Engines::Fermi2D> fermi_2d;
-    /// Compute engine
-    std::optional<Engines::KeplerCompute> kepler_compute;
-    /// DMA engine
-    std::optional<Engines::MaxwellDMA> maxwell_dma;
-    /// Inline memory engine
-    std::optional<Engines::KeplerMemory> kepler_memory;
-    /// NV01 Timer
-    std::optional<Engines::KeplerMemory> nv01_timer;
-    std::optional<DmaPusher> dma_pusher;
-    std::shared_ptr<MemoryManager> memory_manager;
+    struct Payload {
+        explicit Payload(Core::System& system, MemoryManager& memory_manager, ChannelState& channel_state);
+
+        /// 3D engine
+        Engines::Maxwell3D maxwell_3d;
+        /// 2D engine
+        Engines::Fermi2D fermi_2d;
+        /// Compute engine
+        Engines::KeplerCompute kepler_compute;
+        /// DMA engine
+        Engines::MaxwellDMA maxwell_dma;
+        /// Inline memory engine
+        Engines::KeplerMemory kepler_memory;
+        /// NV01 Timer
+        Engines::Nv01Timer nv01_timer;
+        DmaPusher dma_pusher;
+    };
+    std::optional<Payload> payload;
+    MemoryManager* memory_manager = nullptr;
 
     s32 bind_id = -1;
     u64 program_id = 0;
-    bool initialized{};
+    bool initialized = false;
 };
 
 } // namespace Control

src/video_core/control/channel_state_cache.cpp

@@ -1,3 +1,6 @@
+// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project
+// SPDX-License-Identifier: GPL-3.0-or-later
+
 // SPDX-FileCopyrightText: 2022 yuzu Emulator Project
 // SPDX-License-Identifier: GPL-3.0-or-later
 
@@ -6,8 +9,11 @@
 namespace VideoCommon {
 
 ChannelInfo::ChannelInfo(Tegra::Control::ChannelState& channel_state)
-    : maxwell3d{*channel_state.maxwell_3d}, kepler_compute{*channel_state.kepler_compute},
-      gpu_memory{*channel_state.memory_manager}, program_id{channel_state.program_id} {}
+    : maxwell3d{channel_state.payload->maxwell_3d}
+    , kepler_compute{channel_state.payload->kepler_compute}
+    , gpu_memory{*channel_state.memory_manager}
+    , program_id{channel_state.program_id}
+  {}
 
 template class VideoCommon::ChannelSetupCaches<VideoCommon::ChannelInfo>;
 

src/video_core/control/channel_state_cache.inc

@@ -1,3 +1,6 @@
+// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project
+// SPDX-License-Identifier: GPL-3.0-or-later
+
 // SPDX-FileCopyrightText: 2022 yuzu Emulator Project
 // SPDX-License-Identifier: GPL-3.0-or-later
 
@@ -41,7 +44,7 @@ void ChannelSetupCaches<P>::CreateChannel(struct Tegra::Control::ChannelState& c
     AddressSpaceRef new_gpu_mem_ref{
         .ref_count = 1,
         .storage_id = address_spaces.size(),
-        .gpu_memory = channel.memory_manager.get(),
+        .gpu_memory = channel.memory_manager,
     };
     address_spaces.emplace(channel.memory_manager->GetID(), new_gpu_mem_ref);
     OnGPUASRegister(channel.memory_manager->GetID());

src/video_core/control/scheduler.cpp

@@ -1,4 +1,4 @@
-// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project
+// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project
 // SPDX-License-Identifier: GPL-3.0-or-later
 
 // SPDX-FileCopyrightText: 2021 yuzu Emulator Project
@@ -12,11 +12,8 @@
 #include "video_core/gpu.h"
 
 namespace Tegra::Control {
-Scheduler::Scheduler(GPU& gpu_) : gpu{gpu_} {}
 
-Scheduler::~Scheduler() = default;
-
-void Scheduler::Push(s32 channel, CommandList&& entries) {
+void Scheduler::Push(GPU& gpu, s32 channel, CommandList&& entries) {
     std::shared_ptr<ChannelState> channel_state;
     {
         std::unique_lock lk(scheduling_guard);
@@ -27,8 +24,8 @@ void Scheduler::Push(s32 channel, CommandList&& entries) {
     }
     // Process commands outside the lock to reduce contention.
     // Multiple channels can prepare their commands in parallel.
-    channel_state->dma_pusher->Push(std::move(entries));
-    channel_state->dma_pusher->DispatchCalls();
+    channel_state->payload->dma_pusher.Push(std::move(entries));
+    channel_state->payload->dma_pusher.DispatchCalls();
 }
 
 void Scheduler::DeclareChannel(std::shared_ptr<ChannelState> new_channel) {

src/video_core/control/scheduler.h

@@ -22,17 +22,13 @@ struct ChannelState;
 
 class Scheduler {
 public:
-    explicit Scheduler(GPU& gpu_);
-    ~Scheduler();
-
-    void Push(s32 channel, CommandList&& entries);
+    void Push(GPU& gpu, s32 channel, CommandList&& entries);
 
     void DeclareChannel(std::shared_ptr<ChannelState> new_channel);
 
 private:
     ankerl::unordered_dense::map<s32, std::shared_ptr<ChannelState>> channels;
     std::mutex scheduling_guard;
-    GPU& gpu;
 };
 
 } // namespace Control