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fix arm

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This commit is contained in:
lizzie
2026-07-02 20:26:41 +00:00
parent e62d67e1a0
commit 450c69d873
7 changed files with 72 additions and 68 deletions
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docs/dynarmic/README.md
+21 -21
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@@ -94,26 +94,26 @@ public:
}
}
void MemoryWrite8(u32 vaddr, u8 value) override {
if (vaddr >= memory.size()) {
return;
void MemoryWrite(Dynarmic::A32::VAddr vaddr, u64 value, size_t size) override {
switch (size) {
case sizeof(u64):
MemoryWrite(vaddr, u32(value), sizeof(u32));
MemoryWrite(vaddr + 4, u32(value >> 32), sizeof(u32));
break;
case sizeof(u32):
MemoryWrite(vaddr, u16(value), sizeof(u16));
MemoryWrite(vaddr + 2, u16(value >> 16), sizeof(u16));
break;
case sizeof(u16):
MemoryWrite(vaddr, u8(value), sizeof(u8));
MemoryWrite(vaddr + 1, u8(value >> 8), sizeof(u8));
break;
case sizeof(u8):
memory[vaddr] = value;
break;
default:
std::abort();
}
memory[vaddr] = value;
}
void MemoryWrite16(u32 vaddr, u16 value) override {
MemoryWrite8(vaddr, u8(value));
MemoryWrite8(vaddr + 1, u8(value >> 8));
}
void MemoryWrite32(u32 vaddr, u32 value) override {
MemoryWrite16(vaddr, u16(value));
MemoryWrite16(vaddr + 2, u16(value >> 16));
}
void MemoryWrite64(u32 vaddr, u64 value) override {
MemoryWrite32(vaddr, u32(value));
MemoryWrite32(vaddr + 4, u32(value >> 32));
}
void CallSVC(u32 swi) override {
@@ -148,8 +148,8 @@ int main(int argc, char** argv) {
env.ticks_left = 1;
// Write some code to memory.
env.MemoryWrite16(0, 0x0088); // lsls r0, r1, #2
env.MemoryWrite16(2, 0xE7FE); // b +#0 (infinite loop)
env.MemoryWrite(0, 0x0088, 2); // lsls r0, r1, #2
env.MemoryWrite(2, 0xE7FE, 2); // b +#0 (infinite loop)
// Setup registers.
cpu.Regs()[0] = 1;
src/dynarmic/src/dynarmic/backend/arm64/a32_address_space.cpp
+1 -3
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@@ -59,7 +59,6 @@ static void* EmitWrappedReadCallTrampoline(oaknut::CodeGenerator& code, T* this_
ABI_PushRegisters(code, save_regs, 0);
code.LDR(X0, l_this);
code.MOV(X1, Xscratch0);
code.LDR(X2, sizeof(T));
code.LDR(Xscratch0, l_addr);
code.BLR(Xscratch0);
code.MOV(Xscratch0, X0);
@@ -116,7 +115,6 @@ static void* EmitWrappedWriteCallTrampoline(oaknut::CodeGenerator& code, T* this
code.LDR(X0, l_this);
code.MOV(X1, Xscratch0);
code.MOV(X2, Xscratch1);
code.MOV(X3, sizeof(T));
code.LDR(Xscratch0, l_addr);
code.BLR(Xscratch0);
ABI_PopRegisters(code, save_regs, 0);
@@ -179,7 +177,7 @@ void A32AddressSpace::EmitPrelude() {
UnprotectCodeMemory();
prelude_info.read_memory = EmitCallTrampoline<&A32::UserCallbacks::MemoryRead>(code, conf.callbacks);
prelude_info.wrapped_read_memory = EmitWrappedReadCallTrampoline<&A32::UserCallbacks::MemoryRead8>(code, conf.callbacks);
prelude_info.wrapped_read_memory = EmitWrappedReadCallTrampoline<&A32::UserCallbacks::MemoryRead>(code, conf.callbacks);
prelude_info.exclusive_read_memory = EmitExclusiveReadCallTrampoline<&A32::UserCallbacks::MemoryRead, u8>(code, conf);
prelude_info.exclusive_read_memory_16 = EmitExclusiveReadCallTrampoline<&A32::UserCallbacks::MemoryRead, u16>(code, conf);
prelude_info.exclusive_read_memory_32 = EmitExclusiveReadCallTrampoline<&A32::UserCallbacks::MemoryRead, u32>(code, conf);
src/dynarmic/src/dynarmic/backend/arm64/a64_address_space.cpp
-1
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@@ -114,7 +114,6 @@ static void* EmitWrappedWriteCallTrampoline(oaknut::CodeGenerator& code, T* this
code.LDR(X0, l_this);
code.MOV(X1, Xscratch0);
code.MOV(X2, Xscratch1);
code.MOV(X3, sizeof(T));
code.LDR(Xscratch0, l_addr);
code.BLR(Xscratch0);
ABI_PopRegisters(code, save_regs, 0);
src/dynarmic/src/dynarmic/backend/arm64/address_space.cpp
+35 -16
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@@ -145,32 +145,42 @@ void AddressSpace::Link(EmittedBlockInfo& block_info) {
case LinkTarget::ReturnFromRunCode:
c.B(prelude_info.return_from_run_code);
break;
// { this, vaddr, size }
case LinkTarget::ReadMemory8:
c.BL(prelude_info.read_memory_8);
c.LDR(X2, 1);
c.BL(prelude_info.read_memory);
break;
case LinkTarget::ReadMemory16:
c.BL(prelude_info.read_memory_16);
c.LDR(X2, 2);
c.BL(prelude_info.read_memory);
break;
case LinkTarget::ReadMemory32:
c.BL(prelude_info.read_memory_32);
c.LDR(X2, 4);
c.BL(prelude_info.read_memory);
break;
case LinkTarget::ReadMemory64:
c.BL(prelude_info.read_memory_64);
c.LDR(X2, 8);
c.BL(prelude_info.read_memory);
break;
case LinkTarget::ReadMemory128:
c.BL(prelude_info.read_memory_128);
break;
// { this, vaddr, size }
case LinkTarget::WrappedReadMemory8:
c.BL(prelude_info.wrapped_read_memory_8);
c.LDR(X2, 1);
c.BL(prelude_info.wrapped_read_memory);
break;
case LinkTarget::WrappedReadMemory16:
c.BL(prelude_info.wrapped_read_memory_16);
c.LDR(X2, 2);
c.BL(prelude_info.wrapped_read_memory);
break;
case LinkTarget::WrappedReadMemory32:
c.BL(prelude_info.wrapped_read_memory_32);
c.LDR(X2, 4);
c.BL(prelude_info.wrapped_read_memory);
break;
case LinkTarget::WrappedReadMemory64:
c.BL(prelude_info.wrapped_read_memory_64);
c.LDR(X2, 8);
c.BL(prelude_info.wrapped_read_memory);
break;
case LinkTarget::WrappedReadMemory128:
c.BL(prelude_info.wrapped_read_memory_128);
@@ -190,32 +200,41 @@ void AddressSpace::Link(EmittedBlockInfo& block_info) {
case LinkTarget::ExclusiveReadMemory128:
c.BL(prelude_info.exclusive_read_memory_128);
break;
// { this, vaddr, value, size }
case LinkTarget::WriteMemory8:
c.BL(prelude_info.write_memory_8);
c.LDR(X3, 1);
c.BL(prelude_info.write_memory);
break;
case LinkTarget::WriteMemory16:
c.BL(prelude_info.write_memory_16);
c.LDR(X3, 2);
c.BL(prelude_info.write_memory);
break;
case LinkTarget::WriteMemory32:
c.BL(prelude_info.write_memory_32);
c.LDR(X3, 4);
c.BL(prelude_info.write_memory);
break;
case LinkTarget::WriteMemory64:
c.BL(prelude_info.write_memory_64);
c.LDR(X3, 8);
c.BL(prelude_info.write_memory);
break;
case LinkTarget::WriteMemory128:
c.BL(prelude_info.write_memory_128);
break;
case LinkTarget::WrappedWriteMemory8:
c.BL(prelude_info.wrapped_write_memory_8);
c.LDR(X3, 1);
c.BL(prelude_info.wrapped_write_memory);
break;
case LinkTarget::WrappedWriteMemory16:
c.BL(prelude_info.wrapped_write_memory_16);
c.LDR(X3, 2);
c.BL(prelude_info.wrapped_write_memory);
break;
case LinkTarget::WrappedWriteMemory32:
c.BL(prelude_info.wrapped_write_memory_32);
c.LDR(X3, 4);
c.BL(prelude_info.wrapped_write_memory);
break;
case LinkTarget::WrappedWriteMemory64:
c.BL(prelude_info.wrapped_write_memory_64);
c.LDR(X3, 8);
c.BL(prelude_info.wrapped_write_memory);
break;
case LinkTarget::WrappedWriteMemory128:
c.BL(prelude_info.wrapped_write_memory_128);
src/dynarmic/src/dynarmic/backend/arm64/address_space.h
+4 -16
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@@ -92,30 +92,18 @@ protected:
void* return_to_dispatcher;
void* return_from_run_code;
void* read_memory_8;
void* read_memory_16;
void* read_memory_32;
void* read_memory_64;
void* read_memory;
void* read_memory_128;
void* wrapped_read_memory_8;
void* wrapped_read_memory_16;
void* wrapped_read_memory_32;
void* wrapped_read_memory_64;
void* wrapped_read_memory;
void* wrapped_read_memory_128;
void* exclusive_read_memory_8;
void* exclusive_read_memory_16;
void* exclusive_read_memory_32;
void* exclusive_read_memory_64;
void* exclusive_read_memory_128;
void* write_memory_8;
void* write_memory_16;
void* write_memory_32;
void* write_memory_64;
void* write_memory;
void* write_memory_128;
void* wrapped_write_memory_8;
void* wrapped_write_memory_16;
void* wrapped_write_memory_32;
void* wrapped_write_memory_64;
void* wrapped_write_memory;
void* wrapped_write_memory_128;
void* exclusive_write_memory_8;
void* exclusive_write_memory_16;
src/dynarmic/tests/A32/test_arm_instructions.cpp
+3 -3
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@@ -553,9 +553,9 @@ TEST_CASE("arm: Memory access (fastmem)", "[arm][A32]") {
memset(backing_memory, 0, memory_size);
memcpy(backing_memory + 0x100, "Lorem ipsum dolor sit amet, consectetur adipiscing elit.", 57);
env.MemoryWrite32(0, 0xE5904000); // LDR R4, [R0]
env.MemoryWrite32(4, 0xE5814000); // STR R4, [R1]
env.MemoryWrite32(8, 0xEAFFFFFE); // B .
env.MemoryWrite(0, 0xE5904000, sizeof(u32)); // LDR R4, [R0]
env.MemoryWrite(4, 0xE5814000, sizeof(u32)); // STR R4, [R1]
env.MemoryWrite(8, 0xEAFFFFFE, sizeof(u32)); // B .
jit.Regs()[0] = 0x100;
jit.Regs()[1] = 0x1F0;
jit.Regs()[15] = 0; // PC = 0
src/dynarmic/tests/A64/a64.cpp
+8 -8
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