[core, hle, video_core, memory] Improve multi-process, display layers, dynamic shader cache and rework overlay (#4238)

- [x] I have read and followed the [Contribution Guidelines](https://git.eden-emu.dev/eden-emu/eden/src/branch/master/CONTRIBUTING.md#code-contributions).
- [x] I have read and followed the [AI Policy](https://git.eden-emu.dev/eden-emu/eden/src/branch/master/docs/policies/AI.md)
- [x] I have read and followed the [Coding Guidelines](https://git.eden-emu.dev/eden-emu/eden/src/branch/master/docs/policies/Coding.md) to the best of my ability.

-------------------

- Dynamic shader cache reloading capability for qlaunch
- Multi-process improvements (thanks to @frank1734), instead of just using the main application we now respect caller process (also did it for HID devices while I was at it)
- Layer stack masks & shared buffer screenshot for video core, added different masks (screenshot, recording, etc.) this was discovered as an issue due to how in qlaunch the transition was not right between applications. May not be perfect but also fixes screenshots while using qlaunch
- Reworked overlay display management (input and visibility) - instead of random numbers as I've previously did, I decided to add an AppletZIndex enum for better readability. Also split capability of input by touch and gamepad.
- etc.

Reviewed-on: https://git.eden-emu.dev/eden-emu/eden/pulls/4238
Reviewed-by: Samuel <lizzie@eden-emu.dev>
Reviewed-by: CamilleLaVey <camillelavey99@gmail.com>
Reviewed-by: MaranBr <maranbr@eden-emu.dev>

src/core/hle/service/nvdrv/devices/nvdisp_disp0.cpp

@@ -77,6 +77,7 @@ void nvdisp_disp0::Composite(std::span<const Nvnflinger::HwcLayer> sorted_layers
             .transform_flags = layer.transform,
             .crop_rect = layer.crop_rect,
             .blending = ConvertBlending(layer.blending),
+            .layer_stack_mask = layer.layer_stack_mask,
         });
 
         for (size_t i = 0; i < layer.acquire_fence.num_fences; i++) {

src/core/hle/service/nvdrv/devices/nvhost_gpu.cpp

@@ -69,7 +69,7 @@ NvResult nvhost_gpu::Ioctl1(DeviceFD fd, Ioctl command, std::span<const u8> inpu
         case 0x3:
             return WrapFixed(this, &nvhost_gpu::ChannelSetTimeout, input, output);
         case 0x8:
-            return WrapFixedVariable(this, &nvhost_gpu::SubmitGPFIFOBase1, input, output, false);
+            return WrapFixedVariable(this, &nvhost_gpu::SubmitGPFIFOBase1, input, output, fd, false);
         case 0x9:
             return WrapFixed(this, &nvhost_gpu::AllocateObjectContext, input, output);
         case 0xb:
@@ -83,7 +83,7 @@ NvResult nvhost_gpu::Ioctl1(DeviceFD fd, Ioctl command, std::span<const u8> inpu
         case 0x1a:
             return WrapFixed(this, &nvhost_gpu::AllocGPFIFOEx2, input, output, fd);
         case 0x1b:
-            return WrapFixedVariable(this, &nvhost_gpu::SubmitGPFIFOBase1, input, output, true);
+            return WrapFixedVariable(this, &nvhost_gpu::SubmitGPFIFOBase1, input, output, fd, true);
         case 0x1d:
             return WrapFixed(this, &nvhost_gpu::ChannelSetTimeslice, input, output);
         default:
@@ -387,8 +387,19 @@ NvResult nvhost_gpu::SubmitGPFIFOImpl(IoctlSubmitGpfifo& params, Tegra::CommandL
     return NvResult::Success;
 }
 
+Core::Memory::Memory& nvhost_gpu::GetSessionMemory(DeviceFD fd) {
+    if (const auto it = sessions.find(fd); it != sessions.end())
+        if (auto* const session = core.GetSession(it->second);
+            session != nullptr && session->process != nullptr)
+            return session->process->GetMemory();
+
+    LOG_ERROR(Service_NVDRV, "No session for fd={}, falling back to application memory", fd);
+    return system.ApplicationMemory();
+}
+
 NvResult nvhost_gpu::SubmitGPFIFOBase1(IoctlSubmitGpfifo& params,
-                                       std::span<Tegra::CommandListHeader> commands, bool kickoff) {
+                                       std::span<Tegra::CommandListHeader> commands, DeviceFD fd,
+                                       bool kickoff) {
     if (params.num_entries > commands.size()) {
         UNIMPLEMENTED();
         return NvResult::InvalidSize;
@@ -396,7 +407,7 @@ NvResult nvhost_gpu::SubmitGPFIFOBase1(IoctlSubmitGpfifo& params,
 
     Tegra::CommandList entries(params.num_entries);
     if (kickoff) {
-        system.ApplicationMemory().ReadBlock(params.address, entries.command_lists.data(),
+        this->GetSessionMemory(fd).ReadBlock(params.address, entries.command_lists.data(),
                                              params.num_entries * sizeof(Tegra::CommandListHeader));
     } else {
         std::memcpy(entries.command_lists.data(), commands.data(),

src/core/hle/service/nvdrv/devices/nvhost_gpu.h

@@ -16,6 +16,10 @@
 #include "core/hle/service/nvdrv/nvdata.h"
 #include "video_core/dma_pusher.h"
 
+namespace Core::Memory {
+class Memory;
+}
+
 namespace Tegra {
 namespace Control {
 struct ChannelState;
@@ -196,8 +200,11 @@ private:
 
     NvResult SubmitGPFIFOImpl(IoctlSubmitGpfifo& params, Tegra::CommandList&& entries);
 
+    Core::Memory::Memory& GetSessionMemory(DeviceFD fd);
+
     NvResult SubmitGPFIFOBase1(IoctlSubmitGpfifo& params,
-                               std::span<Tegra::CommandListHeader> commands, bool kickoff = false);
+                               std::span<Tegra::CommandListHeader> commands, DeviceFD fd,
+                               bool kickoff = false);
     NvResult SubmitGPFIFOBase2(IoctlSubmitGpfifo& params,
                                std::span<const Tegra::CommandListHeader> commands);