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https://git.eden-emu.dev/eden-emu/eden.git
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[TEST] Geometry shader changes + barrier fixes
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@@ -72,6 +72,25 @@ Shader::OutputTopology MaxwellToOutputTopology(Maxwell::PrimitiveTopology topolo
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}
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}
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Shader::InputTopology MaxwellToInputTopology(Maxwell::PrimitiveTopology topology) {
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switch (topology) {
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case Maxwell::PrimitiveTopology::Points:
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return Shader::InputTopology::Points;
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case Maxwell::PrimitiveTopology::Lines:
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case Maxwell::PrimitiveTopology::LineLoop:
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case Maxwell::PrimitiveTopology::LineStrip:
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return Shader::InputTopology::Lines;
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case Maxwell::PrimitiveTopology::LinesAdjacency:
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case Maxwell::PrimitiveTopology::LineStripAdjacency:
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return Shader::InputTopology::LinesAdjacency;
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case Maxwell::PrimitiveTopology::TrianglesAdjacency:
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case Maxwell::PrimitiveTopology::TriangleStripAdjacency:
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return Shader::InputTopology::TrianglesAdjacency;
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default:
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return Shader::InputTopology::Triangles;
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}
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}
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Shader::RuntimeInfo MakeRuntimeInfo(const GraphicsPipelineKey& key,
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const Shader::IR::Program& program,
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const Shader::IR::Program* previous_program,
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@@ -127,33 +146,7 @@ Shader::RuntimeInfo MakeRuntimeInfo(const GraphicsPipelineKey& key,
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default:
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break;
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}
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switch (key.gs_input_topology) {
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case Maxwell::PrimitiveTopology::Points:
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info.input_topology = Shader::InputTopology::Points;
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break;
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case Maxwell::PrimitiveTopology::Lines:
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case Maxwell::PrimitiveTopology::LineLoop:
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case Maxwell::PrimitiveTopology::LineStrip:
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info.input_topology = Shader::InputTopology::Lines;
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break;
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case Maxwell::PrimitiveTopology::Triangles:
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case Maxwell::PrimitiveTopology::TriangleStrip:
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case Maxwell::PrimitiveTopology::TriangleFan:
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case Maxwell::PrimitiveTopology::Quads:
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case Maxwell::PrimitiveTopology::QuadStrip:
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case Maxwell::PrimitiveTopology::Polygon:
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case Maxwell::PrimitiveTopology::Patches:
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info.input_topology = Shader::InputTopology::Triangles;
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break;
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case Maxwell::PrimitiveTopology::LinesAdjacency:
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case Maxwell::PrimitiveTopology::LineStripAdjacency:
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info.input_topology = Shader::InputTopology::LinesAdjacency;
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break;
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case Maxwell::PrimitiveTopology::TrianglesAdjacency:
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case Maxwell::PrimitiveTopology::TriangleStripAdjacency:
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info.input_topology = Shader::InputTopology::TrianglesAdjacency;
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break;
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}
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info.input_topology = MaxwellToInputTopology(key.gs_input_topology);
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info.glasm_use_storage_buffers = glasm_use_storage_buffers;
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return info;
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}
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@@ -483,8 +476,10 @@ std::unique_ptr<GraphicsPipeline> ShaderCache::CreateGraphicsPipeline(
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&& index == u32(Maxwell::ShaderType::Geometry);
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if (key.unique_hashes[index] == 0 && is_emulated_stage) {
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auto topology = MaxwellToOutputTopology(key.gs_input_topology);
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programs[index] = GenerateGeometryPassthrough(pools.inst, pools.block, host_info,
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*layer_source_program, topology);
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programs[index] =
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GenerateGeometryPassthrough(pools.inst, pools.block, host_info,
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*layer_source_program, topology,
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MaxwellToInputTopology(key.gs_input_topology));
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continue;
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}
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if (key.unique_hashes[index] == 0) {
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@@ -502,13 +497,15 @@ std::unique_ptr<GraphicsPipeline> ShaderCache::CreateGraphicsPipeline(
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if (!uses_vertex_a || index != 1) {
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// Normal path
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programs[index] = TranslateProgram(pools.inst, pools.block, env, cfg, host_info);
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programs[index] = TranslateProgram(pools.inst, pools.block, env, cfg, host_info,
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MaxwellToInputTopology(key.gs_input_topology));
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total_storage_buffers += Shader::NumDescriptors(programs[index].info.storage_buffers_descriptors);
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} else {
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// VertexB path when VertexA is present.
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auto& program_va{programs[0]};
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auto program_vb{TranslateProgram(pools.inst, pools.block, env, cfg, host_info)};
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auto program_vb{TranslateProgram(pools.inst, pools.block, env, cfg, host_info,
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MaxwellToInputTopology(key.gs_input_topology))};
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total_storage_buffers += Shader::NumDescriptors(program_vb.info.storage_buffers_descriptors);
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programs[index] = MergeDualVertexPrograms(program_va, program_vb, env);
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}
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@@ -597,7 +594,8 @@ std::unique_ptr<ComputePipeline> ShaderCache::CreateComputePipeline(
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env.Dump(hash, key.unique_hash);
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}
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auto program{TranslateProgram(pools.inst, pools.block, env, cfg, host_info)};
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auto program{TranslateProgram(pools.inst, pools.block, env, cfg, host_info,
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Shader::InputTopology::Points)};
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const u32 num_storage_buffers{Shader::NumDescriptors(program.info.storage_buffers_descriptors)};
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Shader::RuntimeInfo info;
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info.glasm_use_storage_buffers = num_storage_buffers <= device.GetMaxGLASMStorageBufferBlocks();
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@@ -152,6 +152,25 @@ Shader::AttributeType AttributeType(const FixedPipelineState& state, size_t inde
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return Shader::AttributeType::Disabled;
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}
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Shader::InputTopology MaxwellToInputTopology(Maxwell::PrimitiveTopology topology) {
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switch (topology) {
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case Maxwell::PrimitiveTopology::Points:
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return Shader::InputTopology::Points;
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case Maxwell::PrimitiveTopology::Lines:
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case Maxwell::PrimitiveTopology::LineLoop:
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case Maxwell::PrimitiveTopology::LineStrip:
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return Shader::InputTopology::Lines;
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case Maxwell::PrimitiveTopology::LinesAdjacency:
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case Maxwell::PrimitiveTopology::LineStripAdjacency:
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return Shader::InputTopology::LinesAdjacency;
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case Maxwell::PrimitiveTopology::TrianglesAdjacency:
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case Maxwell::PrimitiveTopology::TriangleStripAdjacency:
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return Shader::InputTopology::TrianglesAdjacency;
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default:
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return Shader::InputTopology::Triangles;
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}
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}
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Shader::RuntimeInfo MakeRuntimeInfo(std::span<const Shader::IR::Program> programs,
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const GraphicsPipelineCacheKey& key,
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const Shader::IR::Program& program,
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@@ -270,33 +289,7 @@ Shader::RuntimeInfo MakeRuntimeInfo(std::span<const Shader::IR::Program> program
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default:
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break;
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}
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switch (key.state.topology) {
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case Maxwell::PrimitiveTopology::Points:
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info.input_topology = Shader::InputTopology::Points;
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break;
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case Maxwell::PrimitiveTopology::Lines:
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case Maxwell::PrimitiveTopology::LineLoop:
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case Maxwell::PrimitiveTopology::LineStrip:
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info.input_topology = Shader::InputTopology::Lines;
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break;
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case Maxwell::PrimitiveTopology::Triangles:
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case Maxwell::PrimitiveTopology::TriangleStrip:
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case Maxwell::PrimitiveTopology::TriangleFan:
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case Maxwell::PrimitiveTopology::Quads:
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case Maxwell::PrimitiveTopology::QuadStrip:
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case Maxwell::PrimitiveTopology::Polygon:
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case Maxwell::PrimitiveTopology::Patches:
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info.input_topology = Shader::InputTopology::Triangles;
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break;
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case Maxwell::PrimitiveTopology::LinesAdjacency:
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case Maxwell::PrimitiveTopology::LineStripAdjacency:
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info.input_topology = Shader::InputTopology::LinesAdjacency;
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break;
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case Maxwell::PrimitiveTopology::TrianglesAdjacency:
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case Maxwell::PrimitiveTopology::TriangleStripAdjacency:
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info.input_topology = Shader::InputTopology::TrianglesAdjacency;
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break;
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}
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info.input_topology = MaxwellToInputTopology(key.state.topology);
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info.force_early_z = key.state.early_z != 0;
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info.y_negate = key.state.y_negate != 0;
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return info;
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@@ -793,8 +786,10 @@ std::unique_ptr<GraphicsPipeline> PipelineCache::CreateGraphicsPipeline(
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index == static_cast<u32>(Maxwell::ShaderType::Geometry);
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if (key.unique_hashes[index] == 0 && is_emulated_stage) {
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auto topology = MaxwellToOutputTopology(key.state.topology);
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programs[index] = GenerateGeometryPassthrough(pools.inst, pools.block, host_info,
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*layer_source_program, topology);
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programs[index] =
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GenerateGeometryPassthrough(pools.inst, pools.block, host_info,
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*layer_source_program, topology,
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MaxwellToInputTopology(key.state.topology));
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continue;
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}
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if (key.unique_hashes[index] == 0) {
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@@ -807,11 +802,13 @@ std::unique_ptr<GraphicsPipeline> PipelineCache::CreateGraphicsPipeline(
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Shader::Maxwell::Flow::CFG cfg(env, pools.flow_block, cfg_offset, index == 0);
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if (!uses_vertex_a || index != 1) {
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// Normal path
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programs[index] = TranslateProgram(pools.inst, pools.block, env, cfg, host_info);
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programs[index] = TranslateProgram(pools.inst, pools.block, env, cfg, host_info,
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MaxwellToInputTopology(key.state.topology));
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} else {
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// VertexB path when VertexA is present.
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auto& program_va{programs[0]};
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auto program_vb{TranslateProgram(pools.inst, pools.block, env, cfg, host_info)};
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auto program_vb{TranslateProgram(pools.inst, pools.block, env, cfg, host_info,
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MaxwellToInputTopology(key.state.topology))};
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programs[index] = MergeDualVertexPrograms(program_va, program_vb, env);
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}
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@@ -957,7 +954,8 @@ std::unique_ptr<ComputePipeline> PipelineCache::CreateComputePipeline(
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env.Dump(hash, key.unique_hash);
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}
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auto program{TranslateProgram(pools.inst, pools.block, env, cfg, host_info)};
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auto program{TranslateProgram(pools.inst, pools.block, env, cfg, host_info,
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Shader::InputTopology::Points)};
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const VkDriverIdKHR driver_id = device.GetDriverID();
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const bool needs_shared_mem_clamp =
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driver_id == VK_DRIVER_ID_QUALCOMM_PROPRIETARY ||
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@@ -410,8 +410,17 @@ void Scheduler::EndRenderPass()
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Record([num_images = num_renderpass_images,
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images = renderpass_images,
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ranges = renderpass_image_ranges,
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consumer_stages = device.AttachmentConsumerStages(),
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has_transform_feedback = device.IsExtTransformFeedbackSupported()](
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vk::CommandBuffer cmdbuf) {
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static constexpr VkAccessFlags SHADER_ACCESS =
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VK_ACCESS_SHADER_READ_BIT | VK_ACCESS_SHADER_WRITE_BIT;
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static constexpr VkAccessFlags COLOR_ACCESS =
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VK_ACCESS_COLOR_ATTACHMENT_READ_BIT | VK_ACCESS_COLOR_ATTACHMENT_WRITE_BIT;
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static constexpr VkAccessFlags DEPTH_STENCIL_ACCESS =
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VK_ACCESS_DEPTH_STENCIL_ATTACHMENT_READ_BIT |
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VK_ACCESS_DEPTH_STENCIL_ATTACHMENT_WRITE_BIT;
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std::array<VkImageMemoryBarrier, 9> barriers;
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for (size_t i = 0; i < num_images; ++i) {
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const VkImageSubresourceRange& range = ranges[i];
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@@ -421,24 +430,25 @@ void Scheduler::EndRenderPass()
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| VK_IMAGE_ASPECT_STENCIL_BIT)) !=0;
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VkAccessFlags src_access = 0;
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VkAccessFlags dst_access = SHADER_ACCESS;
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if (is_color)
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if (is_color) {
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src_access |= VK_ACCESS_COLOR_ATTACHMENT_WRITE_BIT;
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else if (is_depth_stencil)
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dst_access |= COLOR_ACCESS;
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} else if (is_depth_stencil) {
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src_access |= VK_ACCESS_DEPTH_STENCIL_ATTACHMENT_WRITE_BIT;
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else
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dst_access |= DEPTH_STENCIL_ACCESS;
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} else {
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src_access |= VK_ACCESS_COLOR_ATTACHMENT_WRITE_BIT
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| VK_ACCESS_DEPTH_STENCIL_ATTACHMENT_WRITE_BIT;
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dst_access |= COLOR_ACCESS | DEPTH_STENCIL_ACCESS;
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}
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barriers[i] = VkImageMemoryBarrier{
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.sType = VK_STRUCTURE_TYPE_IMAGE_MEMORY_BARRIER,
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.pNext = nullptr,
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.srcAccessMask = src_access,
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.dstAccessMask = VK_ACCESS_SHADER_READ_BIT | VK_ACCESS_SHADER_WRITE_BIT
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| VK_ACCESS_COLOR_ATTACHMENT_READ_BIT
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| VK_ACCESS_COLOR_ATTACHMENT_WRITE_BIT
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| VK_ACCESS_DEPTH_STENCIL_ATTACHMENT_READ_BIT
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| VK_ACCESS_DEPTH_STENCIL_ATTACHMENT_WRITE_BIT,
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.dstAccessMask = dst_access,
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.oldLayout = VK_IMAGE_LAYOUT_GENERAL,
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.newLayout = VK_IMAGE_LAYOUT_GENERAL,
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.srcQueueFamilyIndex = VK_QUEUE_FAMILY_IGNORED,
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@@ -449,7 +459,7 @@ void Scheduler::EndRenderPass()
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}
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cmdbuf.EndRenderPass();
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cmdbuf.PipelineBarrier(VK_PIPELINE_STAGE_EARLY_FRAGMENT_TESTS_BIT | VK_PIPELINE_STAGE_LATE_FRAGMENT_TESTS_BIT |
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VK_PIPELINE_STAGE_COLOR_ATTACHMENT_OUTPUT_BIT, vk::PIPELINE_STAGE_GRAPHICS_COMPUTE,
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VK_PIPELINE_STAGE_COLOR_ATTACHMENT_OUTPUT_BIT, consumer_stages,
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0, nullptr, nullptr, vk::Span(barriers.data(), num_images));
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if (has_transform_feedback) {
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static constexpr VkMemoryBarrier XFB_OUTPUT_BARRIER{
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@@ -961,6 +961,21 @@ FN_MAX_LIMIT_LIST
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return features2.features.multiViewport;
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}
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VkPipelineStageFlags AttachmentConsumerStages() const {
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VkPipelineStageFlags stages = VK_PIPELINE_STAGE_VERTEX_SHADER_BIT |
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VK_PIPELINE_STAGE_TESSELLATION_CONTROL_SHADER_BIT |
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VK_PIPELINE_STAGE_TESSELLATION_EVALUATION_SHADER_BIT |
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VK_PIPELINE_STAGE_FRAGMENT_SHADER_BIT |
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VK_PIPELINE_STAGE_EARLY_FRAGMENT_TESTS_BIT |
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VK_PIPELINE_STAGE_LATE_FRAGMENT_TESTS_BIT |
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VK_PIPELINE_STAGE_COLOR_ATTACHMENT_OUTPUT_BIT |
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VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT;
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if (features2.features.geometryShader) {
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stages |= VK_PIPELINE_STAGE_GEOMETRY_SHADER_BIT;
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}
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return stages;
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}
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/// Returns true if the device supports VK_KHR_maintenance1.
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bool IsKhrMaintenance1Supported() const {
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return extensions.maintenance1;
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