diff --git a/src/video_core/texture_cache/descriptor_table.h b/src/video_core/texture_cache/descriptor_table.h index ec310803f4..37022842fe 100644 --- a/src/video_core/texture_cache/descriptor_table.h +++ b/src/video_core/texture_cache/descriptor_table.h @@ -31,12 +31,10 @@ public: u32 generation; }; - [[nodiscard]] bool Synchronize(GPUVAddr gpu_addr, u32 limit) noexcept { - bool ret = !(current_gpu_addr == gpu_addr && current_limit == limit); - if (ret) { + void Synchronize(GPUVAddr gpu_addr, u32 limit) noexcept { + if (current_gpu_addr != gpu_addr || current_limit != limit) { Refresh(gpu_addr, limit); } - return ret; } void Invalidate() noexcept { diff --git a/src/video_core/texture_cache/texture_cache.h b/src/video_core/texture_cache/texture_cache.h index 2b25184d9b..46cead4c35 100644 --- a/src/video_core/texture_cache/texture_cache.h +++ b/src/video_core/texture_cache/texture_cache.h @@ -196,65 +196,16 @@ void TextureCache
::FillImageViews(std::span ::CheckFeedbackLoop(std::span ::SynchronizeDescriptors(bool compute) {
const bool linked_tsc = kepler_compute->launch_description.linked_tsc;
const u32 tic_limit = kepler_compute->regs.tic.limit;
const u32 tsc_limit = linked_tsc ? tic_limit : kepler_compute->regs.tsc.limit;
- bool bindings_changed = false;
- if (channel_state->compute_sampler_table.Synchronize(kepler_compute->regs.tsc.Address(), tsc_limit))
- bindings_changed = true;
- if (channel_state->compute_image_table.Synchronize(kepler_compute->regs.tic.Address(), tic_limit))
- bindings_changed = true;
- if (bindings_changed) {
- ++texture_bindings_serial;
- }
+ channel_state->compute_sampler_table.Synchronize(kepler_compute->regs.tsc.Address(), tsc_limit);
+ channel_state->compute_image_table.Synchronize(kepler_compute->regs.tic.Address(), tic_limit);
} else {
const bool linked_tsc = maxwell3d->regs.sampler_binding == Tegra::Engines::Maxwell3D::Regs::SamplerBinding::ViaHeaderBinding;
const u32 tic_limit = maxwell3d->regs.tex_header.limit;
const u32 tsc_limit = linked_tsc ? tic_limit : maxwell3d->regs.tex_sampler.limit;
- bool bindings_changed = false;
- if (channel_state->graphics_sampler_table.Synchronize(maxwell3d->regs.tex_sampler.Address(), tsc_limit))
- bindings_changed = true;
- if (channel_state->graphics_image_table.Synchronize(maxwell3d->regs.tex_header.Address(), tic_limit))
- bindings_changed = true;
- if (bindings_changed) {
- ++texture_bindings_serial;
- }
+ channel_state->graphics_sampler_table.Synchronize(maxwell3d->regs.tex_sampler.Address(), tsc_limit);
+ channel_state->graphics_image_table.Synchronize(maxwell3d->regs.tex_header.Address(), tic_limit);
}
}
@@ -442,19 +381,9 @@ void TextureCache ::UpdateRenderTargets(bool is_clear) {
PrepareImageView(depth_buffer_id, true, is_clear && IsFullClear(depth_buffer_id));
- rt_active_mask = 0;
- rt_image_id = {};
- for (size_t i = 0; i < rt_image_id.size(); ++i) {
- if (ImageViewId const view = render_targets.color_buffer_ids[i]; view) {
- rt_active_mask |= 1u << i;
- rt_image_id[i] = slot_image_views[view].image_id;
- }
- }
+ rt_depth_image_id = {};
if (depth_buffer_id) {
- rt_active_mask |= (1u << NUM_RT);
rt_depth_image_id = slot_image_views[depth_buffer_id].image_id;
- } else {
- rt_depth_image_id = ImageId{};
}
for (size_t index = 0; index < NUM_RT; ++index) {
diff --git a/src/video_core/texture_cache/texture_cache_base.h b/src/video_core/texture_cache/texture_cache_base.h
index b51f03e532..0243a68a2d 100644
--- a/src/video_core/texture_cache/texture_cache_base.h
+++ b/src/video_core/texture_cache/texture_cache_base.h
@@ -418,13 +418,7 @@ private:
RenderTargets render_targets;
u64 render_targets_serial = 0;
- u32 rt_active_mask = 0;
- std::array