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[android, nce] Remove LRU-Cache (#3500)
This PR removes the obsolete logic of LRU-cache within, removing old and dead code, allows Android to avoid unnecesary usage of memory caching, aside to prevent some old bugs to arise in other systems that allows NCE, improves a small margin of performance and makes memory ram consumption overall better, by 300 - 500mb, revealing that part of the code was still active, even if LRU wasn't enabled. Signed-off-by: lizzie <lizzie@eden-emu.dev> Signed-off-by: CamilleLaVey <camillelavey99@gmail.com> Co-authored-by: CamilleLaVey <camillelavey99@gmail.com> Reviewed-on: https://git.eden-emu.dev/eden-emu/eden/pulls/3500 Reviewed-by: DraVee <dravee@eden-emu.dev> Reviewed-by: CamilleLaVey <camillelavey99@gmail.com> Co-authored-by: lizzie <lizzie@eden-emu.dev> Co-committed-by: lizzie <lizzie@eden-emu.dev>
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@@ -9,12 +9,12 @@
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#include <oaknut/code_block.hpp>
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#include <oaknut/oaknut.hpp>
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#include "common/logging/log.h"
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#include "common/common_types.h"
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#include "common/settings.h"
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#include "core/hle/kernel/code_set.h"
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#include "core/hle/kernel/k_typed_address.h"
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#include "core/hle/kernel/physical_memory.h"
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#include "lru_cache.h"
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#include <utility>
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using ModuleID = std::array<u8, 32>; // NSO build ID
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struct PatchCacheKey {
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@@ -44,6 +44,7 @@ enum class PatchMode : u32 {
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Split, ///< Patch sections are inserted before .text and after .data
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};
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using ModuleTextAddress = u64;
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using PatchTextAddress = u64;
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using EntryTrampolines = ankerl::unordered_dense::map<ModuleTextAddress, PatchTextAddress>;
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@@ -53,10 +54,6 @@ public:
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void SetModuleID(const ModuleID& id) {
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module_id = id;
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}
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Patcher(const Patcher&) = delete;
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Patcher& operator=(const Patcher&) = delete;
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Patcher(Patcher&& other) noexcept;
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Patcher& operator=(Patcher&&) noexcept = delete;
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explicit Patcher();
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~Patcher();
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bool PatchText(const Kernel::PhysicalMemory& program_image,
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@@ -99,28 +96,9 @@ private:
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void WriteCntpctHandler(ModuleDestLabel module_dest, oaknut::XReg dest_reg) { WriteCntpctHandler(module_dest, dest_reg, c); }
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private:
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static constexpr size_t CACHE_SIZE = 16384; // Cache size for patch entries
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LRUCache<PatchCacheKey, PatchTextAddress> patch_cache{CACHE_SIZE, Settings::values.lru_cache_enabled.GetValue()};
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void BranchToPatch(uintptr_t module_dest) {
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if (patch_cache.isEnabled()) {
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PatchCacheKey key{module_id, module_dest};
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LOG_DEBUG(Core_ARM, "LRU cache lookup for module={}, offset={:#x}", fmt::ptr(module_id.data()), module_dest);
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// Try to get existing patch entry from cache
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if (auto* cached_patch = patch_cache.get(key)) {
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LOG_WARNING(Core_ARM, "LRU cache hit for module offset {:#x}", module_dest);
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curr_patch->m_branch_to_patch_relocations.push_back({c.offset(), *cached_patch});
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return;
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}
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LOG_DEBUG(Core_ARM, "LRU cache miss for module offset {:#x}, creating new patch", module_dest);
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// Not in cache: create and store
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const auto patch_addr = c.offset();
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curr_patch->m_branch_to_patch_relocations.push_back({patch_addr, module_dest});
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patch_cache.put(key, patch_addr);
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} else {
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LOG_DEBUG(Core_ARM, "LRU cache disabled - direct patch for offset {:#x}", module_dest);
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curr_patch->m_branch_to_patch_relocations.push_back({c.offset(), module_dest});
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}
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LOG_DEBUG(Core_ARM, "Patch for offset {:#x}", module_dest);
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curr_patch->m_branch_to_patch_relocations.push_back({c.offset(), module_dest});
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}
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void BranchToPatchPre(uintptr_t module_dest) {
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