Commit Graph

19 Commits

Author SHA1 Message Date
ameerj e7710fe30e shader: Implement DMUL and DFMA
Also add a missing const on DADD
2021-07-22 21:51:24 -04:00
ameerj d9bcca65b4 shader: Add FP64 register load/store helpers 2021-07-22 21:51:24 -04:00
ReinUsesLisp 6398d03341 shader: Implement I2F 2021-07-22 21:51:23 -04:00
ReinUsesLisp 33090a74dd shader: Add partial rasterizer integration 2021-07-22 21:51:23 -04:00
ameerj 832f1169d6 shader: Implement DADD 2021-07-22 21:51:23 -04:00
ameerj ea4e293758 shader: Implement FSET and FSETP
Also fix oversight with adding SignedZeroInfNanPreserve execution mode.
2021-07-22 21:51:23 -04:00
ReinUsesLisp db2e9d64aa shader: Implement CAL inlining function calls 2021-07-22 21:51:23 -04:00
ameerj d43926b401 shader: Implement LOP and LOP3 2021-07-22 21:51:23 -04:00
ameerj c6e6e4bc7e Implement PSET, refactor common comparison funcs 2021-07-22 21:51:23 -04:00
ameerj 14a3b85831 shader: Implement ISET, add common_funcs 2021-07-22 21:51:23 -04:00
ReinUsesLisp d0459ab2c2 shader: Fix control flow 2021-07-22 21:51:22 -04:00
ReinUsesLisp dda21fd317 shader: FMUL, select, RRO, and MUFU fixes 2021-07-22 21:51:22 -04:00
ReinUsesLisp e755a13d06 shader: Rename, implement FADD.SAT and P2R (imm) 2021-07-22 21:51:22 -04:00
ReinUsesLisp a2fe90fa60 spirv: Add lower fp16 to fp32 pass 2021-07-22 21:51:22 -04:00
ReinUsesLisp a5f87011d3 shader: Primitive Vulkan integration 2021-07-22 21:51:22 -04:00
ReinUsesLisp f5b3324bca shader: Make typed IR 2021-07-22 21:51:21 -04:00
ReinUsesLisp f5605b424f shader: Initial instruction support 2021-07-22 21:51:21 -04:00
ReinUsesLisp 1b576ed4cb shader: SSA and dominance 2021-07-22 21:51:21 -04:00
ReinUsesLisp e6892e9da6 shader: Initial recompiler work 2021-07-22 21:51:21 -04:00