2026-09-03 20:32:03

Signed-off-by: lizzie <lizzie@eden-emu.dev>

externals/tz/tz/tz.h

@@ -11,6 +11,7 @@
 #include <limits>
 #include <span>
 #include <array>
+#include <algorithm>
 #include <time.h>
 
 namespace Tz {

src/common/demangle.cpp

@@ -5,6 +5,7 @@
 // SPDX-License-Identifier: GPL-2.0-or-later
 
 #include <string>
+#include <cstdlib>
 #include <string_view>
 #ifdef _WIN32
 #include <llvm/Demangle/Demangle.h>

src/core/arm/dynarmic/arm_dynarmic_32.cpp

@@ -42,7 +42,7 @@ u64 DynarmicCallbacks32::MemoryRead64(u32 vaddr) {
 std::optional<u32> DynarmicCallbacks32::MemoryReadCode(u32 vaddr) {
     if (!m_memory.IsValidVirtualAddressRange(vaddr, sizeof(u32)))
         return std::nullopt;
-    auto const aligned_vaddr = vaddr & u32(~Core::Memory::YUZU_PAGEMASK);
+    auto const aligned_vaddr = vaddr & ~Core::Memory::YUZU_PAGEMASK;
     if (last_code_addr != aligned_vaddr) {
         m_memory.ReadBlock(aligned_vaddr, &cached_code_page, sizeof(cached_code_page));
         last_code_addr = aligned_vaddr;
@@ -420,13 +420,11 @@ void ArmDynarmic32::SignalInterrupt(Kernel::KThread* thread) {
 }
 
 void ArmDynarmic32::ClearInstructionCache() {
-    m_cb->last_code_addr = u32(-1);
     m_jit->ClearCache();
 }
 
 void ArmDynarmic32::InvalidateCacheRange(u64 addr, std::size_t size) {
-    m_cb->last_code_addr = u32(-1);
-    m_jit->InvalidateCacheRange(u32(addr), size);
+    m_jit->InvalidateCacheRange(static_cast<u32>(addr), size);
 }
 
 } // namespace Core

src/core/arm/dynarmic/arm_dynarmic_32.h

@@ -36,7 +36,7 @@ public:
     u64 MemoryRead64(u32 vaddr) override;
     std::optional<u32> MemoryReadCode(u32 vaddr) override;
     void InstructionSynchronizationBarrierRaised() override {
-        last_code_addr = u32(-1); //reset back, force refetch
+        last_code_addr = u64(-1); //reset back, force refetch
     }
     void MemoryWrite8(u32 vaddr, u8 value) override;
     void MemoryWrite16(u32 vaddr, u16 value) override;
@@ -54,7 +54,7 @@ public:
     void ReturnException(u32 pc, Dynarmic::HaltReason hr);
     //
     Dynarmic::CodePage cached_code_page;
-    u32 last_code_addr = u32(-1);
+    u64 last_code_addr = u64(-1);
     ArmDynarmic32& m_parent;
     Core::Memory::Memory& m_memory;
     Kernel::KProcess* m_process{};

src/core/arm/dynarmic/arm_dynarmic_64.cpp

@@ -105,7 +105,7 @@ void DynarmicCallbacks64::InstructionCacheOperationRaised(Dynarmic::A64::Instruc
     last_code_addr = u64(-1); //invalidate cached page
     switch (op) {
     case Dynarmic::A64::InstructionCacheOperation::InvalidateByVAToPoU: {
-        constexpr u64 ICACHE_LINE_SIZE = 64;
+        static constexpr u64 ICACHE_LINE_SIZE = 64;
         const u64 cache_line_start = value & ~(ICACHE_LINE_SIZE - 1);
         m_parent.InvalidateCacheRange(cache_line_start, ICACHE_LINE_SIZE);
         break;
@@ -447,12 +447,10 @@ void ArmDynarmic64::SignalInterrupt(Kernel::KThread* thread) {
 }
 
 void ArmDynarmic64::ClearInstructionCache() {
-    m_cb->last_code_addr = u64(-1);
     m_jit->ClearCache();
 }
 
 void ArmDynarmic64::InvalidateCacheRange(u64 addr, std::size_t size) {
-    m_cb->last_code_addr = u64(-1);
     m_jit->InvalidateCacheRange(addr, size);
 }