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fifa-lemon
| Author | SHA1 | Date | |
|---|---|---|---|
| 355f9d84ef |
@@ -38,6 +38,8 @@ struct HostTranslateInfo {
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///< passthrough shaders
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bool support_conditional_barrier{}; ///< True when the device supports barriers in conditional
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///< control flow
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bool support_attribute_texture_handle{}; ///< True when the host binds texture handles that
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///< arrive as vertex attributes
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void ApplyDescriptorLimitPolicy() noexcept {
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if (min_ssbo_alignment == 0) {
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@@ -268,6 +268,10 @@ static inline u32 ReadCbufCached(Environment& env, u32 index, u32 offset) {
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return v;
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}
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static inline bool IsAttributeHandle(const ConstBufferAddr& cbuf) {
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return cbuf.index == ATTRIBUTE_HANDLE_CBUF_INDEX;
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}
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static inline u32 GetTextureHandleCached(Environment& env, const ConstBufferAddr& cbuf) {
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// Must all be uniquely different variables
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// If has secondary, then it will be cbuf.secondary_{index|offset}, else its 0.
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@@ -287,14 +291,23 @@ static inline u32 GetTextureHandleCached(Environment& env, const ConstBufferAddr
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// Cached variants of existing helpers
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static inline TextureType ReadTextureTypeCached(Environment& env, const ConstBufferAddr& cbuf) {
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if (IsAttributeHandle(cbuf)) {
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return TextureType::Color2D;
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}
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return env.ReadTextureType(GetTextureHandleCached(env, cbuf));
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}
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static inline TexturePixelFormat ReadTexturePixelFormatCached(Environment& env,
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const ConstBufferAddr& cbuf) {
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if (IsAttributeHandle(cbuf)) {
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return TexturePixelFormat::A8B8G8R8_UNORM;
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}
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return env.ReadTexturePixelFormat(GetTextureHandleCached(env, cbuf));
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}
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static inline bool IsTexturePixelFormatIntegerCached(Environment& env,
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const ConstBufferAddr& cbuf) {
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if (IsAttributeHandle(cbuf)) {
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return false;
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}
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return env.IsTexturePixelFormatInteger(GetTextureHandleCached(env, cbuf));
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}
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@@ -466,15 +479,43 @@ std::optional<ConstBufferAddr> TryGetConstBuffer(const IR::Inst* inst, Environme
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};
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}
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bool IsAttributeSourcedHandle(const IR::Value& handle) {
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if (handle.IsImmediate()) {
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return false;
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}
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const IR::Inst* inst{handle.InstRecursive()};
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if (inst->GetOpcode() == IR::Opcode::BitCastU32F32 && !inst->Arg(0).IsImmediate()) {
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inst = inst->Arg(0).InstRecursive();
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}
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return inst->GetOpcode() == IR::Opcode::GetAttribute ||
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inst->GetOpcode() == IR::Opcode::GetAttributeU32;
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}
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TextureInst MakeInst(Environment& env, IR::Block* block, IR::Inst& inst, const HostTranslateInfo& host_info) {
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ConstBufferAddr addr;
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if (IsBindless(inst)) {
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const std::optional<ConstBufferAddr> track_addr{TrackCached(inst.Arg(0), env, host_info)};
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if (!track_addr) {
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throw NotImplementedException("Failed to track bindless texture constant buffer");
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} else {
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if (track_addr) {
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addr = *track_addr;
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} else if (host_info.support_attribute_texture_handle &&
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IsAttributeSourcedHandle(inst.Arg(0))) {
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// The handle travels with the vertices (sprite batches pick the texture per quad), so
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// there is no constant buffer to read it from. The host binds the handle of each run
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// of vertices that share one.
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addr = ConstBufferAddr{
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.index = ATTRIBUTE_HANDLE_CBUF_INDEX,
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.offset = 0,
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.shift_left = 0,
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.secondary_index = 0,
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.secondary_offset = 0,
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.secondary_shift_left = 0,
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.dynamic_offset = {},
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.count = 1,
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.has_secondary = false,
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};
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} else {
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throw NotImplementedException("Failed to track bindless texture constant buffer");
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}
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} else {
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addr = ConstBufferAddr{
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@@ -38,6 +38,10 @@ enum class TextureType : u32 {
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};
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constexpr u32 NUM_TEXTURE_TYPES = 9;
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/// Constant buffer index marking a texture handle that the shader receives as a vertex attribute
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/// instead of reading it from a constant buffer. The host supplies the handle of each draw run.
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constexpr u32 ATTRIBUTE_HANDLE_CBUF_INDEX = 0xFFFF;
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enum class TexturePixelFormat {
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A8B8G8R8_UNORM,
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A8B8G8R8_SNORM,
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@@ -276,6 +276,9 @@ GraphicsPipeline::GraphicsPipeline(
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num_textures += Shader::NumDescriptors(info->texture_descriptors);
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num_image_elements += Shader::NumDescriptors(info->texture_descriptors);
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num_image_elements += Shader::NumDescriptors(info->image_descriptors);
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for (const auto& desc : info->texture_descriptors) {
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uses_attribute_handle |= desc.cbuf_index == Shader::ATTRIBUTE_HANDLE_CBUF_INDEX;
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}
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num_descriptor_entries += NumDescriptorEntries(*info);
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}
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fragment_has_color0_output = stage_infos[NUM_STAGES - 1].stores_frag_color[0];
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@@ -375,6 +378,9 @@ bool GraphicsPipeline::ConfigureImpl(bool is_indexed) {
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}
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const auto& cbufs{maxwell3d->state.shader_stages[stage].const_buffers};
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const auto read_handle{[&](const auto& desc, u32 index) {
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if (desc.cbuf_index == Shader::ATTRIBUTE_HANDLE_CBUF_INDEX) {
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return TexturePair(attribute_handle, via_header_index);
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}
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ASSERT(cbufs[desc.cbuf_index].enabled);
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const u32 index_offset{index << desc.size_shift};
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const u32 offset{desc.cbuf_offset + index_offset};
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@@ -110,6 +110,16 @@ public:
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return configure_func(this, is_indexed);
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}
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/// True when a shader samples a texture whose handle arrives as a vertex attribute.
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[[nodiscard]] bool UsesAttributeHandle() const noexcept {
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return uses_attribute_handle;
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}
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/// Handle bound to those textures by the next Configure.
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void SetAttributeHandle(u32 handle) noexcept {
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attribute_handle = handle;
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}
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[[nodiscard]] GraphicsPipeline* Next(const GraphicsPipelineCacheKey& current_key) noexcept {
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if (key == current_key) {
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return this;
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@@ -168,6 +178,8 @@ private:
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u32 num_descriptor_entries{};
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size_t num_image_elements{};
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u32 num_textures{};
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u32 attribute_handle{};
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bool uses_attribute_handle{};
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bool fragment_has_color0_output{};
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vk::DescriptorSetLayout descriptor_set_layout;
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@@ -479,6 +479,7 @@ PipelineCache::PipelineCache(Tegra::MaxwellDeviceMemoryManager& device_memory_,
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.support_viewport_index_layer = device.IsExtShaderViewportIndexLayerSupported(),
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.support_geometry_shader_passthrough = device.IsNvGeometryShaderPassthroughSupported(),
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.support_conditional_barrier = device.SupportsConditionalBarriers(),
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.support_attribute_texture_handle = true,
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};
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host_info.ApplyDescriptorLimitPolicy();
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@@ -248,6 +248,15 @@ void RasterizerVulkan::PrepareDraw(bool is_indexed, Func&& draw_func) {
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std::scoped_lock lock{buffer_cache.mutex, texture_cache.mutex};
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// update engine as channel may be different.
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pipeline->SetEngine(maxwell3d, gpu_memory);
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attribute_handle_pipeline = nullptr;
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attribute_handle_runs.clear();
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if (split_attribute_handles && pipeline->UsesAttributeHandle()) {
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CollectAttributeHandleRuns(is_indexed);
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if (!attribute_handle_runs.empty()) {
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attribute_handle_pipeline = pipeline;
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pipeline->SetAttributeHandle(attribute_handle_runs.front().handle);
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}
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}
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if (!pipeline->Configure(is_indexed))
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return;
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@@ -259,22 +268,110 @@ void RasterizerVulkan::PrepareDraw(bool is_indexed, Func&& draw_func) {
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draw_func();
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}
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void RasterizerVulkan::CollectAttributeHandleRuns(bool is_indexed) {
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using VertexAttribute = Maxwell::VertexAttribute;
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const auto& regs = maxwell3d->regs;
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const auto& draw_state = maxwell3d->draw_manager.draw_state;
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const u32 total = is_indexed ? draw_state.index_buffer.count : draw_state.vertex_buffer.count;
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if (total == 0) {
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return;
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}
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// The handle is an integer attribute; sprite batches repeat it on every vertex of a quad.
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const VertexAttribute* source{};
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for (const auto& attr : regs.vertex_attrib_format) {
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if (attr.constant || attr.size == VertexAttribute::Size::Invalid) {
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continue;
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}
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if (attr.type == VertexAttribute::Type::UInt || attr.type == VertexAttribute::Type::SInt) {
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source = &attr;
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break;
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}
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}
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const auto& stream = regs.vertex_streams[source ? source->buffer.Value() : 0];
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if (!source || !stream.IsEnabled()) {
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attribute_handle_runs.push_back({0, total, 0});
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return;
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}
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// Only plain triangle lists are split; anything else keeps the handle of its first vertex.
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const u32 primitive_size =
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draw_state.topology == Maxwell::PrimitiveTopology::Triangles ? 3 : total;
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const GPUVAddr base_address = stream.Address() + source->offset;
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const auto read_handle = [&](u32 position) {
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u32 vertex;
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if (is_indexed) {
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const auto& index_buffer = draw_state.index_buffer;
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const GPUVAddr address =
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index_buffer.IndexStart() + size_t{position} * index_buffer.FormatSizeInBytes();
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u32 index{};
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gpu_memory->ReadBlockUnsafe(address, &index, index_buffer.FormatSizeInBytes());
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vertex = static_cast<u32>(draw_state.base_index + index);
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} else {
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vertex = draw_state.vertex_buffer.first + position;
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}
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return gpu_memory->Read<u32>(base_address + static_cast<GPUVAddr>(vertex) * stream.stride);
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};
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for (u32 position = 0; position + primitive_size <= total; position += primitive_size) {
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const u32 handle = read_handle(position);
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if (!attribute_handle_runs.empty() && attribute_handle_runs.back().handle == handle) {
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attribute_handle_runs.back().count += primitive_size;
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} else {
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attribute_handle_runs.push_back({position, primitive_size, handle});
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}
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}
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if (attribute_handle_runs.empty()) {
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attribute_handle_runs.push_back({0, total, read_handle(0)});
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} else {
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const u32 covered = attribute_handle_runs.back().first + attribute_handle_runs.back().count;
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if (covered < total) {
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attribute_handle_runs.back().count += total - covered;
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}
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}
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}
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void RasterizerVulkan::Draw(bool is_indexed, u32 instance_count) {
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split_attribute_handles = true;
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SCOPE_EXIT {
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split_attribute_handles = false;
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};
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PrepareDraw(is_indexed, [this, is_indexed, instance_count] {
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const auto& draw_state = maxwell3d->draw_manager.draw_state;
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const u32 num_instances{instance_count};
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const DrawParams draw_params{MakeDrawParams(draw_state, num_instances, is_indexed)};
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scheduler.Record([draw_params](vk::CommandBuffer cmdbuf) {
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if (draw_params.is_indexed) {
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cmdbuf.DrawIndexed(draw_params.num_vertices, draw_params.num_instances,
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draw_params.first_index, draw_params.base_vertex,
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draw_params.base_instance);
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} else {
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cmdbuf.Draw(draw_params.num_vertices, draw_params.num_instances,
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draw_params.base_vertex, draw_params.base_instance);
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const auto record_draw = [this](const DrawParams& params) {
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scheduler.Record([params](vk::CommandBuffer cmdbuf) {
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if (params.is_indexed) {
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cmdbuf.DrawIndexed(params.num_vertices, params.num_instances,
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params.first_index, params.base_vertex,
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params.base_instance);
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} else {
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cmdbuf.Draw(params.num_vertices, params.num_instances, params.base_vertex,
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params.base_instance);
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}
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});
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};
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if (attribute_handle_pipeline && attribute_handle_runs.size() > 1) {
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// The first run is already configured, each further one binds its own texture.
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for (size_t i = 0; i < attribute_handle_runs.size(); ++i) {
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const AttributeHandleRun& run = attribute_handle_runs[i];
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if (i != 0) {
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attribute_handle_pipeline->SetAttributeHandle(run.handle);
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if (!attribute_handle_pipeline->Configure(is_indexed)) {
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continue;
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}
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}
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DrawParams run_params = draw_params;
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run_params.num_vertices = run.count;
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if (is_indexed) {
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run_params.first_index += run.first;
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} else {
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run_params.base_vertex += run.first;
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}
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record_draw(run_params);
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}
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});
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} else {
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record_draw(draw_params);
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}
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// Log draw call
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if (GPU::Logging::IsActive() &&
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@@ -157,6 +157,20 @@ private:
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template <typename Func>
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void PrepareDraw(bool is_indexed, Func&&);
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/// A stretch of a draw whose vertices all carry the same texture handle.
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struct AttributeHandleRun {
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u32 first;
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u32 count;
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u32 handle;
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};
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/// Splits the current draw wherever the texture handle carried in the vertex data changes.
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void CollectAttributeHandleRuns(bool is_indexed);
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std::vector<AttributeHandleRun> attribute_handle_runs;
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GraphicsPipeline* attribute_handle_pipeline{};
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bool split_attribute_handles{};
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void FlushWork();
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void UpdateDynamicStates();
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