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| Author | SHA1 | Date | |
|---|---|---|---|
| 95b8c38b39 |
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- [ ] I have read and followed the [Contribution Guidelines](https://git.eden-emu.dev/eden-emu/eden/src/branch/master/CONTRIBUTING.md#code-contributions).
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- [ ] I have read and followed the [Contribution Guidelines](https://git.eden-emu.dev/eden-emu/eden/src/branch/master/CONTRIBUTING.md#code-contributions).
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- [ ] I have read and followed the [AI Policy](https://git.eden-emu.dev/eden-emu/eden/src/branch/master/docs/policies/AI.md).
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- [ ] I have read and followed the [AI Policy](https://git.eden-emu.dev/eden-emu/eden/src/branch/master/docs/policies/AI.md)
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- [ ] I have read and followed the [Coding Guidelines](https://git.eden-emu.dev/eden-emu/eden/src/branch/master/docs/policies/Coding.md) to the best of my ability.
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- [ ] I have read and followed the [Coding Guidelines](https://git.eden-emu.dev/eden-emu/eden/src/branch/master/docs/policies/Coding.md) to the best of my ability.
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-------------------
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-------------------
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# AGENTS
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AI and LLM use is *strictly* prohibited within our codebase and surrounding community, including issues and comments. This includes using AI or LLMs to write docs/commit messages, debug issues, brainstorm ideas, research concepts, or search the codebase.
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Read and follow the AI policy found in `docs/policies/AI.md`, and the coding policies found in `docs/policies/Coding.md`.
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Do not, under any circumstances, ever submit PRs or push commits on behalf of the user.
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Keep comments to a reasonable level. Do not overexplain or add/remove comments from unrelated parts of the codebase.
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AI and LLM use is *strictly* prohibited within our codebase and surrounding community, including issues and comments. This includes using AI or LLMs to write docs/commit messages, debug issues, brainstorm ideas, research concepts, or search the codebase.
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# Contributing
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# Contributing
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<!--
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This document is not to be perused by AI models.
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-->
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Eden has lots of different ways that you can contribute to its efforts, even without knowing how to write code:
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Eden has lots of different ways that you can contribute to its efforts, even without knowing how to write code:
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- Donate! This will help us live our lives, pay for infrastructure/testing hardware, and more
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- Donate! This will help us live our lives, pay for infrastructure/testing hardware, and more
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@@ -16,7 +20,8 @@ Eden is free, open-source, copyleft software, licensed under the terms of the [G
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### Policies
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### Policies
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- We are trialing a slightly relaxed AI policy to allow high-quality contributors to use AI *responsibly*. Please read our [detailed AI policy](docs/policies/AI.md) for more info.
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- No LLM or AI usage, *period*, for patches, pull requests, issues, comments, debugging, brainstorming, etc.
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- For details on why, see the [detailed AI policy](docs/policies/AI.md).
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- Usage of any form of profanity or otherwise unsavory language is generally discouraged.
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- Usage of any form of profanity or otherwise unsavory language is generally discouraged.
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- This is primarily because it rarely helps to actually understand what's going on.
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- This is primarily because it rarely helps to actually understand what's going on.
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- Remember that your comments should be focused and actually address what's happening. With very few exceptions, expletives are actively detrimental at best.
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- Remember that your comments should be focused and actually address what's happening. With very few exceptions, expletives are actively detrimental at best.
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# AI Policy
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# AI Policy
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> [!WARNING]
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AI and LLM use is *strictly* prohibited within our codebase and surrounding community, including issues and comments. This includes using AI or LLMs to write docs/commit messages, debug issues, brainstorm ideas, research concepts, or search the codebase.
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> We are trialing a slightly relaxed AI policy to allow high-quality contributors to use AI *responsibly*.
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> This policy is subject to change at any point in time, so check back frequently.
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>
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> This banner will be removed once we have finalized our revised policy.
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- [AI Policy](#ai-policy)
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- [AI Policy](#ai-policy)
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- [TL;DR](#tldr)
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- [Low-quality code](#low-quality-code)
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- [Definitions](#definitions)
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- [Licensing concerns](#licensing-concerns)
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- [Scope](#scope)
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- [Vibe-coding](#vibe-coding)
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- [Introduction](#introduction)
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- [Commit messages](#commit-messages)
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||||||
- [Requirements](#requirements)
|
- [Miscellaneous concerns](#miscellaneous-concerns)
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||||||
- [Sign-off, Authorship, and Copyright](#sign-off-authorship-and-copyright)
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- [Unacceptable Use Examples](#unacceptable-use-examples)
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||||||
- [Permitted Usage](#permitted-usage)
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- [Addendum: Commit Messages](#addendum-commit-messages)
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- [Recommended Prior Discussion](#recommended-prior-discussion)
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- [Forbidden Usage](#forbidden-usage)
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- [Human Effort Denial of Service](#human-effort-denial-of-service)
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- [Disclosure](#disclosure)
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- [Codebase Ingestion](#codebase-ingestion)
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- [Enforcement](#enforcement)
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- [Addendum: AI Commit Messages](#addendum-ai-commit-messages)
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- [References](#references)
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## TL;DR
|
## Low-quality code
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AI-assisted contributions are welcome, provided you take responsibility for them.
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AI is notorious for producing low-quality code; be it:
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|
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||||||
- You **must** disclose any AI or LLM usage in your pull request description *and* commit message.
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- nonfunctional,
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- You **must** be able to explain, defend, and revise every line of code you submit.
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- verbose/inefficient,
|
||||||
- Commit messages, PR descriptions, issues, and comments **must** be written by you. Verbatim AI output is not acceptable.
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- breaking other parts of the codebase,
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- Undisclosed AI usage will result in your contribution being rejected.
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- or writing/architecting in a completely different style
|
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- Low-quality contributions, disclosed or not, will be reworked or rejected.
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- Spamming automated PRs, comments, or issues is treated as a Denial of Service (DoS) attack on our reviewers; see [Human Effort Denial of Service](#human-effort-denial-of-service).
|
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|
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## Definitions
|
All code, AI or not, is held under a **strict standard of excellence**. AI/LLM-generated code will fail this test 10 times out of 10.
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An *AI or LLM-based tool* is any piece of software that generates code, text, or other content through machine learning models. This includes, but is not limited to: chat assistants, agentic coding tools/harnesses, inline code completion suggestions you have accepted into the code, and AI-driven explanation/refactoring features.
|
## Licensing concerns
|
||||||
|
|
||||||
For the purposes of this policy, basic deterministic/static development tools (such as clang-tidy, git, compilers, etc.) are not considered AI tools.
|
This is an area of ongoing litigation, and as such, is still very iffy. For the time being, know that allowing AI to ingest the codebase may end up with its copyleft code regurgitated into incompatibly-licensed proprietary or permissive software. For you, this means to **not** feed code into LLMs.
|
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Terms such as "substantially", "large-scale", "majority", and "low-quality" are intentionally left vague, and will be interpreted at the maintainers' discretion. When in doubt, ask first.
|
AI models may have also ingested AGPLv3 code, which is license-incompatible with our codebase.
|
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|
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## Scope
|
## Vibe-coding
|
||||||
|
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||||||
This policy applies to all code contributions, alongside issues and pull requests surrounding this codebase. This includes:
|
Just don't. If you're not going to put the effort in to understand every line of code you wrote, neither will we, and your patch or pull request will be ignored.
|
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- Commit messages
|
## Commit messages
|
||||||
- PR descriptions
|
|
||||||
- Code review comments
|
|
||||||
- Issue/PR comments
|
|
||||||
- Patches submitted via e-mail
|
|
||||||
|
|
||||||
Areas that are not directly related to code--such as our surrounding communities--are not covered by the terms of this policy. Additionally, spelling/grammar checking via AI or LLM-based tools is not covered under this document.
|
AI-generated commit messages are absolutely terrible, and your pull request or patch will immediately be rejected if you choose to do this. They are, quite simply, actively detrimental to our understanding of your changes, and if you're not willing to summarize the intent behind your changes, then we're not going to bother reading the code you wrote.
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||||||
## Introduction
|
Write concise, simple, and descriptive commit messages that actually convey the proper intent behind what your change is trying to do.
|
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||||||
In the right hands, AI and LLM-based tools are incredibly useful for getting features and bugfixes out the door as fast as possible. At the same time, reviewer bandwidth is a scarce resource. We are therefore open to AI-assisted contributions, provided they are produced and disclosed properly.
|
See the [Addendum](#addendum-commit-messages) for an instance of how bad AI models are at commit messages.
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||||||
The goal of this document is *not* to set arbitrary restrictions, but rather to keep our development healthy and stable, while still allowing contributors to use the tools they find helpful. A contribution must be worth more to the project than the time it takes to review it.
|
## Miscellaneous concerns
|
||||||
|
|
||||||
Throughout this document, **must** and **must not** are inflexible, binding requirements. Refusal to follow these is treated as a violation of the terms outlined in this document.
|
- While many environmental concerns about AI are typically blown out of proportion, it *is* a legitimate issue, and should be taken into account.
|
||||||
|
- Many people have significant concerns over the ethics of AI usage due to inhumane and predatory behavior by large AI companies, particularly Anthropic and OpenAI. This can technically be avoided through the usage of local LLMs.
|
||||||
|
- LLMs have a tendency to add unicode characters (such as the arrow → and the em-dash — symbols) to their output, which can make viewing code or documents harder on command-line editors and viewers.
|
||||||
|
- Dedicated coding models--namely Claude--also like to add a lot of comments to overexplain every individual line of code it produces. This actually makes it *harder* to understand the code!
|
||||||
|
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||||||
## Requirements
|
## Unacceptable Use Examples
|
||||||
|
|
||||||
These apply to all contributions, whether AI-assisted or not. AI-assisted contributions also carry additional disclosure requirements as outlined in [Disclosure](#disclosure).
|
Here are a few examples of unacceptable use:
|
||||||
|
|
||||||
1. *Disclosure*. Any and all usage of AI or LLM-based tools within any contribution **must** be explicitly marked and disclosed as appropriate.
|
- Solving problems
|
||||||
2. *Responsibility*. The human submitter of any contribution is held wholly responsible for the accuracy, completeness, and intent of what is submitted. You **must** be able to explain, defend, and revise your code during review.
|
- Slapping a few files and a "please fix bug XYZ" into an LLM is a recipe for disaster that will pretty much never work.
|
||||||
3. *Review*. All code **must** be thoroughly reviewed by the author before opening a PR or marking it ready for review.
|
- Fully AI-generated code, aka "vibecoding"
|
||||||
4. *Testing*. All code changes **must** be tested directly by the human author.
|
- Writing code based on pseudo-instructions
|
||||||
5. *Quality*. All submitted code is held to a strict standard of excellence. Low-quality AI-generated content does not uphold this standard.
|
- If you don't know how to write code, don't. If you've figured out the root cause (preferably without feeding random files into an LLM) and actively know what's going on, provide information to other developers or friends of yours who have knowledge of the language and/or the codebase.
|
||||||
6. *Licensing*. All code **must** be compatible with the GPLv3 or later. You **must** warrant that you have the right to submit it under those terms, and that it was not copied from work published under an incompatible license.
|
|
||||||
|
|
||||||
## Sign-off, Authorship, and Copyright
|
## Addendum: Commit Messages
|
||||||
|
|
||||||
AI agents **must not** add `Signed-off-by:` tags. The human submitter **must** sign off on all changes.
|
The patchset for pull request [#3422](https://git.eden-emu.dev/eden-emu/eden/pulls/3422) was fed into several LLMs to generate a commit message. One LLM produced the following:
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||||||
|
|
||||||
Similarly, AI agents cannot hold authorship or copyright over code, and **must not** add `Co-authored-by:` or `Co-developed-by:` tags. The human submitter **must** author all changes.
|
|
||||||
|
|
||||||
## Permitted Usage
|
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||||||
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|
||||||
This is a non-exhaustive list of permitted uses of AI and LLM-based tools, provided they are disclosed properly.
|
|
||||||
|
|
||||||
- Drafting issues and pull requests, provided the final text and submitted code are substantially your own.
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|
||||||
- Debugging issues, bugs, glitches, and crashes, whether pre-existing or introduced by your own changes.
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|
||||||
- Reviewing your own changes before submitting a PR.
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|
||||||
- Research, brainstorming, and codebase searching/understanding.
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|
||||||
- Applying tedious but not particularly large changes, such as mass-migrating specific classes to polyfills or abstractions.
|
|
||||||
|
|
||||||
## Recommended Prior Discussion
|
|
||||||
|
|
||||||
Some usage cases are not necessarily forbidden nor permitted. These should be discussed with maintainers in an issue or e-mail *before* submission. Maintainers and reviewers may also comment on this during the review/submission phase.
|
|
||||||
|
|
||||||
- Generating boilerplate/scaffolding for new code.
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|
||||||
- Writing unit tests.
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|
||||||
- Large-scale refactors primarily driven by an AI agent.
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|
||||||
- Any contribution where an AI agent or model was responsible for the majority of the implementation.
|
|
||||||
|
|
||||||
## Forbidden Usage
|
|
||||||
|
|
||||||
This is a non-exhaustive list of strictly forbidden uses of AI and LLM-based tools.
|
|
||||||
|
|
||||||
- Vibecoding, or changes entirely authored by AI agents without human intervention or understanding.
|
|
||||||
- If you don't choose to put in the necessary effort to understand every line of code you submitted, neither will we.
|
|
||||||
- Fully AI-generated commit messages, PR descriptions, issues, or comments. See [Addendum: AI Commit Messages](#addendum-ai-commit-messages).
|
|
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- Submission of AI-assisted work that is not disclosed per the [Disclosure](#disclosure) requirements.
|
|
||||||
- Low-quality submissions that fail to satisfy our standard of code excellence.
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|
||||||
- Submitting secrets, credentials, private user data, or unpublished security reports to third-party AI services.
|
|
||||||
- This includes console keys, encryption material, and private vulnerability disclosures.
|
|
||||||
- Verbatim AI code reviews (e.g. Codex/Copilot reviews).
|
|
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|
|
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## Human Effort Denial of Service
|
|
||||||
|
|
||||||
Using automated tools and AI to submit PRs, issues, and comments that we have to carefully review and handle is considered a [Denial-of-service attack](https://en.wikipedia.org/wiki/Denial-of-service_attack) on our human effort.
|
|
||||||
|
|
||||||
It takes very little effort on your side (an LLM prompt) to generate a large amount of effort on ours (careful and thorough code review). Please respect our time and don't do that.
|
|
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|
|
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## Disclosure
|
|
||||||
|
|
||||||
How you disclose AI usage is up to you. However, it **must** be explicit, easy to identify, and placed both within the commit message *and* the surrounding PR description. For patches submitted by e-mail, the cover letter counts as the PR description. We recommend an `Assisted-by:` footer:
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||||||
|
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||||||
```txt
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|
||||||
Assisted-by: <model> (<what it was used for>)
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|
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```
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|
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|
|
||||||
For instance:
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|
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|
|
||||||
```txt
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|
||||||
Assisted-by: Claude Opus 5.5 (initial draft and code review)
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|
||||||
```
|
|
||||||
|
|
||||||
Contributions without a commit message (e.g. issues/comments) should instead use a plain sentence in the text body such as `I used <model> to help with <X>`. PRs and commit messages may opt to use this format as well.
|
|
||||||
|
|
||||||
Multi-commit series/squashes **must** maintain the trailer. Maintainers will handle this for merges to master, but you are responsible for ensuring the disclosure survives into the final commit/PR body of squashes within your branches.
|
|
||||||
|
|
||||||
Regardless, what matters is that reviewers can tell *at a glance* where and how AI was involved in your contribution.
|
|
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|
|
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## Codebase Ingestion
|
|
||||||
|
|
||||||
Ingestion of this codebase by LLMs for any purpose--such as training or prompt context--is permitted *for now*. This may change at any point as litigation and court rulings around AI and code copyright proceed.
|
|
||||||
|
|
||||||
AI models may have ingested AGPLv3 or otherwise copyleft-incompatible code and may regurgitate it. You remain responsible for ensuring that all code you submit is compatible with the GPLv3 or later.
|
|
||||||
|
|
||||||
## Enforcement
|
|
||||||
|
|
||||||
- If we suspect undisclosed AI usage in a contribution, we will ask for disclosure.
|
|
||||||
- Refusal to provide disclosure will result in rejection of the contribution, and your PR or issue will be closed. Maintainers may choose to rework it themselves if the change is worth having.
|
|
||||||
- Accounts that spam us with repeated automated PRs or comments will be blocked or permanently suspended from our Git instance.
|
|
||||||
- Maintainers reserve the right to close your issues and pull requests if you don't follow the guidelines and procedures outlined in this document, and refuse or fail to make changes as necessary to comply.
|
|
||||||
- Repeated failures to comply may result in loss of contribution privileges.
|
|
||||||
|
|
||||||
## Addendum: AI Commit Messages
|
|
||||||
|
|
||||||
The patchset for pull request [#3422](https://git.eden-emu.dev/eden-emu/eden/pulls/3422) was fed into a dedicated code AI model, and it produced the following:
|
|
||||||
|
|
||||||
```txt
|
```txt
|
||||||
profile_manager: Refactor user deletion to use index instead of UUID
|
profile_manager: Refactor user deletion to use index instead of UUID
|
||||||
@@ -183,21 +89,28 @@ These changes eliminate redundant code, reduce the risk of UUID → index mismat
|
|||||||
Fixes: potential inconsistency when user order changes between UI and backend
|
Fixes: potential inconsistency when user order changes between UI and backend
|
||||||
```
|
```
|
||||||
|
|
||||||
This:
|
This is:
|
||||||
|
|
||||||
- Is needlessly verbose (nobody cares about most of these details)
|
- Needlessly verbose (nobody cares about most of these details)
|
||||||
- Doesn't address the actual purpose of the PR (fixing a double-deletion bug in the profile manager)
|
- Doesn't address the actual purpose of the PR (fixing a double-deletion bug in the profile manager)
|
||||||
- Has unicode arrows (this is bad for command-line editors)
|
- Has unicode arrows (this is bad for command-line editors)
|
||||||
- Uses corporate and word-salad language that pads out the message to make it look like a lot changed
|
- Uses corporate and word-salad language
|
||||||
|
|
||||||
A good commit message should be concise, descriptive, and convey the *intent* behind the change, such as the bug being fixed or the feature being added. It should *not* be a detailed changelog of every individual byte that's changed.
|
Another (code-oriented) LLM output the following:
|
||||||
|
|
||||||
## References
|
```txt
|
||||||
|
profile(manager/ui): switch to index-based deletion and unify removal logic
|
||||||
|
|
||||||
This policy document has been adapted from the AI policies of numerous other free and open-source projects, whether restrictive or permissive.
|
- Make ConfigureProfileManagerDeleteDialog emit a deleteUser(int) signal instead of taking a callback. Store the target index in the dialog (m_index) and emit it on acceptance.
|
||||||
|
- Change ConfigureProfileManager to pass an index to SetInfo and to accept an index in DeleteUser. Wire the dialog signal to the new DeleteUser slot.
|
||||||
|
- Update headers: add the signal and m_index, add TODO to move dialog to a .ui file, and update slot/signature declarations.
|
||||||
|
- Add ProfileManager::RemoveProfileAtIndex(std::size_t) and refactor RemoveUser(UUID) to call RemoveProfileAtIndex to avoid duplicated removal logic. Ensure the removal path marks saves as needed and writes the user save file.
|
||||||
|
- Ensure the profile list updates immediately after deletes by calling profile_manager.ResetUserSaveFile() when populating the user list (qlaunch fix).
|
||||||
|
- Misc: update SPDX copyright year and fix build breakages caused by the API changes.
|
||||||
|
|
||||||
- [Gitea](https://github.com/go-gitea/gitea/blob/main/CONTRIBUTING.md#ai-contribution-policy)
|
This consolidates profile removal behavior, fixes potential race conditions in the profile dialog, and removes duplicated removal code.
|
||||||
- The [Linux kernel](https://kernel.org/doc/html/next/process/coding-assistants.html)
|
```
|
||||||
- [Gentoo Linux](https://wiki.gentoo.org/wiki/Project:Council/AI_policy)
|
|
||||||
- [cURL](https://curl.se/dev/contribute.html#on-ai-use-in-curl)
|
This has all of the same problems as the other one. Needlessly verbose, doesn't address *what* it actually fixes ("consolidates profile removal behavior"... okay, why? What does it fix?), etc. It even has the bonus of totally hallucinating the addition of a method!
|
||||||
- [FastAPI](https://tiangolo.com/open-source/contributing/#automated-code-and-ai)
|
|
||||||
|
On a more "philosophical" note, LLMs tend to be geared towards *corporate language*, as that's what they're trained on. This is why AI-generated commit messages feel like "word salad", and typically pad out the commit message to make it *look* like a lot of things were changed (trust me, it's like that in the corporate world). They typically also drift towards unneeded buzzwords and useless implementation details.
|
||||||
|
|||||||
@@ -172,7 +172,6 @@ add_library(shader_recompiler STATIC
|
|||||||
ir_opt/constant_propagation_pass.cpp
|
ir_opt/constant_propagation_pass.cpp
|
||||||
ir_opt/dead_code_elimination_pass.cpp
|
ir_opt/dead_code_elimination_pass.cpp
|
||||||
ir_opt/dual_vertex_pass.cpp
|
ir_opt/dual_vertex_pass.cpp
|
||||||
ir_opt/geometry_compaction_pass.cpp
|
|
||||||
ir_opt/global_memory_to_storage_buffer_pass.cpp
|
ir_opt/global_memory_to_storage_buffer_pass.cpp
|
||||||
ir_opt/identity_removal_pass.cpp
|
ir_opt/identity_removal_pass.cpp
|
||||||
ir_opt/layer_pass.cpp
|
ir_opt/layer_pass.cpp
|
||||||
|
|||||||
@@ -4,7 +4,6 @@
|
|||||||
// SPDX-FileCopyrightText: Copyright 2021 yuzu Emulator Project
|
// SPDX-FileCopyrightText: Copyright 2021 yuzu Emulator Project
|
||||||
// SPDX-License-Identifier: GPL-2.0-or-later
|
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||||
|
|
||||||
#include <algorithm>
|
|
||||||
#include <span>
|
#include <span>
|
||||||
#include <tuple>
|
#include <tuple>
|
||||||
#include <type_traits>
|
#include <type_traits>
|
||||||
@@ -440,13 +439,10 @@ void SetupCapabilities(const Profile& profile, const Info& info, EmitContext& ct
|
|||||||
ctx.AddCapability(spv::Capability::DrawParameters);
|
ctx.AddCapability(spv::Capability::DrawParameters);
|
||||||
}
|
}
|
||||||
if ((info.uses_subgroup_vote || info.uses_subgroup_invocation_id ||
|
if ((info.uses_subgroup_vote || info.uses_subgroup_invocation_id ||
|
||||||
info.uses_subgroup_shuffles || info.uses_subgroup_mask) &&
|
info.uses_subgroup_shuffles) &&
|
||||||
profile.support_vote && profile.SupportsSubgroupStage(ctx.stage)) {
|
profile.support_vote && profile.SupportsSubgroupStage(ctx.stage)) {
|
||||||
ctx.AddCapability(spv::Capability::GroupNonUniformBallot);
|
ctx.AddCapability(spv::Capability::GroupNonUniformBallot);
|
||||||
ctx.AddCapability(spv::Capability::GroupNonUniformShuffle);
|
ctx.AddCapability(spv::Capability::GroupNonUniformShuffle);
|
||||||
if (info.uses_subgroup_shuffles && profile.support_shuffle_relative) {
|
|
||||||
ctx.AddCapability(spv::Capability::GroupNonUniformShuffleRelative);
|
|
||||||
}
|
|
||||||
if (!profile.warp_size_potentially_larger_than_guest) {
|
if (!profile.warp_size_potentially_larger_than_guest) {
|
||||||
// vote ops are only used when not taking the long path
|
// vote ops are only used when not taking the long path
|
||||||
ctx.AddCapability(spv::Capability::GroupNonUniformVote);
|
ctx.AddCapability(spv::Capability::GroupNonUniformVote);
|
||||||
@@ -525,29 +521,6 @@ void PatchPhiNodes(IR::Program& program, EmitContext& ctx) {
|
|||||||
return { ctx.Def(phi->Arg(phi_arg)), parent };
|
return { ctx.Def(phi->Arg(phi_arg)), parent };
|
||||||
});
|
});
|
||||||
}
|
}
|
||||||
|
|
||||||
void RewriteOpcodes(std::vector<u32>& code, std::span<const std::pair<u32, spv::Op>> rewrites) {
|
|
||||||
if (rewrites.empty()) {
|
|
||||||
return;
|
|
||||||
}
|
|
||||||
size_t offset = 5;
|
|
||||||
while (offset + 2 < code.size()) {
|
|
||||||
const u32 word_count{code[offset] >> 16};
|
|
||||||
const auto opcode{static_cast<spv::Op>(code[offset] & 0xFFFFu)};
|
|
||||||
if (word_count == 0) {
|
|
||||||
return;
|
|
||||||
}
|
|
||||||
if (opcode == spv::Op::OpGroupNonUniformShuffleXor ||
|
|
||||||
opcode == spv::Op::OpGroupNonUniformQuadBroadcast) {
|
|
||||||
const auto it{std::ranges::find(rewrites, code[offset + 2],
|
|
||||||
&std::pair<u32, spv::Op>::first)};
|
|
||||||
if (it != rewrites.end()) {
|
|
||||||
code[offset] = (code[offset] & 0xFFFF0000u) | static_cast<u32>(it->second);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
offset += word_count;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
} // Anonymous namespace
|
} // Anonymous namespace
|
||||||
|
|
||||||
std::vector<u32> EmitSPIRV(const Profile& profile, const RuntimeInfo& runtime_info, IR::Program& program, Bindings& bindings) {
|
std::vector<u32> EmitSPIRV(const Profile& profile, const RuntimeInfo& runtime_info, IR::Program& program, Bindings& bindings) {
|
||||||
@@ -562,9 +535,7 @@ std::vector<u32> EmitSPIRV(const Profile& profile, const RuntimeInfo& runtime_in
|
|||||||
SetupCapabilities(profile, program.info, ctx);
|
SetupCapabilities(profile, program.info, ctx);
|
||||||
SetupTransformFeedbackCapabilities(ctx, main);
|
SetupTransformFeedbackCapabilities(ctx, main);
|
||||||
PatchPhiNodes(program, ctx);
|
PatchPhiNodes(program, ctx);
|
||||||
std::vector<u32> code{ctx.Assemble()};
|
return ctx.Assemble();
|
||||||
RewriteOpcodes(code, ctx.opcode_rewrites);
|
|
||||||
return code;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
Id EmitPhi(EmitContext& ctx, IR::Inst* inst) {
|
Id EmitPhi(EmitContext& ctx, IR::Inst* inst) {
|
||||||
|
|||||||
@@ -77,57 +77,20 @@ Id GetMaxThreadId(EmitContext& ctx, Id thread_id, Id clamp, Id segmentation_mask
|
|||||||
return ComputeMaxThreadId(ctx, min_thread_id, clamp, not_seg_mask);
|
return ComputeMaxThreadId(ctx, min_thread_id, clamp, not_seg_mask);
|
||||||
}
|
}
|
||||||
|
|
||||||
Id HostThreadId(EmitContext& ctx, Id thread_id) {
|
Id SelectValue(EmitContext& ctx, Id in_range, Id value, Id src_thread_id) {
|
||||||
if (!ctx.profile.warp_size_potentially_larger_than_guest) {
|
if (!StageSupportsSubgroups(ctx)) {
|
||||||
return thread_id;
|
return value;
|
||||||
}
|
}
|
||||||
|
return ctx.OpSelect(
|
||||||
|
ctx.U32[1], in_range,
|
||||||
|
ctx.OpGroupNonUniformShuffle(ctx.U32[1], SubgroupScope(ctx), value, src_thread_id), value);
|
||||||
|
}
|
||||||
|
|
||||||
|
Id AddPartitionBase(EmitContext& ctx, Id thread_id) {
|
||||||
const Id partition_idx{ctx.OpShiftRightLogical(ctx.U32[1], GetThreadId(ctx), ctx.Const(5u))};
|
const Id partition_idx{ctx.OpShiftRightLogical(ctx.U32[1], GetThreadId(ctx), ctx.Const(5u))};
|
||||||
const Id partition_base{ctx.OpShiftLeftLogical(ctx.U32[1], partition_idx, ctx.Const(5u))};
|
const Id partition_base{ctx.OpShiftLeftLogical(ctx.U32[1], partition_idx, ctx.Const(5u))};
|
||||||
return ctx.OpIAdd(ctx.U32[1], thread_id, partition_base);
|
return ctx.OpIAdd(ctx.U32[1], thread_id, partition_base);
|
||||||
}
|
}
|
||||||
|
|
||||||
Id GuestLane(EmitContext& ctx, Id index) {
|
|
||||||
return ctx.OpBitwiseAnd(ctx.U32[1], index, ctx.Const(31U));
|
|
||||||
}
|
|
||||||
|
|
||||||
Id ShuffleAbsolute(EmitContext& ctx, Id value, Id src_thread_id) {
|
|
||||||
if (!ctx.profile.has_broken_spirv_subgroup_shuffle) {
|
|
||||||
return ctx.OpGroupNonUniformShuffle(ctx.U32[1], SubgroupScope(ctx), value, src_thread_id);
|
|
||||||
}
|
|
||||||
Id result{ctx.u32_zero_value};
|
|
||||||
for (u32 lane = 0; lane < ctx.profile.max_subgroup_size; ++lane) {
|
|
||||||
const Id read{
|
|
||||||
ctx.OpGroupNonUniformBroadcast(ctx.U32[1], SubgroupScope(ctx), value, ctx.Const(lane))};
|
|
||||||
const Id matches{ctx.OpIEqual(ctx.U1, src_thread_id, ctx.Const(lane))};
|
|
||||||
result = ctx.OpSelect(ctx.U32[1], matches, read, result);
|
|
||||||
}
|
|
||||||
return result;
|
|
||||||
}
|
|
||||||
|
|
||||||
Id ShuffleRelative(EmitContext& ctx, Id value, Id delta, Id src_thread_id, spv::Op op) {
|
|
||||||
if (!ctx.profile.support_shuffle_relative) {
|
|
||||||
return ShuffleAbsolute(ctx, value, HostThreadId(ctx, src_thread_id));
|
|
||||||
}
|
|
||||||
const Id result{ctx.OpGroupNonUniformShuffleXor(ctx.U32[1], SubgroupScope(ctx), value, delta)};
|
|
||||||
ctx.opcode_rewrites.emplace_back(result.value, op);
|
|
||||||
return result;
|
|
||||||
}
|
|
||||||
|
|
||||||
Id BroadcastLane(EmitContext& ctx, Id value, u32 lane) {
|
|
||||||
Id result{
|
|
||||||
ctx.OpGroupNonUniformBroadcast(ctx.U32[1], SubgroupScope(ctx), value, ctx.Const(lane))};
|
|
||||||
if (!ctx.profile.warp_size_potentially_larger_than_guest) {
|
|
||||||
return result;
|
|
||||||
}
|
|
||||||
const Id partition_idx{ctx.OpShiftRightLogical(ctx.U32[1], GetThreadId(ctx), ctx.Const(5u))};
|
|
||||||
for (u32 base = 32; base < ctx.profile.max_subgroup_size; base += 32) {
|
|
||||||
const Id read{ctx.OpGroupNonUniformBroadcast(ctx.U32[1], SubgroupScope(ctx), value,
|
|
||||||
ctx.Const(base + lane))};
|
|
||||||
const Id matches{ctx.OpIEqual(ctx.U1, partition_idx, ctx.Const(base >> 5))};
|
|
||||||
result = ctx.OpSelect(ctx.U32[1], matches, read, result);
|
|
||||||
}
|
|
||||||
return result;
|
|
||||||
}
|
|
||||||
} // Anonymous namespace
|
} // Anonymous namespace
|
||||||
|
|
||||||
Id EmitLaneId(EmitContext& ctx) {
|
Id EmitLaneId(EmitContext& ctx) {
|
||||||
@@ -240,75 +203,61 @@ Id EmitShuffleIndex(EmitContext& ctx, IR::Inst* inst, Id value, Id index, Id cla
|
|||||||
const Id min_thread_id{ComputeMinThreadId(ctx, thread_id, segmentation_mask)};
|
const Id min_thread_id{ComputeMinThreadId(ctx, thread_id, segmentation_mask)};
|
||||||
const Id max_thread_id{ComputeMaxThreadId(ctx, min_thread_id, clamp, not_seg_mask)};
|
const Id max_thread_id{ComputeMaxThreadId(ctx, min_thread_id, clamp, not_seg_mask)};
|
||||||
|
|
||||||
const Id lhs{ctx.OpBitwiseAnd(ctx.U32[1], GuestLane(ctx, index), not_seg_mask)};
|
const Id lhs{ctx.OpBitwiseAnd(ctx.U32[1], index, not_seg_mask)};
|
||||||
const Id src_thread_id{ctx.OpBitwiseOr(ctx.U32[1], lhs, min_thread_id)};
|
Id src_thread_id{ctx.OpBitwiseOr(ctx.U32[1], lhs, min_thread_id)};
|
||||||
const Id in_range{ctx.OpSLessThanEqual(ctx.U1, src_thread_id, max_thread_id)};
|
const Id in_range{ctx.OpSLessThanEqual(ctx.U1, src_thread_id, max_thread_id)};
|
||||||
|
|
||||||
|
if (ctx.profile.warp_size_potentially_larger_than_guest) {
|
||||||
|
src_thread_id = AddPartitionBase(ctx, src_thread_id);
|
||||||
|
}
|
||||||
|
|
||||||
SetInBoundsFlag(inst, in_range);
|
SetInBoundsFlag(inst, in_range);
|
||||||
if (!StageSupportsSubgroups(ctx)) {
|
return SelectValue(ctx, in_range, value, src_thread_id);
|
||||||
return value;
|
|
||||||
}
|
|
||||||
const IR::Value lane{inst->Arg(1).Resolve()};
|
|
||||||
const IR::Value segment{inst->Arg(3).Resolve()};
|
|
||||||
if (lane.IsImmediate() && segment.IsImmediate() && segment.U32() == 0) {
|
|
||||||
return ctx.OpSelect(ctx.U32[1], in_range, BroadcastLane(ctx, value, lane.U32() & 31),
|
|
||||||
value);
|
|
||||||
}
|
|
||||||
const Id shuffled{ShuffleAbsolute(ctx, value, HostThreadId(ctx, src_thread_id))};
|
|
||||||
return ctx.OpSelect(ctx.U32[1], in_range, shuffled, value);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
Id EmitShuffleUp(EmitContext& ctx, IR::Inst* inst, Id value, Id index, Id clamp,
|
Id EmitShuffleUp(EmitContext& ctx, IR::Inst* inst, Id value, Id index, Id clamp,
|
||||||
Id segmentation_mask) {
|
Id segmentation_mask) {
|
||||||
if (!StageSupportsSubgroups(ctx)) {
|
|
||||||
SetInBoundsFlag(inst, ctx.false_value);
|
|
||||||
return value;
|
|
||||||
}
|
|
||||||
const Id delta{GuestLane(ctx, index)};
|
|
||||||
const Id thread_id{EmitLaneId(ctx)};
|
const Id thread_id{EmitLaneId(ctx)};
|
||||||
const Id max_thread_id{GetMaxThreadId(ctx, thread_id, clamp, segmentation_mask)};
|
const Id max_thread_id{GetMaxThreadId(ctx, thread_id, clamp, segmentation_mask)};
|
||||||
const Id src_thread_id{ctx.OpISub(ctx.U32[1], thread_id, delta)};
|
Id src_thread_id{ctx.OpISub(ctx.U32[1], thread_id, index)};
|
||||||
const Id in_range{ctx.OpSGreaterThanEqual(ctx.U1, src_thread_id, max_thread_id)};
|
const Id in_range{ctx.OpSGreaterThanEqual(ctx.U1, src_thread_id, max_thread_id)};
|
||||||
|
|
||||||
|
if (ctx.profile.warp_size_potentially_larger_than_guest) {
|
||||||
|
src_thread_id = AddPartitionBase(ctx, src_thread_id);
|
||||||
|
}
|
||||||
|
|
||||||
SetInBoundsFlag(inst, in_range);
|
SetInBoundsFlag(inst, in_range);
|
||||||
const Id shuffled{ShuffleRelative(ctx, value, delta, src_thread_id,
|
return SelectValue(ctx, in_range, value, src_thread_id);
|
||||||
spv::Op::OpGroupNonUniformShuffleUp)};
|
|
||||||
return ctx.OpSelect(ctx.U32[1], in_range, shuffled, value);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
Id EmitShuffleDown(EmitContext& ctx, IR::Inst* inst, Id value, Id index, Id clamp,
|
Id EmitShuffleDown(EmitContext& ctx, IR::Inst* inst, Id value, Id index, Id clamp,
|
||||||
Id segmentation_mask) {
|
Id segmentation_mask) {
|
||||||
if (!StageSupportsSubgroups(ctx)) {
|
|
||||||
SetInBoundsFlag(inst, ctx.false_value);
|
|
||||||
return value;
|
|
||||||
}
|
|
||||||
const Id delta{GuestLane(ctx, index)};
|
|
||||||
const Id thread_id{EmitLaneId(ctx)};
|
const Id thread_id{EmitLaneId(ctx)};
|
||||||
const Id max_thread_id{GetMaxThreadId(ctx, thread_id, clamp, segmentation_mask)};
|
const Id max_thread_id{GetMaxThreadId(ctx, thread_id, clamp, segmentation_mask)};
|
||||||
const Id src_thread_id{ctx.OpIAdd(ctx.U32[1], thread_id, delta)};
|
Id src_thread_id{ctx.OpIAdd(ctx.U32[1], thread_id, index)};
|
||||||
const Id in_range{ctx.OpSLessThanEqual(ctx.U1, src_thread_id, max_thread_id)};
|
const Id in_range{ctx.OpSLessThanEqual(ctx.U1, src_thread_id, max_thread_id)};
|
||||||
|
|
||||||
|
if (ctx.profile.warp_size_potentially_larger_than_guest) {
|
||||||
|
src_thread_id = AddPartitionBase(ctx, src_thread_id);
|
||||||
|
}
|
||||||
|
|
||||||
SetInBoundsFlag(inst, in_range);
|
SetInBoundsFlag(inst, in_range);
|
||||||
const Id shuffled{ShuffleRelative(ctx, value, delta, src_thread_id,
|
return SelectValue(ctx, in_range, value, src_thread_id);
|
||||||
spv::Op::OpGroupNonUniformShuffleDown)};
|
|
||||||
return ctx.OpSelect(ctx.U32[1], in_range, shuffled, value);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
Id EmitShuffleButterfly(EmitContext& ctx, IR::Inst* inst, Id value, Id index, Id clamp,
|
Id EmitShuffleButterfly(EmitContext& ctx, IR::Inst* inst, Id value, Id index, Id clamp,
|
||||||
Id segmentation_mask) {
|
Id segmentation_mask) {
|
||||||
if (!StageSupportsSubgroups(ctx)) {
|
|
||||||
SetInBoundsFlag(inst, ctx.false_value);
|
|
||||||
return value;
|
|
||||||
}
|
|
||||||
const Id mask{GuestLane(ctx, index)};
|
|
||||||
const Id thread_id{EmitLaneId(ctx)};
|
const Id thread_id{EmitLaneId(ctx)};
|
||||||
const Id max_thread_id{GetMaxThreadId(ctx, thread_id, clamp, segmentation_mask)};
|
const Id max_thread_id{GetMaxThreadId(ctx, thread_id, clamp, segmentation_mask)};
|
||||||
const Id src_thread_id{ctx.OpBitwiseXor(ctx.U32[1], thread_id, mask)};
|
Id src_thread_id{ctx.OpBitwiseXor(ctx.U32[1], thread_id, index)};
|
||||||
const Id in_range{ctx.OpSLessThanEqual(ctx.U1, src_thread_id, max_thread_id)};
|
const Id in_range{ctx.OpSLessThanEqual(ctx.U1, src_thread_id, max_thread_id)};
|
||||||
|
|
||||||
|
if (ctx.profile.warp_size_potentially_larger_than_guest) {
|
||||||
|
src_thread_id = AddPartitionBase(ctx, src_thread_id);
|
||||||
|
}
|
||||||
|
|
||||||
SetInBoundsFlag(inst, in_range);
|
SetInBoundsFlag(inst, in_range);
|
||||||
const Id shuffled{ctx.OpGroupNonUniformShuffleXor(ctx.U32[1], SubgroupScope(ctx), value, mask)};
|
return SelectValue(ctx, in_range, value, src_thread_id);
|
||||||
return ctx.OpSelect(ctx.U32[1], in_range, shuffled, value);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
Id EmitQuadBroadcast(EmitContext& ctx, Id value, Id lane) {
|
Id EmitQuadBroadcast(EmitContext& ctx, Id value, Id lane) {
|
||||||
@@ -318,16 +267,10 @@ Id EmitQuadBroadcast(EmitContext& ctx, Id value, Id lane) {
|
|||||||
const Id base{ctx.OpBitwiseAnd(ctx.U32[1], GetThreadId(ctx), ctx.Const(~3u))};
|
const Id base{ctx.OpBitwiseAnd(ctx.U32[1], GetThreadId(ctx), ctx.Const(~3u))};
|
||||||
const Id local_lane{ctx.OpBitwiseAnd(ctx.U32[1], lane, ctx.Const(3u))};
|
const Id local_lane{ctx.OpBitwiseAnd(ctx.U32[1], lane, ctx.Const(3u))};
|
||||||
const Id src_thread_id{ctx.OpBitwiseOr(ctx.U32[1], base, local_lane)};
|
const Id src_thread_id{ctx.OpBitwiseOr(ctx.U32[1], base, local_lane)};
|
||||||
return ShuffleAbsolute(ctx, value, src_thread_id);
|
return ctx.OpGroupNonUniformShuffle(ctx.U32[1], SubgroupScope(ctx), value, src_thread_id);
|
||||||
}
|
}
|
||||||
|
|
||||||
Id EmitQuadSwap(EmitContext& ctx, Id value, Id direction) {
|
Id EmitQuadSwap(EmitContext& ctx, Id value, Id direction) {
|
||||||
if (ctx.profile.support_quad_shuffles) {
|
|
||||||
const Id result{
|
|
||||||
ctx.OpGroupNonUniformQuadBroadcast(ctx.U32[1], SubgroupScope(ctx), value, direction)};
|
|
||||||
ctx.opcode_rewrites.emplace_back(result.value, spv::Op::OpGroupNonUniformQuadSwap);
|
|
||||||
return result;
|
|
||||||
}
|
|
||||||
const Id xor_mask{ctx.OpIAdd(ctx.U32[1], direction, ctx.Const(1u))};
|
const Id xor_mask{ctx.OpIAdd(ctx.U32[1], direction, ctx.Const(1u))};
|
||||||
return ctx.OpGroupNonUniformShuffleXor(ctx.U32[1], SubgroupScope(ctx), value, xor_mask);
|
return ctx.OpGroupNonUniformShuffleXor(ctx.U32[1], SubgroupScope(ctx), value, xor_mask);
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -361,7 +361,6 @@ public:
|
|||||||
Id frag_depth{};
|
Id frag_depth{};
|
||||||
|
|
||||||
std::vector<Id> interfaces;
|
std::vector<Id> interfaces;
|
||||||
std::vector<std::pair<u32, spv::Op>> opcode_rewrites;
|
|
||||||
|
|
||||||
Id load_const_func_u8{};
|
Id load_const_func_u8{};
|
||||||
Id load_const_func_u16{};
|
Id load_const_func_u16{};
|
||||||
|
|||||||
@@ -5,10 +5,7 @@
|
|||||||
// SPDX-License-Identifier: GPL-2.0-or-later
|
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||||
|
|
||||||
#include <algorithm>
|
#include <algorithm>
|
||||||
#include <array>
|
|
||||||
#include <bitset>
|
|
||||||
#include <memory>
|
#include <memory>
|
||||||
#include <optional>
|
|
||||||
#include <vector>
|
#include <vector>
|
||||||
#include <queue>
|
#include <queue>
|
||||||
|
|
||||||
@@ -175,17 +172,7 @@ std::map<IR::Attribute, IR::Attribute> GenerateLegacyToGenericMappings(
|
|||||||
void EmitGeometryPassthrough(IR::IREmitter& ir, const IR::Program& program,
|
void EmitGeometryPassthrough(IR::IREmitter& ir, const IR::Program& program,
|
||||||
const Shader::VaryingState& passthrough_mask,
|
const Shader::VaryingState& passthrough_mask,
|
||||||
bool passthrough_position,
|
bool passthrough_position,
|
||||||
std::optional<IR::Attribute> passthrough_layer_attr,
|
std::optional<IR::Attribute> passthrough_layer_attr) {
|
||||||
std::optional<IR::Reg> viewport_mask_reg) {
|
|
||||||
constexpr std::array CULLED_POSITION{2.0f, 2.0f, 2.0f, 1.0f};
|
|
||||||
IR::U1 culled{ir.Imm1(false)};
|
|
||||||
IR::U32 viewport{ir.Imm32(0)};
|
|
||||||
if (viewport_mask_reg) {
|
|
||||||
const IR::U32 mask{ir.GetReg(*viewport_mask_reg)};
|
|
||||||
const IR::U32 lowest_bit{ir.BitwiseAnd(mask, IR::U32{ir.INeg(mask)})};
|
|
||||||
culled = ir.IEqual(mask, ir.Imm32(0));
|
|
||||||
viewport = IR::U32{ir.Select(culled, ir.Imm32(0), ir.FindUMsb(lowest_bit))};
|
|
||||||
}
|
|
||||||
for (u32 i = 0; i < program.output_vertices; i++) {
|
for (u32 i = 0; i < program.output_vertices; i++) {
|
||||||
// Assign generics from input
|
// Assign generics from input
|
||||||
for (u32 j = 0; j < 32; j++) {
|
for (u32 j = 0; j < 32; j++) {
|
||||||
@@ -203,19 +190,10 @@ void EmitGeometryPassthrough(IR::IREmitter& ir, const IR::Program& program,
|
|||||||
if (passthrough_position) {
|
if (passthrough_position) {
|
||||||
// Assign position from input
|
// Assign position from input
|
||||||
const IR::Attribute attr = IR::Attribute::PositionX;
|
const IR::Attribute attr = IR::Attribute::PositionX;
|
||||||
for (u32 component = 0; component < 4; ++component) {
|
ir.SetAttribute(attr + 0, ir.GetAttribute(attr + 0, ir.Imm32(i)), ir.Imm32(0));
|
||||||
IR::F32 value{ir.GetAttribute(attr + component, ir.Imm32(i))};
|
ir.SetAttribute(attr + 1, ir.GetAttribute(attr + 1, ir.Imm32(i)), ir.Imm32(0));
|
||||||
if (viewport_mask_reg) {
|
ir.SetAttribute(attr + 2, ir.GetAttribute(attr + 2, ir.Imm32(i)), ir.Imm32(0));
|
||||||
value = IR::F32{
|
ir.SetAttribute(attr + 3, ir.GetAttribute(attr + 3, ir.Imm32(i)), ir.Imm32(0));
|
||||||
ir.Select(culled, ir.Imm32(CULLED_POSITION[component]), value)};
|
|
||||||
}
|
|
||||||
ir.SetAttribute(attr + component, value, ir.Imm32(0));
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
if (viewport_mask_reg) {
|
|
||||||
ir.SetAttribute(IR::Attribute::ViewportIndex, ir.BitCast<IR::F32>(viewport),
|
|
||||||
ir.Imm32(0));
|
|
||||||
}
|
}
|
||||||
|
|
||||||
if (passthrough_layer_attr) {
|
if (passthrough_layer_attr) {
|
||||||
@@ -241,91 +219,19 @@ u32 GetOutputTopologyVertices(OutputTopology output_topology) {
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
std::optional<IR::Reg> FindFreeRegister(const IR::Program& program) {
|
|
||||||
std::bitset<IR::NUM_REGS> used;
|
|
||||||
for (IR::Block* const block : program.blocks) {
|
|
||||||
for (const IR::Inst& inst : block->Instructions()) {
|
|
||||||
const IR::Opcode opcode{inst.GetOpcode()};
|
|
||||||
if (opcode == IR::Opcode::GetRegister || opcode == IR::Opcode::SetRegister) {
|
|
||||||
used.set(IR::RegIndex(inst.Arg(0).Reg()));
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
for (size_t index = IR::NUM_USER_REGS; index-- > 0;) {
|
|
||||||
if (!used.test(index)) {
|
|
||||||
return static_cast<IR::Reg>(index);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
return std::nullopt;
|
|
||||||
}
|
|
||||||
|
|
||||||
std::optional<IR::Reg> LowerViewportMask(const IR::Program& program) {
|
|
||||||
const std::optional<IR::Reg> reg{FindFreeRegister(program)};
|
|
||||||
if (!reg || program.blocks.empty()) {
|
|
||||||
return std::nullopt;
|
|
||||||
}
|
|
||||||
bool stores_mask{};
|
|
||||||
for (IR::Block* const block : program.blocks) {
|
|
||||||
for (IR::Inst& inst : block->Instructions()) {
|
|
||||||
if (inst.GetOpcode() != IR::Opcode::SetAttribute ||
|
|
||||||
inst.Arg(0).Attribute() != IR::Attribute::ViewportMask) {
|
|
||||||
continue;
|
|
||||||
}
|
|
||||||
IR::IREmitter ir{*block, IR::Block::InstructionList::s_iterator_to(inst)};
|
|
||||||
ir.SetReg(*reg, ir.BitCast<IR::U32>(IR::F32{inst.Arg(1)}));
|
|
||||||
inst.Invalidate();
|
|
||||||
stores_mask = true;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
if (!stores_mask) {
|
|
||||||
return std::nullopt;
|
|
||||||
}
|
|
||||||
IR::Block& entry{*program.blocks.front()};
|
|
||||||
IR::IREmitter ir{entry, entry.begin()};
|
|
||||||
ir.SetReg(*reg, ir.Imm32(1));
|
|
||||||
return reg;
|
|
||||||
}
|
|
||||||
|
|
||||||
void LowerGeometryPassthrough(const IR::Program& program, const HostTranslateInfo& host_info) {
|
void LowerGeometryPassthrough(const IR::Program& program, const HostTranslateInfo& host_info) {
|
||||||
std::optional<IR::Reg> viewport_mask_reg;
|
|
||||||
if (!host_info.support_viewport_mask) {
|
|
||||||
viewport_mask_reg = LowerViewportMask(program);
|
|
||||||
}
|
|
||||||
for (IR::Block* const block : program.blocks) {
|
for (IR::Block* const block : program.blocks) {
|
||||||
for (IR::Inst& inst : block->Instructions()) {
|
for (IR::Inst& inst : block->Instructions()) {
|
||||||
if (inst.GetOpcode() == IR::Opcode::Epilogue) {
|
if (inst.GetOpcode() == IR::Opcode::Epilogue) {
|
||||||
IR::IREmitter ir{*block, IR::Block::InstructionList::s_iterator_to(inst)};
|
IR::IREmitter ir{*block, IR::Block::InstructionList::s_iterator_to(inst)};
|
||||||
EmitGeometryPassthrough(
|
EmitGeometryPassthrough(
|
||||||
ir, program, program.info.passthrough,
|
ir, program, program.info.passthrough,
|
||||||
program.info.passthrough.AnyComponent(IR::Attribute::PositionX), {},
|
program.info.passthrough.AnyComponent(IR::Attribute::PositionX), {});
|
||||||
viewport_mask_reg);
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void TightenOutputVertices(IR::Program& program) {
|
|
||||||
if (program.stage != Stage::Geometry || program.is_geometry_passthrough) {
|
|
||||||
return;
|
|
||||||
}
|
|
||||||
const bool has_loops = std::ranges::any_of(program.syntax_list, [](const auto& node) {
|
|
||||||
return node.type == IR::AbstractSyntaxNode::Type::Loop;
|
|
||||||
});
|
|
||||||
if (has_loops) {
|
|
||||||
return;
|
|
||||||
}
|
|
||||||
u32 num_emits = 0;
|
|
||||||
for (IR::Block* const block : program.blocks) {
|
|
||||||
for (const IR::Inst& inst : block->Instructions()) {
|
|
||||||
if (inst.GetOpcode() == IR::Opcode::EmitVertex) {
|
|
||||||
++num_emits;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
if (num_emits != 0) {
|
|
||||||
program.output_vertices = (std::min)(program.output_vertices, num_emits);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
} // Anonymous namespace
|
} // Anonymous namespace
|
||||||
|
|
||||||
IR::Program TranslateProgram(ObjectPool<IR::Inst>& inst_pool, ObjectPool<IR::Block>& block_pool,
|
IR::Program TranslateProgram(ObjectPool<IR::Inst>& inst_pool, ObjectPool<IR::Block>& block_pool,
|
||||||
@@ -393,14 +299,12 @@ IR::Program TranslateProgram(ObjectPool<IR::Inst>& inst_pool, ObjectPool<IR::Blo
|
|||||||
Optimization::PositionPass(env, program);
|
Optimization::PositionPass(env, program);
|
||||||
|
|
||||||
Optimization::GlobalMemoryToStorageBufferPass(program, normalized_host_info);
|
Optimization::GlobalMemoryToStorageBufferPass(program, normalized_host_info);
|
||||||
Optimization::GeometryCompactionPass(program, normalized_host_info);
|
|
||||||
Optimization::TexturePass(env, program, normalized_host_info);
|
Optimization::TexturePass(env, program, normalized_host_info);
|
||||||
|
|
||||||
if (Settings::values.resolution_info.active) {
|
if (Settings::values.resolution_info.active) {
|
||||||
Optimization::RescalingPass(program);
|
Optimization::RescalingPass(program);
|
||||||
}
|
}
|
||||||
Optimization::DeadCodeEliminationPass(program);
|
Optimization::DeadCodeEliminationPass(program);
|
||||||
TightenOutputVertices(program);
|
|
||||||
if (Settings::values.renderer_debug) {
|
if (Settings::values.renderer_debug) {
|
||||||
Optimization::VerificationPass(program);
|
Optimization::VerificationPass(program);
|
||||||
}
|
}
|
||||||
@@ -529,7 +433,7 @@ IR::Program GenerateGeometryPassthrough(ObjectPool<IR::Inst>& inst_pool,
|
|||||||
|
|
||||||
IR::IREmitter ir{*current_block};
|
IR::IREmitter ir{*current_block};
|
||||||
EmitGeometryPassthrough(ir, program, program.info.stores, true,
|
EmitGeometryPassthrough(ir, program, program.info.stores, true,
|
||||||
source_program.info.emulated_layer, std::nullopt);
|
source_program.info.emulated_layer);
|
||||||
|
|
||||||
IR::Block* return_block{block_pool.Create(inst_pool)};
|
IR::Block* return_block{block_pool.Create(inst_pool)};
|
||||||
IR::IREmitter{*return_block}.Epilogue();
|
IR::IREmitter{*return_block}.Epilogue();
|
||||||
|
|||||||
@@ -34,12 +34,10 @@ struct HostTranslateInfo {
|
|||||||
bool needs_demote_reorder{}; ///< True when the device needs DemoteToHelperInvocation reordered
|
bool needs_demote_reorder{}; ///< True when the device needs DemoteToHelperInvocation reordered
|
||||||
bool support_snorm_render_buffer{}; ///< True when the device supports SNORM render buffers
|
bool support_snorm_render_buffer{}; ///< True when the device supports SNORM render buffers
|
||||||
bool support_viewport_index_layer{}; ///< True when the device supports gl_Layer in VS
|
bool support_viewport_index_layer{}; ///< True when the device supports gl_Layer in VS
|
||||||
bool support_viewport_mask{};
|
|
||||||
bool support_geometry_shader_passthrough{}; ///< True when the device supports geometry
|
bool support_geometry_shader_passthrough{}; ///< True when the device supports geometry
|
||||||
///< passthrough shaders
|
///< passthrough shaders
|
||||||
bool support_conditional_barrier{}; ///< True when the device supports barriers in conditional
|
bool support_conditional_barrier{}; ///< True when the device supports barriers in conditional
|
||||||
///< control flow
|
///< control flow
|
||||||
bool single_lane_geometry_subgroups{};
|
|
||||||
|
|
||||||
void ApplyDescriptorLimitPolicy() noexcept {
|
void ApplyDescriptorLimitPolicy() noexcept {
|
||||||
if (min_ssbo_alignment == 0) {
|
if (min_ssbo_alignment == 0) {
|
||||||
|
|||||||
@@ -1,4 +1,4 @@
|
|||||||
// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project
|
// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project
|
||||||
// SPDX-License-Identifier: GPL-3.0-or-later
|
// SPDX-License-Identifier: GPL-3.0-or-later
|
||||||
|
|
||||||
// SPDX-FileCopyrightText: Copyright 2021 yuzu Emulator Project
|
// SPDX-FileCopyrightText: Copyright 2021 yuzu Emulator Project
|
||||||
@@ -651,29 +651,6 @@ IR::Value GetThroughCast(IR::Value value, IR::Opcode expected_cast) {
|
|||||||
return value;
|
return value;
|
||||||
}
|
}
|
||||||
|
|
||||||
u32 QuadButterflyMask(const IR::Inst& inst) {
|
|
||||||
if (inst.GetOpcode() == IR::Opcode::QuadSwap) {
|
|
||||||
const IR::Value direction{inst.Arg(1)};
|
|
||||||
if (!direction.IsImmediate()) {
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
return direction.U32() + 1;
|
|
||||||
}
|
|
||||||
if (inst.GetOpcode() != IR::Opcode::ShuffleButterfly) {
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
const IR::Value index{inst.Arg(1)};
|
|
||||||
const IR::Value clamp{inst.Arg(2)};
|
|
||||||
const IR::Value segmentation_mask{inst.Arg(3)};
|
|
||||||
if (!index.IsImmediate() || !clamp.IsImmediate() || !segmentation_mask.IsImmediate()) {
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
if (clamp.U32() != 3 || segmentation_mask.U32() != 28) {
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
return index.U32();
|
|
||||||
}
|
|
||||||
|
|
||||||
void FoldFSwizzleAdd(IR::Block& block, IR::Inst& inst) {
|
void FoldFSwizzleAdd(IR::Block& block, IR::Inst& inst) {
|
||||||
const IR::Value swizzle{inst.Arg(2)};
|
const IR::Value swizzle{inst.Arg(2)};
|
||||||
if (!swizzle.IsImmediate()) {
|
if (!swizzle.IsImmediate()) {
|
||||||
@@ -689,8 +666,7 @@ void FoldFSwizzleAdd(IR::Block& block, IR::Inst& inst) {
|
|||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
IR::Inst* const inst2{value_1.InstRecursive()};
|
IR::Inst* const inst2{value_1.InstRecursive()};
|
||||||
const u32 lane_mask{QuadButterflyMask(*inst2)};
|
if (inst2->GetOpcode() != IR::Opcode::ShuffleButterfly) {
|
||||||
if (lane_mask == 0) {
|
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
const IR::Value value_3{GetThroughCast(inst2->Arg(0).Resolve(), IR::Opcode::BitCastU32F32)};
|
const IR::Value value_3{GetThroughCast(inst2->Arg(0).Resolve(), IR::Opcode::BitCastU32F32)};
|
||||||
@@ -702,15 +678,24 @@ void FoldFSwizzleAdd(IR::Block& block, IR::Inst& inst) {
|
|||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
const IR::Value index{inst2->Arg(1)};
|
||||||
|
const IR::Value clamp{inst2->Arg(2)};
|
||||||
|
const IR::Value segmentation_mask{inst2->Arg(3)};
|
||||||
|
if (!index.IsImmediate() || !clamp.IsImmediate() || !segmentation_mask.IsImmediate()) {
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
if (clamp.U32() != 3 || segmentation_mask.U32() != 28) {
|
||||||
|
return;
|
||||||
|
}
|
||||||
if (swizzle_value == 0x99) {
|
if (swizzle_value == 0x99) {
|
||||||
// DPdxFine
|
// DPdxFine
|
||||||
if (lane_mask == 1) {
|
if (index.U32() == 1) {
|
||||||
IR::IREmitter ir{block, IR::Block::InstructionList::s_iterator_to(inst)};
|
IR::IREmitter ir{block, IR::Block::InstructionList::s_iterator_to(inst)};
|
||||||
inst.ReplaceUsesWith(ir.DPdxFine(IR::F32{inst.Arg(1)}));
|
inst.ReplaceUsesWith(ir.DPdxFine(IR::F32{inst.Arg(1)}));
|
||||||
}
|
}
|
||||||
} else if (swizzle_value == 0xA5) {
|
} else if (swizzle_value == 0xA5) {
|
||||||
// DPdyFine
|
// DPdyFine
|
||||||
if (lane_mask == 2) {
|
if (index.U32() == 2) {
|
||||||
IR::IREmitter ir{block, IR::Block::InstructionList::s_iterator_to(inst)};
|
IR::IREmitter ir{block, IR::Block::InstructionList::s_iterator_to(inst)};
|
||||||
inst.ReplaceUsesWith(ir.DPdyFine(IR::F32{inst.Arg(1)}));
|
inst.ReplaceUsesWith(ir.DPdyFine(IR::F32{inst.Arg(1)}));
|
||||||
}
|
}
|
||||||
@@ -724,13 +709,6 @@ bool FindGradient3DDerivatives(std::array<IR::Value, 3>& results, IR::Value coor
|
|||||||
const auto check_through_shuffle = [](IR::Value input, IR::Value& result) {
|
const auto check_through_shuffle = [](IR::Value input, IR::Value& result) {
|
||||||
const IR::Value value_1{GetThroughCast(input.Resolve(), IR::Opcode::BitCastF32U32)};
|
const IR::Value value_1{GetThroughCast(input.Resolve(), IR::Opcode::BitCastF32U32)};
|
||||||
IR::Inst* const inst2{value_1.InstRecursive()};
|
IR::Inst* const inst2{value_1.InstRecursive()};
|
||||||
if (inst2->GetOpcode() == IR::Opcode::QuadBroadcast) {
|
|
||||||
if (!inst2->Arg(1).Resolve().IsImmediate()) {
|
|
||||||
return false;
|
|
||||||
}
|
|
||||||
result = GetThroughCast(inst2->Arg(0).Resolve(), IR::Opcode::BitCastU32F32);
|
|
||||||
return true;
|
|
||||||
}
|
|
||||||
if (inst2->GetOpcode() != IR::Opcode::ShuffleIndex) {
|
if (inst2->GetOpcode() != IR::Opcode::ShuffleIndex) {
|
||||||
return false;
|
return false;
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -1,129 +0,0 @@
|
|||||||
// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project
|
|
||||||
// SPDX-License-Identifier: GPL-3.0-or-later
|
|
||||||
|
|
||||||
#include <boost/container/small_vector.hpp>
|
|
||||||
|
|
||||||
#include "shader_recompiler/frontend/ir/ir_emitter.h"
|
|
||||||
#include "shader_recompiler/host_translate_info.h"
|
|
||||||
#include "shader_recompiler/ir_opt/passes.h"
|
|
||||||
|
|
||||||
namespace Shader::Optimization {
|
|
||||||
namespace {
|
|
||||||
constexpr int MAX_BALLOT_DEPTH = 8;
|
|
||||||
|
|
||||||
struct SlotAtomic {
|
|
||||||
IR::Block* block;
|
|
||||||
IR::Inst* atomic;
|
|
||||||
IR::Inst* ballot;
|
|
||||||
};
|
|
||||||
|
|
||||||
IR::Inst* FindBallot(const IR::Value& value, int depth) {
|
|
||||||
if (depth > MAX_BALLOT_DEPTH || value.IsImmediate()) {
|
|
||||||
return nullptr;
|
|
||||||
}
|
|
||||||
IR::Inst* const inst{value.InstRecursive()};
|
|
||||||
if (inst->GetOpcode() == IR::Opcode::SubgroupBallot) {
|
|
||||||
return inst;
|
|
||||||
}
|
|
||||||
if (inst->GetOpcode() == IR::Opcode::Phi) {
|
|
||||||
return nullptr;
|
|
||||||
}
|
|
||||||
for (size_t index = 0; index < inst->NumArgs(); ++index) {
|
|
||||||
if (IR::Inst* const ballot{FindBallot(inst->Arg(index), depth + 1)}) {
|
|
||||||
return ballot;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
return nullptr;
|
|
||||||
}
|
|
||||||
|
|
||||||
bool IsShuffle(IR::Opcode opcode) {
|
|
||||||
switch (opcode) {
|
|
||||||
case IR::Opcode::ShuffleIndex:
|
|
||||||
case IR::Opcode::ShuffleUp:
|
|
||||||
case IR::Opcode::ShuffleDown:
|
|
||||||
case IR::Opcode::ShuffleButterfly:
|
|
||||||
return true;
|
|
||||||
default:
|
|
||||||
return false;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
IR::U32 PrimitiveSlot(IR::IREmitter& ir, u32 invocations, const IR::U32& amount) {
|
|
||||||
IR::U32 key{ir.GetAttributeU32(IR::Attribute::PrimitiveId)};
|
|
||||||
if (invocations > 1) {
|
|
||||||
key = ir.IAdd(ir.IMul(key, ir.Imm32(invocations)), ir.InvocationId());
|
|
||||||
}
|
|
||||||
return ir.IMul(key, amount);
|
|
||||||
}
|
|
||||||
|
|
||||||
bool MergesAtomic(const IR::Inst& phi, const IR::Block& block, const IR::Inst& atomic) {
|
|
||||||
for (size_t index = 0; index < phi.NumArgs(); ++index) {
|
|
||||||
const IR::Value arg{phi.Arg(index)};
|
|
||||||
if (phi.PhiBlock(index) == &block && !arg.IsImmediate() &&
|
|
||||||
arg.InstRecursive() == &atomic) {
|
|
||||||
return true;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
return false;
|
|
||||||
}
|
|
||||||
|
|
||||||
void RewriteMergedSlots(IR::Block& block, IR::Inst& atomic, u32 invocations) {
|
|
||||||
for (IR::Block* const successor : block.ImmSuccessors()) {
|
|
||||||
for (IR::Inst& phi : successor->Instructions()) {
|
|
||||||
if (phi.GetOpcode() != IR::Opcode::Phi || !MergesAtomic(phi, block, atomic)) {
|
|
||||||
continue;
|
|
||||||
}
|
|
||||||
for (size_t index = 0; index < phi.NumArgs(); ++index) {
|
|
||||||
const IR::Value arg{phi.Arg(index)};
|
|
||||||
if (arg.IsImmediate() || !IsShuffle(arg.InstRecursive()->GetOpcode())) {
|
|
||||||
continue;
|
|
||||||
}
|
|
||||||
IR::IREmitter ir{*phi.PhiBlock(index)};
|
|
||||||
const IR::U32 amount{arg.InstRecursive()->Arg(0)};
|
|
||||||
phi.SetArg(index, PrimitiveSlot(ir, invocations, amount));
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
void RewriteAtomic(IR::Block& block, IR::Inst& atomic, u32 invocations) {
|
|
||||||
const auto insert_point{IR::Block::InstructionList::s_iterator_to(atomic)};
|
|
||||||
IR::IREmitter ir{block, insert_point};
|
|
||||||
const IR::U32 amount{atomic.Arg(2)};
|
|
||||||
const IR::U32 slot{PrimitiveSlot(ir, invocations, amount)};
|
|
||||||
block.PrependNewInst(insert_point, IR::Opcode::StorageAtomicUMax32,
|
|
||||||
{atomic.Arg(0), atomic.Arg(1), ir.IAdd(slot, amount)});
|
|
||||||
atomic.ReplaceUsesWith(slot);
|
|
||||||
}
|
|
||||||
|
|
||||||
void NeutralizePredicate(IR::Inst& ballot) {
|
|
||||||
const IR::Value pred{ballot.Arg(0)};
|
|
||||||
if (!pred.IsImmediate()) {
|
|
||||||
pred.InstRecursive()->ReplaceUsesWith(IR::Value{true});
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
void GeometryCompactionPass(IR::Program& program, const HostTranslateInfo& host_info) {
|
|
||||||
if (program.stage != Stage::Geometry || !host_info.single_lane_geometry_subgroups) {
|
|
||||||
return;
|
|
||||||
}
|
|
||||||
boost::container::small_vector<SlotAtomic, 4> slot_atomics;
|
|
||||||
for (IR::Block* const block : program.post_order_blocks) {
|
|
||||||
for (IR::Inst& inst : block->Instructions()) {
|
|
||||||
if (inst.GetOpcode() != IR::Opcode::StorageAtomicIAdd32) {
|
|
||||||
continue;
|
|
||||||
}
|
|
||||||
if (IR::Inst* const ballot{FindBallot(inst.Arg(2), 0)}) {
|
|
||||||
slot_atomics.push_back({block, &inst, ballot});
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
for (const SlotAtomic& slot_atomic : slot_atomics) {
|
|
||||||
RewriteMergedSlots(*slot_atomic.block, *slot_atomic.atomic, program.invocations);
|
|
||||||
RewriteAtomic(*slot_atomic.block, *slot_atomic.atomic, program.invocations);
|
|
||||||
NeutralizePredicate(*slot_atomic.ballot);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
}
|
|
||||||
@@ -19,7 +19,6 @@ void CollectShaderInfoPass(Environment& env, IR::Program& program);
|
|||||||
void ConditionalBarrierPass(IR::Program& program);
|
void ConditionalBarrierPass(IR::Program& program);
|
||||||
void ConstantPropagationPass(Environment& env, IR::Program& program);
|
void ConstantPropagationPass(Environment& env, IR::Program& program);
|
||||||
void DeadCodeEliminationPass(IR::Program& program);
|
void DeadCodeEliminationPass(IR::Program& program);
|
||||||
void GeometryCompactionPass(IR::Program& program, const HostTranslateInfo& host_info);
|
|
||||||
void GlobalMemoryToStorageBufferPass(IR::Program& program, const HostTranslateInfo& host_info);
|
void GlobalMemoryToStorageBufferPass(IR::Program& program, const HostTranslateInfo& host_info);
|
||||||
void IdentityRemovalPass(IR::Program& program);
|
void IdentityRemovalPass(IR::Program& program);
|
||||||
void LowerFp64ToFp32(IR::Program& program);
|
void LowerFp64ToFp32(IR::Program& program);
|
||||||
|
|||||||
@@ -40,7 +40,6 @@ struct Profile {
|
|||||||
bool support_shader_quad_control{};
|
bool support_shader_quad_control{};
|
||||||
bool support_quad_shuffles{};
|
bool support_quad_shuffles{};
|
||||||
bool support_vote{};
|
bool support_vote{};
|
||||||
bool support_shuffle_relative{};
|
|
||||||
u32 supported_subgroup_stages{0x7F};
|
u32 supported_subgroup_stages{0x7F};
|
||||||
bool support_viewport_index_layer_non_geometry{};
|
bool support_viewport_index_layer_non_geometry{};
|
||||||
bool support_viewport_mask{};
|
bool support_viewport_mask{};
|
||||||
@@ -103,8 +102,6 @@ struct Profile {
|
|||||||
bool ignore_nan_fp_comparisons{};
|
bool ignore_nan_fp_comparisons{};
|
||||||
/// Some drivers have broken support for OpVectorExtractDynamic on subgroup mask inputs
|
/// Some drivers have broken support for OpVectorExtractDynamic on subgroup mask inputs
|
||||||
bool has_broken_spirv_subgroup_mask_vector_extract_dynamic{};
|
bool has_broken_spirv_subgroup_mask_vector_extract_dynamic{};
|
||||||
bool has_broken_spirv_subgroup_shuffle{};
|
|
||||||
u32 max_subgroup_size{};
|
|
||||||
|
|
||||||
u32 gl_max_compute_smem_size{};
|
u32 gl_max_compute_smem_size{};
|
||||||
|
|
||||||
|
|||||||
@@ -1738,36 +1738,64 @@ void BufferCache<P>::TouchBuffer(Buffer& buffer, BufferId buffer_id) noexcept {
|
|||||||
|
|
||||||
template <class P>
|
template <class P>
|
||||||
bool BufferCache<P>::SynchronizeBuffer(Buffer& buffer, DAddr device_addr, u32 size) {
|
bool BufferCache<P>::SynchronizeBuffer(Buffer& buffer, DAddr device_addr, u32 size) {
|
||||||
upload_copies.clear();
|
#ifdef __ANDROID__
|
||||||
u64 total_size_bytes = 0;
|
const bool use_optimized_vertex_buffers = Settings::values.use_optimized_vertex_buffers.GetValue();
|
||||||
u64 largest_copy = 0;
|
#else
|
||||||
const DAddr buffer_start = buffer.cpu_addr_cached;
|
constexpr bool use_optimized_vertex_buffers = true;
|
||||||
const auto add_upload = [&](DAddr start, DAddr end) {
|
#endif
|
||||||
if (start == end) return;
|
|
||||||
const u64 range_size = end - start;
|
if (use_optimized_vertex_buffers) {
|
||||||
upload_copies.push_back(BufferCopy{
|
upload_copies.clear();
|
||||||
.src_offset = total_size_bytes,
|
u64 total_size_bytes = 0;
|
||||||
.dst_offset = start - buffer_start,
|
u64 largest_copy = 0;
|
||||||
.size = range_size,
|
const DAddr buffer_start = buffer.cpu_addr_cached;
|
||||||
|
const auto add_upload = [&](DAddr start, DAddr end) {
|
||||||
|
if (start == end) return;
|
||||||
|
const u64 range_size = end - start;
|
||||||
|
upload_copies.push_back(BufferCopy{
|
||||||
|
.src_offset = total_size_bytes,
|
||||||
|
.dst_offset = start - buffer_start,
|
||||||
|
.size = range_size,
|
||||||
|
});
|
||||||
|
total_size_bytes += range_size;
|
||||||
|
largest_copy = (std::max)(largest_copy, range_size);
|
||||||
|
};
|
||||||
|
memory_tracker.ForEachUploadRange(device_addr, size, [&](u64 device_addr_out, u64 range_size) {
|
||||||
|
DAddr upload_start = device_addr_out;
|
||||||
|
gpu_modified_ranges.ForEachInRange(device_addr_out, range_size, [&](DAddr gpu_start, DAddr gpu_end) {
|
||||||
|
add_upload(upload_start, gpu_start);
|
||||||
|
upload_start = gpu_end;
|
||||||
|
});
|
||||||
|
add_upload(upload_start, device_addr_out + range_size);
|
||||||
});
|
});
|
||||||
total_size_bytes += range_size;
|
if (total_size_bytes == 0) {
|
||||||
largest_copy = (std::max)(largest_copy, range_size);
|
return true;
|
||||||
};
|
}
|
||||||
memory_tracker.ForEachUploadRange(device_addr, size, [&](u64 device_addr_out, u64 range_size) {
|
const std::span<BufferCopy> copies_span(upload_copies.data(), upload_copies.size());
|
||||||
DAddr upload_start = device_addr_out;
|
UploadMemory(buffer, total_size_bytes, largest_copy, copies_span);
|
||||||
gpu_modified_ranges.ForEachInRange(device_addr_out, range_size, [&](DAddr gpu_start, DAddr gpu_end) {
|
any_buffer_uploaded = true;
|
||||||
add_upload(upload_start, gpu_start);
|
return false;
|
||||||
upload_start = gpu_end;
|
} else {
|
||||||
|
boost::container::small_vector<BufferCopy, 4> copies;
|
||||||
|
u64 total_size_bytes = 0;
|
||||||
|
u64 largest_copy = 0;
|
||||||
|
DAddr buffer_start = buffer.CpuAddr();
|
||||||
|
memory_tracker.ForEachUploadRange(device_addr, size, [&](u64 device_addr_out, u64 range_size) {
|
||||||
|
copies.push_back(BufferCopy{
|
||||||
|
.src_offset = total_size_bytes,
|
||||||
|
.dst_offset = device_addr_out - buffer_start,
|
||||||
|
.size = range_size,
|
||||||
|
});
|
||||||
|
total_size_bytes += range_size;
|
||||||
|
largest_copy = (std::max)(largest_copy, range_size);
|
||||||
});
|
});
|
||||||
add_upload(upload_start, device_addr_out + range_size);
|
if (total_size_bytes == 0) {
|
||||||
});
|
return true;
|
||||||
if (total_size_bytes == 0) {
|
}
|
||||||
return true;
|
const std::span<BufferCopy> copies_span(copies.data(), copies.size());
|
||||||
|
UploadMemory(buffer, total_size_bytes, largest_copy, copies_span);
|
||||||
|
return false;
|
||||||
}
|
}
|
||||||
const std::span<BufferCopy> copies_span(upload_copies.data(), upload_copies.size());
|
|
||||||
UploadMemory(buffer, total_size_bytes, largest_copy, copies_span);
|
|
||||||
any_buffer_uploaded = true;
|
|
||||||
return false;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
template <class P>
|
template <class P>
|
||||||
|
|||||||
@@ -363,7 +363,7 @@ PipelineCache::PipelineCache(Tegra::MaxwellDeviceMemoryManager& device_memory_,
|
|||||||
const auto subgroup_stage_bit{[subgroup_stages](VkShaderStageFlags flag, Shader::Stage stage) {
|
const auto subgroup_stage_bit{[subgroup_stages](VkShaderStageFlags flag, Shader::Stage stage) {
|
||||||
return (subgroup_stages & flag) != 0 ? (1u << static_cast<u32>(stage)) : 0u;
|
return (subgroup_stages & flag) != 0 ? (1u << static_cast<u32>(stage)) : 0u;
|
||||||
}};
|
}};
|
||||||
u32 supported_subgroup_stages{
|
const u32 supported_subgroup_stages{
|
||||||
subgroup_stage_bit(VK_SHADER_STAGE_VERTEX_BIT, Shader::Stage::VertexA) |
|
subgroup_stage_bit(VK_SHADER_STAGE_VERTEX_BIT, Shader::Stage::VertexA) |
|
||||||
subgroup_stage_bit(VK_SHADER_STAGE_VERTEX_BIT, Shader::Stage::VertexB) |
|
subgroup_stage_bit(VK_SHADER_STAGE_VERTEX_BIT, Shader::Stage::VertexB) |
|
||||||
subgroup_stage_bit(VK_SHADER_STAGE_TESSELLATION_CONTROL_BIT,
|
subgroup_stage_bit(VK_SHADER_STAGE_TESSELLATION_CONTROL_BIT,
|
||||||
@@ -373,9 +373,6 @@ PipelineCache::PipelineCache(Tegra::MaxwellDeviceMemoryManager& device_memory_,
|
|||||||
subgroup_stage_bit(VK_SHADER_STAGE_GEOMETRY_BIT, Shader::Stage::Geometry) |
|
subgroup_stage_bit(VK_SHADER_STAGE_GEOMETRY_BIT, Shader::Stage::Geometry) |
|
||||||
subgroup_stage_bit(VK_SHADER_STAGE_FRAGMENT_BIT, Shader::Stage::Fragment) |
|
subgroup_stage_bit(VK_SHADER_STAGE_FRAGMENT_BIT, Shader::Stage::Fragment) |
|
||||||
subgroup_stage_bit(VK_SHADER_STAGE_COMPUTE_BIT, Shader::Stage::Compute)};
|
subgroup_stage_bit(VK_SHADER_STAGE_COMPUTE_BIT, Shader::Stage::Compute)};
|
||||||
if (driver_id == VK_DRIVER_ID_MESA_TURNIP) {
|
|
||||||
supported_subgroup_stages &= ~(1u << static_cast<u32>(Shader::Stage::Geometry));
|
|
||||||
}
|
|
||||||
profile = Shader::Profile{
|
profile = Shader::Profile{
|
||||||
.supported_spirv = device.SupportedSpirvVersion(),
|
.supported_spirv = device.SupportedSpirvVersion(),
|
||||||
.unified_descriptor_binding = true,
|
.unified_descriptor_binding = true,
|
||||||
@@ -413,8 +410,6 @@ PipelineCache::PipelineCache(Tegra::MaxwellDeviceMemoryManager& device_memory_,
|
|||||||
.support_shader_quad_control = device.IsKhrShaderQuadControlSupported(),
|
.support_shader_quad_control = device.IsKhrShaderQuadControlSupported(),
|
||||||
.support_quad_shuffles = device.IsSubgroupFeatureSupported(VK_SUBGROUP_FEATURE_QUAD_BIT),
|
.support_quad_shuffles = device.IsSubgroupFeatureSupported(VK_SUBGROUP_FEATURE_QUAD_BIT),
|
||||||
.support_vote = device.IsSubgroupFeatureSupported(VK_SUBGROUP_FEATURE_VOTE_BIT),
|
.support_vote = device.IsSubgroupFeatureSupported(VK_SUBGROUP_FEATURE_VOTE_BIT),
|
||||||
.support_shuffle_relative =
|
|
||||||
device.IsSubgroupFeatureSupported(VK_SUBGROUP_FEATURE_SHUFFLE_RELATIVE_BIT),
|
|
||||||
.supported_subgroup_stages = supported_subgroup_stages,
|
.supported_subgroup_stages = supported_subgroup_stages,
|
||||||
.support_viewport_index_layer_non_geometry =
|
.support_viewport_index_layer_non_geometry =
|
||||||
device.IsExtShaderViewportIndexLayerSupported(),
|
device.IsExtShaderViewportIndexLayerSupported(),
|
||||||
@@ -450,17 +445,13 @@ PipelineCache::PipelineCache(Tegra::MaxwellDeviceMemoryManager& device_memory_,
|
|||||||
driver_id == VK_DRIVER_ID_INTEL_OPEN_SOURCE_MESA,
|
driver_id == VK_DRIVER_ID_INTEL_OPEN_SOURCE_MESA,
|
||||||
|
|
||||||
.has_broken_spirv_clamp = driver_id == VK_DRIVER_ID_INTEL_PROPRIETARY_WINDOWS,
|
.has_broken_spirv_clamp = driver_id == VK_DRIVER_ID_INTEL_PROPRIETARY_WINDOWS,
|
||||||
.has_broken_spirv_position_input = driver_id == VK_DRIVER_ID_QUALCOMM_PROPRIETARY,
|
.has_broken_spirv_position_input = driver_id == false,
|
||||||
.has_broken_unsigned_image_offsets = false,
|
.has_broken_unsigned_image_offsets = false,
|
||||||
.has_broken_signed_operations = false,
|
.has_broken_signed_operations = false,
|
||||||
.has_broken_fp16_float_controls = driver_id == VK_DRIVER_ID_NVIDIA_PROPRIETARY,
|
.has_broken_fp16_float_controls = driver_id == VK_DRIVER_ID_NVIDIA_PROPRIETARY,
|
||||||
.has_broken_fp32_denorm_flush = driver_id == VK_DRIVER_ID_QUALCOMM_PROPRIETARY,
|
.has_broken_fp32_denorm_flush = driver_id == VK_DRIVER_ID_QUALCOMM_PROPRIETARY,
|
||||||
.ignore_nan_fp_comparisons = false,
|
.ignore_nan_fp_comparisons = false,
|
||||||
.has_broken_spirv_subgroup_mask_vector_extract_dynamic =
|
.has_broken_spirv_subgroup_mask_vector_extract_dynamic = false,
|
||||||
driver_id == VK_DRIVER_ID_QUALCOMM_PROPRIETARY &&
|
|
||||||
device.GetDriverVersion() < VK_MAKE_VERSION(512, 672, 0),
|
|
||||||
.has_broken_spirv_subgroup_shuffle = driver_id == VK_DRIVER_ID_QUALCOMM_PROPRIETARY,
|
|
||||||
.max_subgroup_size = device.GetMaxSubgroupSize(),
|
|
||||||
.has_broken_robust =
|
.has_broken_robust =
|
||||||
device.IsNvidia() && device.GetNvidiaArch() <= NvidiaArchitecture::Arch_Pascal,
|
device.IsNvidia() && device.GetNvidiaArch() <= NvidiaArchitecture::Arch_Pascal,
|
||||||
.min_ssbo_alignment = device.GetStorageBufferAlignment(),
|
.min_ssbo_alignment = device.GetStorageBufferAlignment(),
|
||||||
@@ -487,10 +478,8 @@ PipelineCache::PipelineCache(Tegra::MaxwellDeviceMemoryManager& device_memory_,
|
|||||||
driver_id == VK_DRIVER_ID_SAMSUNG_PROPRIETARY,
|
driver_id == VK_DRIVER_ID_SAMSUNG_PROPRIETARY,
|
||||||
.support_snorm_render_buffer = true,
|
.support_snorm_render_buffer = true,
|
||||||
.support_viewport_index_layer = device.IsExtShaderViewportIndexLayerSupported(),
|
.support_viewport_index_layer = device.IsExtShaderViewportIndexLayerSupported(),
|
||||||
.support_viewport_mask = device.IsNvViewportArray2Supported(),
|
|
||||||
.support_geometry_shader_passthrough = device.IsNvGeometryShaderPassthroughSupported(),
|
.support_geometry_shader_passthrough = device.IsNvGeometryShaderPassthroughSupported(),
|
||||||
.support_conditional_barrier = device.SupportsConditionalBarriers(),
|
.support_conditional_barrier = device.SupportsConditionalBarriers(),
|
||||||
.single_lane_geometry_subgroups = !profile.SupportsSubgroupStage(Shader::Stage::Geometry),
|
|
||||||
};
|
};
|
||||||
host_info.ApplyDescriptorLimitPolicy();
|
host_info.ApplyDescriptorLimitPolicy();
|
||||||
|
|
||||||
|
|||||||
@@ -483,11 +483,6 @@ FN_MAX_LIMIT_LIST
|
|||||||
return properties.subgroup_properties.supportedStages;
|
return properties.subgroup_properties.supportedStages;
|
||||||
}
|
}
|
||||||
|
|
||||||
u32 GetMaxSubgroupSize() const {
|
|
||||||
return (std::max)(properties.subgroup_properties.subgroupSize,
|
|
||||||
properties.subgroup_size_control.maxSubgroupSize);
|
|
||||||
}
|
|
||||||
|
|
||||||
/// Returns the maximum number of push descriptors.
|
/// Returns the maximum number of push descriptors.
|
||||||
u32 MaxPushDescriptors() const {
|
u32 MaxPushDescriptors() const {
|
||||||
return properties.push_descriptor.maxPushDescriptors;
|
return properties.push_descriptor.maxPushDescriptors;
|
||||||
|
|||||||
Reference in New Issue
Block a user