Shader OpCapability fallback + fp16 ban adjustments

src/android/app/src/main/res/values-ar/strings.xml

@@ -573,6 +573,8 @@
     <string name="gpu_log_level_description">مستوى التفاصيل لسجلات وحدة معالجة الرسومات (كلما زاد المستوى، زادت التفاصيل وزادت التكاليف الإضافية)</string>
     <string name="gpu_log_vulkan_calls">تسجيل استدعاءات واجهة برمجة تطبيقات Vulkan</string>
     <string name="gpu_log_vulkan_calls_description">تتبع جميع استدعاءات واجهة برمجة تطبيقات Vulkan في المخزن المؤقت الحلقي</string>
+    <string name="gpu_log_shader_dumps">تفريغ التظليل</string>
+    <string name="gpu_log_shader_dumps_description">حفظ تظليل SPIR-V المجمع في ملفات</string>
     <string name="gpu_log_memory_tracking">تتبع ذاكرة وحدة معالجة الرسومات</string>
     <string name="gpu_log_memory_tracking_description">مراقبة تخصيصات ذاكرة وحدة معالجة الرسومات وإلغاء تخصيصها</string>
     <string name="gpu_log_driver_debug">معلومات تصحيح أخطاء برنامج التشغيل</string>

src/android/app/src/main/res/values-es/strings.xml

@@ -491,8 +491,6 @@
     <string name="renderer_reactive_flushing_description">Mejora la precisión de renderizado en algunos juegos, pero reduce el rendimiento.</string>
     <string name="enable_buffer_history">Activar el historial del búfer</string>
     <string name="enable_buffer_history_description">Permite el acceso al estado del búfer anterior. Esta opción puede mejorar la calidad de renderizado y la consistencia en el rendimiento de algunos juegos.</string>
-    <string name="enable_gpu_buffer_readback">Activar la lectura del buffer de la GPU</string>
-    <string name="enable_gpu_buffer_readback_description">Conserva los datos del búfer modificados por la GPU leyéndolos antes de subirlos.\nAlgunos juegos requieren esto para renderizar correctamente ciertos efectos.\nPuede causar problemas si el hardware no puede soportar la carga de trabajo adicional.</string>
     <string name="use_optimized_vertex_buffers">Búferes de vértices optimizados</string>
     <string name="use_optimized_vertex_buffers_description">Permite la optimización del enlace del búfer de vértices para un mejor rendimiento. Requiere controladores Mesa 26.0+ Turnip/ controladores QCOM. Fallará con controladores Turnip más antiguos (versión 25.3 o inferior).</string>
 
@@ -569,12 +567,8 @@
     <string name="gpu_log_level_description">Nivel de detalle de los registros de la GPU (más alto = más detalles, más sobrecarga)</string>
     <string name="gpu_log_vulkan_calls">Registros de llamadas del API de Vulkan</string>
     <string name="gpu_log_vulkan_calls_description">Rastrear todas las llamadas del API de Vulkan en el búfer circular</string>
-    <string name="gpu_log_shader_dumps">Volcar sombreadores SPIR-V</string>
-    <string name="gpu_log_shader_dumps_description">Guardar binarios recompilados SPIR-V (.spv) a la carpeta de volcado. Inspeccionar con spirv-dis/spirv-cross/spirv-val.</string>
-    <string name="dump_guest_shaders">Volcar sombreadores huesped (Maxwell)</string>
-    <string name="dump_guest_shaders_description">Guardar archivos bytecode del sombreador huesped Maxwell (*.ash) a la carpeta de volcado. Inspeccionar con nvdisasm.</string>
-    <string name="dump_macros">Volcar macros Maxwell</string>
-    <string name="dump_macros_description">Guardar archivos de programa macro Maxwell (*.macro) a la carpeta de volcado. Inspeccionar con envydis.</string>
+    <string name="gpu_log_shader_dumps">Volcar sombreadores</string>
+    <string name="gpu_log_shader_dumps_description">Guardar sombreadores compilados de SPIR-V en archivos</string>
     <string name="gpu_log_memory_tracking">Rastrear memoria de la GPU</string>
     <string name="gpu_log_memory_tracking_description">Monitorizar las asignaciones y desasignaciones de memoria de la GPU</string>
     <string name="gpu_log_driver_debug">Información de depuración del controlador</string>

src/android/app/src/main/res/values-fr/strings.xml

@@ -527,6 +527,8 @@
     <string name="gpu_logging_header">Journalisation GPU</string>
     <string name="gpu_log_level">Niveau de journalisation</string>
     <string name="gpu_log_vulkan_calls">Journaliser les appels API Vulkan</string>
+    <string name="gpu_log_shader_dumps">Extraire les shaders</string>
+    <string name="gpu_log_shader_dumps_description">Sauvegarder le shader SPIR-V complié dans les fichiers</string>
     <string name="gpu_log_memory_tracking">Monitorer la mémoire GPU</string>
     <string name="gpu_log_memory_tracking_description">Monitorer les allocations et désallocations de la mémoire GPU</string>
     <string name="gpu_log_driver_debug">Informations de débogage du pilote</string>

src/android/app/src/main/res/values-ru/strings.xml

@@ -566,6 +566,8 @@
     <string name="gpu_log_level_description">Уровень детализации логов ГПУ (больше значение = больше деталей, выше нагрузка)</string>
     <string name="gpu_log_vulkan_calls">Записывать вызовы Vulkan API</string>
     <string name="gpu_log_vulkan_calls_description">Отслеживать все вызовы Vulkan API в кольцевом буфере</string>
+    <string name="gpu_log_shader_dumps">Выгрузить шейдеры</string>
+    <string name="gpu_log_shader_dumps_description">Сохранять скомпилированные SPIR-V шейдеры в файлы</string>
     <string name="gpu_log_memory_tracking">Отслеживать память ГПУ</string>
     <string name="gpu_log_memory_tracking_description">Мониторить выделение и освобождение памяти ГПУ</string>
     <string name="gpu_log_driver_debug">Отладочная информация драйвера</string>

src/android/app/src/main/res/values-uk/strings.xml

@@ -569,6 +569,8 @@
     <string name="gpu_log_level_description">Рівень подробиць у журналі ГП (вищий = більше подробиць, більший вплив на швидкодію)</string>
     <string name="gpu_log_vulkan_calls">Записувати виклики API Vulkan</string>
     <string name="gpu_log_vulkan_calls_description">Відстежувати всі виклики API Vulkan у кільцевому буфері</string>
+    <string name="gpu_log_shader_dumps">Зберігати шейдери</string>
+    <string name="gpu_log_shader_dumps_description">Зберігати до файлів скомпільовані шейдери SPIR-V</string>
     <string name="gpu_log_memory_tracking">Відстежувати пам’ять ГП</string>
     <string name="gpu_log_memory_tracking_description">Відстежувати використання і звільнення пам’яті ГП</string>
     <string name="gpu_log_driver_debug">Зневаджувальна інформація драйверів</string>

src/android/app/src/main/res/values-zh-rCN/strings.xml

@@ -487,8 +487,6 @@
     <string name="renderer_reactive_flushing_description">通过牺牲性能来提升某些游戏的渲染精度。</string>
     <string name="enable_buffer_history">启用缓冲区历史</string>
     <string name="enable_buffer_history_description">启用对先前缓冲区状态的访问。此选项可在某些游戏中提升渲染质量并保持性能的一致性。</string>
-    <string name="enable_gpu_buffer_readback">启用 GPU 缓冲区回读</string>
-    <string name="enable_gpu_buffer_readback_description">在上传前回读经由 GPU 修改过的缓冲区数据，以将其保留。一些游戏需要这样做才能正确渲染某些效果。如果硬件无法处理额外的工作负载，则可能会导致问题。</string>
     <string name="use_optimized_vertex_buffers">优化顶点缓冲区</string>
     <string name="use_optimized_vertex_buffers_description">启用经过优化的顶点缓冲区绑定以提升性能。需要 Mesa 26.0 及以上版本的 Turnip 或 QCOM 驱动程序。若使用较旧版本的 Turnip 驱动 (25.3 及以下版本) 则会导致崩溃。</string>
 
@@ -565,12 +563,8 @@
     <string name="gpu_log_level_description">GPU 日志的详细级别(数值越高 = 细节越多,开销越大)</string>
     <string name="gpu_log_vulkan_calls">记录 Vulkan API 调用</string>
     <string name="gpu_log_vulkan_calls_description">在环形缓冲区中跟踪所有 Vulkan API 调用</string>
-    <string name="gpu_log_shader_dumps">转储 SPIR-V 着色器</string>
-    <string name="gpu_log_shader_dumps_description">将经过重编译的 SPIR-V 二进制文件（.spv）保存到 dump 文件夹中。使用 spirv-dis/spirv-cross/spirv-val 进行检查。</string>
-    <string name="dump_guest_shaders">转储 Guest (Maxwell) 着色器</string>
-    <string name="dump_guest_shaders_description">将 Maxwell guest 着色器字节码文件（*.ash）保存到 dump 文件夹。使用 nvdisasm 进行检查。</string>
-    <string name="dump_macros">转储 Maxwell 宏</string>
-    <string name="dump_macros_description">将 Maxwell 宏程序文件（*.macro）保存到 dump 文件夹。使用 envydis 进行检查。</string>
+    <string name="gpu_log_shader_dumps">转储着色器</string>
+    <string name="gpu_log_shader_dumps_description">保存已编译的着色器 SPIR-V 到文件中</string>
     <string name="gpu_log_memory_tracking">追踪 GPU 内存</string>
     <string name="gpu_log_memory_tracking_description">监控 GPU 内存的分配和释放</string>
     <string name="gpu_log_driver_debug">驱动调试信息</string>

src/shader_recompiler/backend/spirv/emit_spirv.cpp

@@ -332,6 +332,9 @@ void DefineEntryPoint(const IR::Program& program, EmitContext& ctx, Id main) {
 void SetupDenormControl(const Profile& profile, const IR::Program& program, EmitContext& ctx,
                         Id main_func) {
     const Info& info{program.info};
+    if (profile.has_broken_fp16_float_controls && info.uses_fp16) {
+        return;
+    }
     if (info.uses_fp32_denorms_flush && info.uses_fp32_denorms_preserve) {
         LOG_DEBUG(Shader_SPIRV, "Fp32 denorm flush and preserve on the same shader");
     } else if (info.uses_fp32_denorms_flush) {
@@ -432,7 +435,7 @@ void SetupCapabilities(const Profile& profile, const Info& info, EmitContext& ct
     }
     if ((info.uses_subgroup_vote || info.uses_subgroup_invocation_id ||
          info.uses_subgroup_shuffles) &&
-        profile.support_vote) {
+        profile.support_vote && profile.SupportsSubgroupStage(ctx.stage)) {
         ctx.AddCapability(spv::Capability::GroupNonUniformBallot);
         ctx.AddCapability(spv::Capability::GroupNonUniformShuffle);
         if (!profile.warp_size_potentially_larger_than_guest) {

src/shader_recompiler/backend/spirv/emit_spirv_atomic.cpp

@@ -1,3 +1,6 @@
+// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project
+// SPDX-License-Identifier: GPL-3.0-or-later
+
 // SPDX-FileCopyrightText: Copyright 2021 yuzu Emulator Project
 // SPDX-License-Identifier: GPL-2.0-or-later
 
@@ -15,7 +18,7 @@ Id SharedPointer(EmitContext& ctx, Id offset, u32 index_offset = 0) {
     if (index_offset > 0) {
         index = ctx.OpIAdd(ctx.U32[1], index, ctx.Const(index_offset));
     }
-    return ctx.profile.support_explicit_workgroup_layout
+    return ctx.uses_explicit_workgroup_layout
                ? ctx.OpAccessChain(ctx.shared_u32, ctx.shared_memory_u32, ctx.u32_zero_value, index)
                : ctx.OpAccessChain(ctx.shared_u32, ctx.shared_memory_u32, index);
 }
@@ -155,7 +158,7 @@ Id EmitSharedAtomicExchange32(EmitContext& ctx, Id offset, Id value) {
 }
 
 Id EmitSharedAtomicExchange64(EmitContext& ctx, Id offset, Id value) {
-    if (ctx.profile.support_int64_atomics && ctx.profile.support_explicit_workgroup_layout) {
+    if (ctx.profile.support_shared_int64_atomics && ctx.uses_explicit_workgroup_layout) {
         const Id shift_id{ctx.Const(3U)};
         const Id index{ctx.OpShiftRightArithmetic(ctx.U32[1], offset, shift_id)};
         const Id pointer{

src/shader_recompiler/backend/spirv/emit_spirv_memory.cpp

@@ -1,3 +1,6 @@
+// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project
+// SPDX-License-Identifier: GPL-3.0-or-later
+
 // SPDX-FileCopyrightText: Copyright 2021 yuzu Emulator Project
 // SPDX-License-Identifier: GPL-2.0-or-later
 

src/shader_recompiler/backend/spirv/emit_spirv_shared_memory.cpp

@@ -1,3 +1,6 @@
+// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project
+// SPDX-License-Identifier: GPL-3.0-or-later
+
 // SPDX-FileCopyrightText: Copyright 2021 yuzu Emulator Project
 // SPDX-License-Identifier: GPL-2.0-or-later
 
@@ -28,7 +31,7 @@ std::pair<Id, Id> ExtractArgs(EmitContext& ctx, Id offset, u32 mask, u32 count)
 } // Anonymous namespace
 
 Id EmitLoadSharedU8(EmitContext& ctx, Id offset) {
-    if (ctx.profile.support_explicit_workgroup_layout) {
+    if (ctx.uses_explicit_workgroup_layout) {
         const Id pointer{
             ctx.OpAccessChain(ctx.shared_u8, ctx.shared_memory_u8, ctx.u32_zero_value, offset)};
         return ctx.OpUConvert(ctx.U32[1], ctx.OpLoad(ctx.U8, pointer));
@@ -39,7 +42,7 @@ Id EmitLoadSharedU8(EmitContext& ctx, Id offset) {
 }
 
 Id EmitLoadSharedS8(EmitContext& ctx, Id offset) {
-    if (ctx.profile.support_explicit_workgroup_layout) {
+    if (ctx.uses_explicit_workgroup_layout) {
         const Id pointer{
             ctx.OpAccessChain(ctx.shared_u8, ctx.shared_memory_u8, ctx.u32_zero_value, offset)};
         return ctx.OpSConvert(ctx.U32[1], ctx.OpLoad(ctx.U8, pointer));
@@ -50,7 +53,7 @@ Id EmitLoadSharedS8(EmitContext& ctx, Id offset) {
 }
 
 Id EmitLoadSharedU16(EmitContext& ctx, Id offset) {
-    if (ctx.profile.support_explicit_workgroup_layout) {
+    if (ctx.uses_explicit_workgroup_layout) {
         const Id pointer{Pointer(ctx, ctx.shared_u16, ctx.shared_memory_u16, offset, 1)};
         return ctx.OpUConvert(ctx.U32[1], ctx.OpLoad(ctx.U16, pointer));
     } else {
@@ -60,7 +63,7 @@ Id EmitLoadSharedU16(EmitContext& ctx, Id offset) {
 }
 
 Id EmitLoadSharedS16(EmitContext& ctx, Id offset) {
-    if (ctx.profile.support_explicit_workgroup_layout) {
+    if (ctx.uses_explicit_workgroup_layout) {
         const Id pointer{Pointer(ctx, ctx.shared_u16, ctx.shared_memory_u16, offset, 1)};
         return ctx.OpSConvert(ctx.U32[1], ctx.OpLoad(ctx.U16, pointer));
     } else {
@@ -70,7 +73,7 @@ Id EmitLoadSharedS16(EmitContext& ctx, Id offset) {
 }
 
 Id EmitLoadSharedU32(EmitContext& ctx, Id offset) {
-    if (ctx.profile.support_explicit_workgroup_layout) {
+    if (ctx.uses_explicit_workgroup_layout) {
         const Id pointer{Pointer(ctx, ctx.shared_u32, ctx.shared_memory_u32, offset, 2)};
         return ctx.OpLoad(ctx.U32[1], pointer);
     } else {
@@ -79,7 +82,7 @@ Id EmitLoadSharedU32(EmitContext& ctx, Id offset) {
 }
 
 Id EmitLoadSharedU64(EmitContext& ctx, Id offset) {
-    if (ctx.profile.support_explicit_workgroup_layout) {
+    if (ctx.uses_explicit_workgroup_layout) {
         const Id pointer{Pointer(ctx, ctx.shared_u32x2, ctx.shared_memory_u32x2, offset, 3)};
         return ctx.OpLoad(ctx.U32[2], pointer);
     } else {
@@ -94,7 +97,7 @@ Id EmitLoadSharedU64(EmitContext& ctx, Id offset) {
 }
 
 Id EmitLoadSharedU128(EmitContext& ctx, Id offset) {
-    if (ctx.profile.support_explicit_workgroup_layout) {
+    if (ctx.uses_explicit_workgroup_layout) {
         const Id pointer{Pointer(ctx, ctx.shared_u32x4, ctx.shared_memory_u32x4, offset, 4)};
         return ctx.OpLoad(ctx.U32[4], pointer);
     }
@@ -110,7 +113,7 @@ Id EmitLoadSharedU128(EmitContext& ctx, Id offset) {
 }
 
 void EmitWriteSharedU8(EmitContext& ctx, Id offset, Id value) {
-    if (ctx.profile.support_explicit_workgroup_layout) {
+    if (ctx.uses_explicit_workgroup_layout) {
         const Id pointer{
             ctx.OpAccessChain(ctx.shared_u8, ctx.shared_memory_u8, ctx.u32_zero_value, offset)};
         ctx.OpStore(pointer, ctx.OpUConvert(ctx.U8, value));
@@ -120,7 +123,7 @@ void EmitWriteSharedU8(EmitContext& ctx, Id offset, Id value) {
 }
 
 void EmitWriteSharedU16(EmitContext& ctx, Id offset, Id value) {
-    if (ctx.profile.support_explicit_workgroup_layout) {
+    if (ctx.uses_explicit_workgroup_layout) {
         const Id pointer{Pointer(ctx, ctx.shared_u16, ctx.shared_memory_u16, offset, 1)};
         ctx.OpStore(pointer, ctx.OpUConvert(ctx.U16, value));
     } else {
@@ -130,7 +133,7 @@ void EmitWriteSharedU16(EmitContext& ctx, Id offset, Id value) {
 
 void EmitWriteSharedU32(EmitContext& ctx, Id offset, Id value) {
     Id pointer{};
-    if (ctx.profile.support_explicit_workgroup_layout) {
+    if (ctx.uses_explicit_workgroup_layout) {
         pointer = Pointer(ctx, ctx.shared_u32, ctx.shared_memory_u32, offset, 2);
     } else {
         const Id shift{ctx.Const(2U)};
@@ -141,7 +144,7 @@ void EmitWriteSharedU32(EmitContext& ctx, Id offset, Id value) {
 }
 
 void EmitWriteSharedU64(EmitContext& ctx, Id offset, Id value) {
-    if (ctx.profile.support_explicit_workgroup_layout) {
+    if (ctx.uses_explicit_workgroup_layout) {
         const Id pointer{Pointer(ctx, ctx.shared_u32x2, ctx.shared_memory_u32x2, offset, 3)};
         ctx.OpStore(pointer, value);
         return;
@@ -156,7 +159,7 @@ void EmitWriteSharedU64(EmitContext& ctx, Id offset, Id value) {
 }
 
 void EmitWriteSharedU128(EmitContext& ctx, Id offset, Id value) {
-    if (ctx.profile.support_explicit_workgroup_layout) {
+    if (ctx.uses_explicit_workgroup_layout) {
         const Id pointer{Pointer(ctx, ctx.shared_u32x4, ctx.shared_memory_u32x4, offset, 4)};
         ctx.OpStore(pointer, value);
         return;

src/shader_recompiler/backend/spirv/emit_spirv_warp.cpp

@@ -1,3 +1,6 @@
+// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project
+// SPDX-License-Identifier: GPL-3.0-or-later
+
 // SPDX-FileCopyrightText: Copyright 2021 yuzu Emulator Project
 // SPDX-License-Identifier: GPL-2.0-or-later
 
@@ -10,7 +13,14 @@ Id SubgroupScope(EmitContext& ctx) {
     return ctx.Const(static_cast<u32>(spv::Scope::Subgroup));
 }
 
+bool StageSupportsSubgroups(EmitContext& ctx) {
+    return ctx.profile.SupportsSubgroupStage(ctx.stage);
+}
+
 Id GetThreadId(EmitContext& ctx) {
+    if (!StageSupportsSubgroups(ctx)) {
+        return ctx.u32_zero_value;
+    }
     return ctx.OpLoad(ctx.U32[1], ctx.subgroup_local_invocation_id);
 }
 
@@ -68,6 +78,9 @@ Id GetMaxThreadId(EmitContext& ctx, Id thread_id, Id clamp, Id segmentation_mask
 }
 
 Id SelectValue(EmitContext& ctx, Id in_range, Id value, Id src_thread_id) {
+    if (!StageSupportsSubgroups(ctx)) {
+        return value;
+    }
     return ctx.OpSelect(
         ctx.U32[1], in_range,
         ctx.OpGroupNonUniformShuffle(ctx.U32[1], SubgroupScope(ctx), value, src_thread_id), value);
@@ -89,6 +102,9 @@ Id EmitLaneId(EmitContext& ctx) {
 }
 
 Id EmitVoteAll(EmitContext& ctx, Id pred) {
+    if (!StageSupportsSubgroups(ctx)) {
+        return pred;
+    }
     if (!ctx.profile.warp_size_potentially_larger_than_guest) {
         return ctx.OpGroupNonUniformAll(ctx.U1, SubgroupScope(ctx), pred);
     }
@@ -102,6 +118,9 @@ Id EmitVoteAll(EmitContext& ctx, Id pred) {
 }
 
 Id EmitVoteAny(EmitContext& ctx, Id pred) {
+    if (!StageSupportsSubgroups(ctx)) {
+        return pred;
+    }
     if (!ctx.profile.warp_size_potentially_larger_than_guest) {
         return ctx.OpGroupNonUniformAny(ctx.U1, SubgroupScope(ctx), pred);
     }
@@ -115,6 +134,9 @@ Id EmitVoteAny(EmitContext& ctx, Id pred) {
 }
 
 Id EmitVoteEqual(EmitContext& ctx, Id pred) {
+    if (!StageSupportsSubgroups(ctx)) {
+        return ctx.true_value;
+    }
     if (!ctx.profile.warp_size_potentially_larger_than_guest) {
         return ctx.OpGroupNonUniformAllEqual(ctx.U1, SubgroupScope(ctx), pred);
     }
@@ -129,6 +151,9 @@ Id EmitVoteEqual(EmitContext& ctx, Id pred) {
 }
 
 Id EmitSubgroupBallot(EmitContext& ctx, Id pred) {
+    if (!StageSupportsSubgroups(ctx)) {
+        return ctx.OpSelect(ctx.U32[1], pred, ctx.Const(1u), ctx.u32_zero_value);
+    }
     const Id ballot{ctx.OpGroupNonUniformBallot(ctx.U32[4], SubgroupScope(ctx), pred)};
     if (!ctx.profile.warp_size_potentially_larger_than_guest) {
         return ctx.OpCompositeExtract(ctx.U32[1], ballot, 0U);
@@ -137,22 +162,37 @@ Id EmitSubgroupBallot(EmitContext& ctx, Id pred) {
 }
 
 Id EmitSubgroupEqMask(EmitContext& ctx) {
+    if (!StageSupportsSubgroups(ctx)) {
+        return ctx.Const(1u);
+    }
     return LoadMask(ctx, ctx.subgroup_mask_eq);
 }
 
 Id EmitSubgroupLtMask(EmitContext& ctx) {
+    if (!StageSupportsSubgroups(ctx)) {
+        return ctx.u32_zero_value;
+    }
     return LoadMask(ctx, ctx.subgroup_mask_lt);
 }
 
 Id EmitSubgroupLeMask(EmitContext& ctx) {
+    if (!StageSupportsSubgroups(ctx)) {
+        return ctx.Const(1u);
+    }
     return LoadMask(ctx, ctx.subgroup_mask_le);
 }
 
 Id EmitSubgroupGtMask(EmitContext& ctx) {
+    if (!StageSupportsSubgroups(ctx)) {
+        return ctx.u32_zero_value;
+    }
     return LoadMask(ctx, ctx.subgroup_mask_gt);
 }
 
 Id EmitSubgroupGeMask(EmitContext& ctx) {
+    if (!StageSupportsSubgroups(ctx)) {
+        return ctx.Const(1u);
+    }
     return LoadMask(ctx, ctx.subgroup_mask_ge);
 }
 
@@ -222,7 +262,7 @@ Id EmitShuffleButterfly(EmitContext& ctx, IR::Inst* inst, Id value, Id index, Id
 
 Id EmitFSwizzleAdd(EmitContext& ctx, Id op_a, Id op_b, Id swizzle) {
     const Id three{ctx.Const(3U)};
-    Id mask{ctx.OpLoad(ctx.U32[1], ctx.subgroup_local_invocation_id)};
+    Id mask{GetThreadId(ctx)};
     mask = ctx.OpBitwiseAnd(ctx.U32[1], mask, three);
     mask = ctx.OpShiftLeftLogical(ctx.U32[1], mask, ctx.Const(1U));
     mask = ctx.OpShiftRightLogical(ctx.U32[1], swizzle, mask);

src/shader_recompiler/backend/spirv/spirv_emit_context.cpp

@@ -371,7 +371,7 @@ Id CasFunction(EmitContext& ctx, Operation operation, Id value_type) {
 Id CasLoop(EmitContext& ctx, Operation operation, Id array_pointer, Id element_pointer,
            Id value_type, Id memory_type, spv::Scope scope) {
     const bool is_shared{scope == spv::Scope::Workgroup};
-    const bool is_struct{!is_shared || ctx.profile.support_explicit_workgroup_layout};
+    const bool is_struct{!is_shared || ctx.uses_explicit_workgroup_layout};
     const Id cas_func{CasFunction(ctx, operation, value_type)};
     const Id zero{ctx.u32_zero_value};
     const Id scope_id{ctx.Const(static_cast<u32>(scope))};
@@ -620,7 +620,11 @@ void EmitContext::DefineSharedMemory(const IR::Program& program) {
 
         return std::make_tuple(variable, element_pointer, pointer);
     }};
-    if (profile.support_explicit_workgroup_layout) {
+    uses_explicit_workgroup_layout =
+        profile.support_explicit_workgroup_layout &&
+        (!program.info.uses_int8 || profile.support_workgroup_layout_8bit_access) &&
+        (!program.info.uses_int16 || profile.support_workgroup_layout_16bit_access);
+    if (uses_explicit_workgroup_layout) {
         AddExtension("SPV_KHR_workgroup_memory_explicit_layout");
         AddCapability(spv::Capability::WorkgroupMemoryExplicitLayoutKHR);
         if (program.info.uses_int8) {
@@ -938,6 +942,10 @@ void EmitContext::DefineGlobalMemoryFunctions(const Info& info) {
     if (!info.uses_global_memory || !profile.support_int64) {
         return;
     }
+    if (!profile.support_descriptor_aliasing) {
+        DefineGlobalMemoryFunctionsU32Fallback(info);
+        return;
+    }
     using DefPtr = Id StorageDefinitions::*;
     const Id zero{u32_zero_value};
     const auto define_body{[&](DefPtr ssbo_member, Id addr, Id element_pointer, u32 shift,
@@ -1015,6 +1023,111 @@ void EmitContext::DefineGlobalMemoryFunctions(const Info& info) {
         define(&StorageDefinitions::U32x4, storage_types.U32x4, U32[4], sizeof(u32[4]));
 }
 
+void EmitContext::DefineGlobalMemoryFunctionsU32Fallback(const Info& info) {
+    const Id zero{u32_zero_value};
+    const auto define_body{[&](Id addr, u32 num_words, auto&& callback) {
+        AddLabel();
+        const size_t num_buffers{info.storage_buffers_descriptors.size()};
+        for (size_t index = 0; index < num_buffers; ++index) {
+            if (!info.nvn_buffer_used[index]) {
+                continue;
+            }
+            const auto& ssbo{info.storage_buffers_descriptors[index]};
+            const u32 addr_word{ssbo.cbuf_offset / 4};
+            const u32 addr_lo_comp{addr_word % 4};
+            const Id cbuf{cbufs[ssbo.cbuf_index].U32x4};
+            const Id addr_vec_pointer{
+                OpAccessChain(uniform_types.U32x4, cbuf, zero, Const(addr_word / 4))};
+            const Id addr_vec{OpLoad(U32[4], addr_vec_pointer)};
+            const Id addr_lo{OpCompositeExtract(U32[1], addr_vec, addr_lo_comp)};
+            const Id addr_hi{OpCompositeExtract(U32[1], addr_vec, addr_lo_comp + 1U)};
+            const Id unaligned_addr{
+                OpBitcast(U64, OpCompositeConstruct(U32[2], addr_lo, addr_hi))};
+
+            const u64 ssbo_align_mask{~(profile.min_ssbo_alignment - 1U)};
+            const Id ssbo_addr{OpBitwiseAnd(U64, unaligned_addr, Constant(U64, ssbo_align_mask))};
+
+            const u32 size_word{addr_word + 2};
+            Id size_vec{addr_vec};
+            if (size_word / 4 != addr_word / 4) {
+                const Id size_vec_pointer{
+                    OpAccessChain(uniform_types.U32x4, cbuf, zero, Const(size_word / 4))};
+                size_vec = OpLoad(U32[4], size_vec_pointer);
+            }
+            const Id ssbo_size{
+                OpUConvert(U64, OpCompositeExtract(U32[1], size_vec, size_word % 4))};
+            const Id ssbo_end{OpIAdd(U64, ssbo_addr, ssbo_size)};
+            const Id cond{OpLogicalAnd(U1, OpUGreaterThanEqual(U1, addr, ssbo_addr),
+                                       OpULessThan(U1, addr, ssbo_end))};
+            const Id then_label{OpLabel()};
+            const Id else_label{OpLabel()};
+            OpSelectionMerge(else_label, spv::SelectionControlMask::MaskNone);
+            OpBranchConditional(cond, then_label, else_label);
+            AddLabel(then_label);
+            const Id ssbo_id{ssbos[index].U32};
+            const Id ssbo_offset{OpUConvert(U32[1], OpISub(U64, addr, ssbo_addr))};
+            const Id base_word{OpShiftRightLogical(U32[1], ssbo_offset, Const(2U))};
+            std::array<Id, 4> word_pointers{};
+            for (u32 word = 0; word < num_words; ++word) {
+                const Id word_index{word == 0 ? base_word
+                                              : OpIAdd(U32[1], base_word, Const(word))};
+                word_pointers[word] =
+                    OpAccessChain(storage_types.U32.element, ssbo_id, zero, word_index);
+            }
+            callback(word_pointers);
+            AddLabel(else_label);
+        }
+    }};
+    const auto define_load{[&](Id type, u32 num_words) {
+        const Id function_type{TypeFunction(type, U64)};
+        const Id func_id{OpFunction(type, spv::FunctionControlMask::MaskNone, function_type)};
+        const Id addr{OpFunctionParameter(U64)};
+        define_body(addr, num_words, [&](const std::array<Id, 4>& pointers) {
+            std::array<Id, 4> words{};
+            for (u32 word = 0; word < num_words; ++word) {
+                words[word] = OpLoad(U32[1], pointers[word]);
+            }
+            switch (num_words) {
+            case 1:
+                OpReturnValue(words[0]);
+                break;
+            case 2:
+                OpReturnValue(OpCompositeConstruct(type, words[0], words[1]));
+                break;
+            default:
+                OpReturnValue(
+                    OpCompositeConstruct(type, words[0], words[1], words[2], words[3]));
+                break;
+            }
+        });
+        OpReturnValue(ConstantNull(type));
+        OpFunctionEnd();
+        return func_id;
+    }};
+    const auto define_write{[&](Id type, u32 num_words) {
+        const Id function_type{TypeFunction(void_id, U64, type)};
+        const Id func_id{OpFunction(void_id, spv::FunctionControlMask::MaskNone, function_type)};
+        const Id addr{OpFunctionParameter(U64)};
+        const Id data{OpFunctionParameter(type)};
+        define_body(addr, num_words, [&](const std::array<Id, 4>& pointers) {
+            for (u32 word = 0; word < num_words; ++word) {
+                const Id value{num_words == 1 ? data : OpCompositeExtract(U32[1], data, word)};
+                OpStore(pointers[word], value);
+            }
+            OpReturn();
+        });
+        OpReturn();
+        OpFunctionEnd();
+        return func_id;
+    }};
+    load_global_func_u32 = define_load(U32[1], 1);
+    load_global_func_u32x2 = define_load(U32[2], 2);
+    load_global_func_u32x4 = define_load(U32[4], 4);
+    write_global_func_u32 = define_write(U32[1], 1);
+    write_global_func_u32x2 = define_write(U32[2], 2);
+    write_global_func_u32x4 = define_write(U32[4], 4);
+}
+
 void EmitContext::DefineRescalingInput(const Info& info) {
     if (!info.uses_rescaling_uniform) {
         return;
@@ -1438,7 +1551,7 @@ void EmitContext::DefineInputs(const IR::Program& program) {
     if (info.uses_is_helper_invocation) {
         is_helper_invocation = DefineInput(*this, U1, false, spv::BuiltIn::HelperInvocation);
     }
-    if (info.uses_subgroup_mask) {
+    if (info.uses_subgroup_mask && profile.SupportsSubgroupStage(stage)) {
         subgroup_mask_eq = DefineInput(*this, U32[4], false, spv::BuiltIn::SubgroupEqMaskKHR);
         subgroup_mask_lt = DefineInput(*this, U32[4], false, spv::BuiltIn::SubgroupLtMaskKHR);
         subgroup_mask_le = DefineInput(*this, U32[4], false, spv::BuiltIn::SubgroupLeMaskKHR);
@@ -1452,9 +1565,10 @@ void EmitContext::DefineInputs(const IR::Program& program) {
             Decorate(subgroup_mask_ge, spv::Decoration::Flat);
         }
     }
-    if (info.uses_fswzadd || info.uses_subgroup_invocation_id || info.uses_subgroup_shuffles ||
-        (profile.warp_size_potentially_larger_than_guest &&
-         (info.uses_subgroup_vote || info.uses_subgroup_mask))) {
+    if ((info.uses_fswzadd || info.uses_subgroup_invocation_id || info.uses_subgroup_shuffles ||
+         (profile.warp_size_potentially_larger_than_guest &&
+          (info.uses_subgroup_vote || info.uses_subgroup_mask))) &&
+        profile.SupportsSubgroupStage(stage)) {
         AddCapability(spv::Capability::GroupNonUniform);
         subgroup_local_invocation_id =
             DefineInput(*this, U32[1], false, spv::BuiltIn::SubgroupLocalInvocationId);

src/shader_recompiler/backend/spirv/spirv_emit_context.h

@@ -310,6 +310,10 @@ public:
 
     Id local_memory{};
 
+    /// True when this shader's shared memory uses SPV_KHR_workgroup_memory_explicit_layout.
+    /// False when the host lacks the extension or a width this shader accesses natively.
+    bool uses_explicit_workgroup_layout{};
+
     Id shared_memory_u8{};
     Id shared_memory_u16{};
     Id shared_memory_u32{};
@@ -387,6 +391,7 @@ private:
     void DefineAttributeMemAccess(const Info& info);
     void DefineWriteStorageCasLoopFunction(const Info& info);
     void DefineGlobalMemoryFunctions(const Info& info);
+    void DefineGlobalMemoryFunctionsU32Fallback(const Info& info);
     void DefineRescalingInput(const Info& info);
     void DefineRescalingInputPushConstant();
     void DefineRescalingInputUniformConstant();

src/shader_recompiler/profile.h

@@ -10,6 +10,8 @@
 
 namespace Shader {
 
+enum class Stage : u32;
+
 struct Profile {
     u32 supported_spirv{0x00010000};
     bool unified_descriptor_binding{};
@@ -29,12 +31,16 @@ struct Profile {
     bool support_fp32_signed_zero_nan_preserve{};
     bool support_fp64_signed_zero_nan_preserve{};
     bool support_explicit_workgroup_layout{};
+    bool support_workgroup_layout_8bit_access{};
+    bool support_workgroup_layout_16bit_access{};
     bool support_vote{};
+    u32 supported_subgroup_stages{0x7F};
     bool support_viewport_index_layer_non_geometry{};
     bool support_viewport_mask{};
     bool support_typeless_image_loads{};
     bool support_demote_to_helper_invocation{};
     bool support_int64_atomics{};
+    bool support_shared_int64_atomics{};
     bool support_derivative_control{};
     bool support_geometry_shader_passthrough{};
     bool support_native_ndc{};
@@ -93,6 +99,10 @@ struct Profile {
 
     u64 min_ssbo_alignment{};
     u32 max_user_clip_distances{};
+
+    bool SupportsSubgroupStage(Stage stage) const {
+        return (supported_subgroup_stages & (1u << static_cast<u32>(stage))) != 0;
+    }
 };
 
 } // namespace Shader

src/video_core/host_shaders/block_linear_unswizzle_2d.comp

@@ -11,8 +11,9 @@
 #define BEGIN_PUSH_CONSTANTS layout(push_constant) uniform PushConstants {
 #define END_PUSH_CONSTANTS };
 #define UNIFORM(n)
-#define BINDING_INPUT_BUFFER 0
-#define BINDING_OUTPUT_IMAGE 1
+#define BINDING_SWIZZLE_BUFFER 0
+#define BINDING_INPUT_BUFFER 1
+#define BINDING_OUTPUT_IMAGE 2
 
 #else // ^^^ Vulkan ^^^ // vvv OpenGL vvv
 
@@ -25,7 +26,8 @@
 #define BEGIN_PUSH_CONSTANTS
 #define END_PUSH_CONSTANTS
 #define UNIFORM(n) layout (location = n) uniform
-#define BINDING_INPUT_BUFFER 0
+#define BINDING_SWIZZLE_BUFFER 0
+#define BINDING_INPUT_BUFFER 1
 #define BINDING_OUTPUT_IMAGE 0
 
 #endif
@@ -41,6 +43,10 @@ UNIFORM(6) uint block_height;
 UNIFORM(7) uint block_height_mask;
 END_PUSH_CONSTANTS
 
+layout(binding = BINDING_SWIZZLE_BUFFER, std430) readonly buffer SwizzleTable {
+    uint swizzle_table[];
+};
+
 #if HAS_EXTENDED_TYPES
 layout(binding = BINDING_INPUT_BUFFER, std430) buffer InputBufferU8 { uint8_t u8data[]; };
 layout(binding = BINDING_INPUT_BUFFER, std430) buffer InputBufferU16 { uint16_t u16data[]; };
@@ -65,19 +71,9 @@ const uint GOB_SIZE_SHIFT = GOB_SIZE_X_SHIFT + GOB_SIZE_Y_SHIFT + GOB_SIZE_Z_SHI
 
 const uvec2 SWIZZLE_MASK = uvec2(GOB_SIZE_X - 1, GOB_SIZE_Y - 1);
 
-uint SwizzleTable(uint pos) {
-    const uint t[8] = uint[](
-        0x12100200, 0x13110301, 0x16140604, 0x17150705,
-        0x1a180a08, 0x1b190b09, 0x1e1c0e0c, 0x1f1d0f0d
-    );
-    const uint i = pos >> 4;
-    const uint h = (t[i / 4] >> ((i % 4) * 8)) & 0xff;
-    return (h << 4) | (pos & 0xf);
-}
-
 uint SwizzleOffset(uvec2 pos) {
     pos = pos & SWIZZLE_MASK;
-    return SwizzleTable(pos.y * 64 + pos.x);
+    return swizzle_table[pos.y * 64 + pos.x];
 }
 
 uvec4 ReadTexel(uint offset) {

src/video_core/host_shaders/block_linear_unswizzle_3d.comp

@@ -11,8 +11,9 @@
 #define BEGIN_PUSH_CONSTANTS layout(push_constant) uniform PushConstants {
 #define END_PUSH_CONSTANTS };
 #define UNIFORM(n)
-#define BINDING_INPUT_BUFFER 0
-#define BINDING_OUTPUT_IMAGE 1
+#define BINDING_SWIZZLE_BUFFER 0
+#define BINDING_INPUT_BUFFER 1
+#define BINDING_OUTPUT_IMAGE 2
 
 #else // ^^^ Vulkan ^^^ // vvv OpenGL vvv
 
@@ -25,7 +26,8 @@
 #define BEGIN_PUSH_CONSTANTS
 #define END_PUSH_CONSTANTS
 #define UNIFORM(n) layout (location = n) uniform
-#define BINDING_INPUT_BUFFER 0
+#define BINDING_SWIZZLE_BUFFER 0
+#define BINDING_INPUT_BUFFER 1
 #define BINDING_OUTPUT_IMAGE 0
 
 #endif
@@ -43,6 +45,10 @@ UNIFORM(8) uint block_depth;
 UNIFORM(9) uint block_depth_mask;
 END_PUSH_CONSTANTS
 
+layout(binding = BINDING_SWIZZLE_BUFFER, std430) readonly buffer SwizzleTable {
+    uint swizzle_table[];
+};
+
 #if HAS_EXTENDED_TYPES
 layout(binding = BINDING_INPUT_BUFFER, std430) buffer InputBufferU8 { uint8_t u8data[]; };
 layout(binding = BINDING_INPUT_BUFFER, std430) buffer InputBufferU16 { uint16_t u16data[]; };
@@ -67,19 +73,9 @@ const uint GOB_SIZE_SHIFT = GOB_SIZE_X_SHIFT + GOB_SIZE_Y_SHIFT + GOB_SIZE_Z_SHI
 
 const uvec2 SWIZZLE_MASK = uvec2(GOB_SIZE_X - 1, GOB_SIZE_Y - 1);
 
-uint SwizzleTable(uint pos) {
-    const uint t[8] = uint[](
-        0x12100200, 0x13110301, 0x16140604, 0x17150705,
-        0x1a180a08, 0x1b190b09, 0x1e1c0e0c, 0x1f1d0f0d
-    );
-    const uint i = pos >> 4;
-    const uint h = (t[i / 4] >> ((i % 4) * 8)) & 0xff;
-    return (h << 4) | (pos & 0xf);
-}
-
 uint SwizzleOffset(uvec2 pos) {
     pos = pos & SWIZZLE_MASK;
-    return SwizzleTable(pos.y * 64 + pos.x);
+    return swizzle_table[pos.y * 64 + pos.x];
 }
 
 uvec4 ReadTexel(uint offset) {

src/video_core/host_shaders/block_linear_unswizzle_3d_bcn.comp

@@ -10,8 +10,9 @@
     #define BEGIN_PUSH_CONSTANTS layout(push_constant) uniform PushConstants {
     #define END_PUSH_CONSTANTS };
     #define UNIFORM(n)
-    #define BINDING_INPUT_BUFFER   0
-    #define BINDING_OUTPUT_BUFFER  1
+    #define BINDING_SWIZZLE_BUFFER 0
+    #define BINDING_INPUT_BUFFER   1
+    #define BINDING_OUTPUT_BUFFER  2
 #else
     #extension GL_NV_gpu_shader5 : enable
     #ifdef GL_NV_gpu_shader5
@@ -22,6 +23,7 @@
     #define BEGIN_PUSH_CONSTANTS
     #define END_PUSH_CONSTANTS
     #define UNIFORM(n) layout(location = n) uniform
+    #define BINDING_SWIZZLE_BUFFER 0
     #define BINDING_INPUT_BUFFER   1
     #define BINDING_OUTPUT_BUFFER  0
 #endif
@@ -64,9 +66,13 @@ END_PUSH_CONSTANTS
 #endif
 
 // --- Buffers ---
+layout(binding = BINDING_SWIZZLE_BUFFER, std430) readonly buffer SwizzleTable {
+    uint swizzle_table[];
+};
+
 #if HAS_EXTENDED_TYPES
-layout(binding = BINDING_INPUT_BUFFER, std430) buffer InputBufferU8   { uint8_t  u8data[];  };
-layout(binding = BINDING_INPUT_BUFFER, std430) buffer InputBufferU16  { uint16_t u16data[]; };
+    layout(binding = BINDING_INPUT_BUFFER, std430) buffer InputBufferU8   { uint8_t  u8data[];  };
+    layout(binding = BINDING_INPUT_BUFFER, std430) buffer InputBufferU16  { uint16_t u16data[]; };
 #endif
 layout(binding = BINDING_INPUT_BUFFER, std430) buffer InputBufferU32  { uint   u32data[];  };
 layout(binding = BINDING_INPUT_BUFFER, std430) buffer InputBufferU64  { uvec2  u64data[];  };
@@ -90,20 +96,10 @@ const uint GOB_SIZE_Z_SHIFT = 0;
 const uint GOB_SIZE_SHIFT   = GOB_SIZE_X_SHIFT + GOB_SIZE_Y_SHIFT + GOB_SIZE_Z_SHIFT;
 const uvec2 SWIZZLE_MASK = uvec2(GOB_SIZE_X - 1u, GOB_SIZE_Y - 1u);
 
-uint SwizzleTable(uint pos) {
-    const uint t[8] = uint[](
-        0x12100200, 0x13110301, 0x16140604, 0x17150705,
-        0x1a180a08, 0x1b190b09, 0x1e1c0e0c, 0x1f1d0f0d
-    );
-    const uint i = pos >> 4;
-    const uint h = (t[i / 4] >> ((i % 4) * 8)) & 0xff;
-    return (h << 4) | (pos & 0xf);
-}
-
 // --- Helpers ---
 uint SwizzleOffset(uvec2 pos) {
     pos &= SWIZZLE_MASK;
-    return SwizzleTable(pos.y * 64u + pos.x);
+    return swizzle_table[pos.y * 64u + pos.x];
 }
 
 uvec4 ReadTexel(uint offset) {

src/video_core/renderer_opengl/util_shaders.cpp

@@ -1,6 +1,3 @@
-// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project
-// SPDX-License-Identifier: GPL-3.0-or-later
-
 // SPDX-FileCopyrightText: Copyright 2020 yuzu Emulator Project
 // SPDX-License-Identifier: GPL-2.0-or-later
 
@@ -59,8 +56,10 @@ UtilShaders::UtilShaders(ProgramManager& program_manager_)
       copy_bc4_program(MakeProgram(OPENGL_COPY_BC4_COMP)),
       convert_s8d24_program(MakeProgram(OPENGL_CONVERT_S8D24_COMP)),
       convert_ms_to_nonms_program(MakeProgram(CONVERT_MSAA_TO_NON_MSAA_COMP)),
-      convert_nonms_to_ms_program(MakeProgram(CONVERT_NON_MSAA_TO_MSAA_COMP))
-{
+      convert_nonms_to_ms_program(MakeProgram(CONVERT_NON_MSAA_TO_MSAA_COMP)) {
+    const auto swizzle_table = Tegra::Texture::MakeSwizzleTable();
+    swizzle_table_buffer.Create();
+    glNamedBufferStorage(swizzle_table_buffer.handle, sizeof(swizzle_table), &swizzle_table, 0);
 }
 
 UtilShaders::~UtilShaders() = default;
@@ -117,11 +116,13 @@ void UtilShaders::ASTCDecode(Image& image, const StagingBufferMap& map,
 void UtilShaders::BlockLinearUpload2D(Image& image, const StagingBufferMap& map,
                                       std::span<const SwizzleParameters> swizzles) {
     static constexpr Extent3D WORKGROUP_SIZE{32, 32, 1};
-    static constexpr GLuint BINDING_INPUT_BUFFER = 0;
+    static constexpr GLuint BINDING_SWIZZLE_BUFFER = 0;
+    static constexpr GLuint BINDING_INPUT_BUFFER = 1;
     static constexpr GLuint BINDING_OUTPUT_IMAGE = 0;
 
     program_manager.BindComputeProgram(block_linear_unswizzle_2d_program.handle);
     glFlushMappedNamedBufferRange(map.buffer, map.offset, image.guest_size_bytes);
+    glBindBufferBase(GL_SHADER_STORAGE_BUFFER, BINDING_SWIZZLE_BUFFER, swizzle_table_buffer.handle);
 
     const GLenum store_format = StoreFormat(BytesPerBlock(image.info.format));
     for (const SwizzleParameters& swizzle : swizzles) {
@@ -152,11 +153,14 @@ void UtilShaders::BlockLinearUpload2D(Image& image, const StagingBufferMap& map,
 void UtilShaders::BlockLinearUpload3D(Image& image, const StagingBufferMap& map,
                                       std::span<const SwizzleParameters> swizzles) {
     static constexpr Extent3D WORKGROUP_SIZE{16, 8, 8};
-    static constexpr GLuint BINDING_INPUT_BUFFER = 0;
+
+    static constexpr GLuint BINDING_SWIZZLE_BUFFER = 0;
+    static constexpr GLuint BINDING_INPUT_BUFFER = 1;
     static constexpr GLuint BINDING_OUTPUT_IMAGE = 0;
 
     glFlushMappedNamedBufferRange(map.buffer, map.offset, image.guest_size_bytes);
     program_manager.BindComputeProgram(block_linear_unswizzle_3d_program.handle);
+    glBindBufferBase(GL_SHADER_STORAGE_BUFFER, BINDING_SWIZZLE_BUFFER, swizzle_table_buffer.handle);
 
     const GLenum store_format = StoreFormat(BytesPerBlock(image.info.format));
     for (const SwizzleParameters& swizzle : swizzles) {

src/video_core/renderer_opengl/util_shaders.h

@@ -1,6 +1,3 @@
-// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project
-// SPDX-License-Identifier: GPL-3.0-or-later
-
 // SPDX-FileCopyrightText: Copyright 2020 yuzu Emulator Project
 // SPDX-License-Identifier: GPL-2.0-or-later
 
@@ -48,6 +45,9 @@ public:
 
 private:
     ProgramManager& program_manager;
+
+    OGLBuffer swizzle_table_buffer;
+
     OGLProgram astc_decoder_program;
     OGLProgram block_linear_unswizzle_2d_program;
     OGLProgram block_linear_unswizzle_3d_program;

src/video_core/renderer_vulkan/vk_compute_pass.cpp

@@ -653,8 +653,71 @@ void ASTCDecoderPass::Assemble(Image& image, const StagingBufferRef& map,
     scheduler.Finish();
 }
 
-constexpr u32 BL3D_BINDING_INPUT_BUFFER  = 0;
-constexpr u32 BL3D_BINDING_OUTPUT_BUFFER = 1;
+constexpr u32 BL3D_BINDING_SWIZZLE_TABLE = 0;
+constexpr u32 BL3D_BINDING_INPUT_BUFFER  = 1;
+constexpr u32 BL3D_BINDING_OUTPUT_BUFFER = 2;
+
+constexpr std::array<VkDescriptorSetLayoutBinding, 3> BL3D_DESCRIPTOR_SET_BINDINGS{{
+    {
+        .binding = BL3D_BINDING_SWIZZLE_TABLE,
+        .descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_BUFFER, // swizzle_table[]
+        .descriptorCount = 1,
+        .stageFlags = VK_SHADER_STAGE_COMPUTE_BIT,
+        .pImmutableSamplers = nullptr,
+    },
+    {
+        .binding = BL3D_BINDING_INPUT_BUFFER,
+        .descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_BUFFER, // block-linear input
+        .descriptorCount = 1,
+        .stageFlags = VK_SHADER_STAGE_COMPUTE_BIT,
+        .pImmutableSamplers = nullptr,
+    },
+    {
+        .binding = BL3D_BINDING_OUTPUT_BUFFER,
+        .descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_BUFFER,
+        .descriptorCount = 1,
+        .stageFlags = VK_SHADER_STAGE_COMPUTE_BIT,
+        .pImmutableSamplers = nullptr,
+    },
+}};
+
+constexpr DescriptorBankInfo BL3D_BANK_INFO{
+    .uniform_buffers = 0,
+    .storage_buffers = 3,
+    .texture_buffers = 0,
+    .image_buffers = 0,
+    .textures = 0,
+    .images = 0,
+    .score = 3,
+};
+
+constexpr std::array<VkDescriptorUpdateTemplateEntry, 3>
+    BL3D_DESCRIPTOR_UPDATE_TEMPLATE_ENTRY{{
+        {
+            .dstBinding = BL3D_BINDING_SWIZZLE_TABLE,
+            .dstArrayElement = 0,
+            .descriptorCount = 1,
+            .descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_BUFFER,
+            .offset = BL3D_BINDING_SWIZZLE_TABLE * sizeof(DescriptorUpdateEntry),
+            .stride = sizeof(DescriptorUpdateEntry),
+        },
+        {
+            .dstBinding = BL3D_BINDING_INPUT_BUFFER,
+            .dstArrayElement = 0,
+            .descriptorCount = 1,
+            .descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_BUFFER,
+            .offset = BL3D_BINDING_INPUT_BUFFER * sizeof(DescriptorUpdateEntry),
+            .stride = sizeof(DescriptorUpdateEntry),
+        },
+        {
+            .dstBinding = BL3D_BINDING_OUTPUT_BUFFER,
+            .dstArrayElement = 0,
+            .descriptorCount = 1,
+            .descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_BUFFER,
+            .offset = BL3D_BINDING_OUTPUT_BUFFER * sizeof(DescriptorUpdateEntry),
+            .stride = sizeof(DescriptorUpdateEntry),
+        }
+    }};
 
 struct alignas(16) BlockLinearUnswizzle3DPushConstants {
     u32 blocks_dim[3];           // Offset 0
@@ -682,50 +745,11 @@ BlockLinearUnswizzle3DPass::BlockLinearUnswizzle3DPass(
     DescriptorPool& descriptor_pool_,
     StagingBufferPool& staging_buffer_pool_,
     ComputePassDescriptorQueue& compute_pass_descriptor_queue_)
-    : ComputePass(device_, scheduler_, descriptor_pool_,
-        std::array<VkDescriptorSetLayoutBinding, 2>{{
-    {
-        .binding = BL3D_BINDING_INPUT_BUFFER,
-        .descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_BUFFER, // block-linear input
-        .descriptorCount = 1,
-        .stageFlags = VK_SHADER_STAGE_COMPUTE_BIT,
-        .pImmutableSamplers = nullptr,
-    },
-    {
-        .binding = BL3D_BINDING_OUTPUT_BUFFER,
-        .descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_BUFFER,
-        .descriptorCount = 1,
-        .stageFlags = VK_SHADER_STAGE_COMPUTE_BIT,
-        .pImmutableSamplers = nullptr,
-    },
-        }},
-        std::array<VkDescriptorUpdateTemplateEntry, 2>{{
-        {
-            .dstBinding = BL3D_BINDING_INPUT_BUFFER,
-            .dstArrayElement = 0,
-            .descriptorCount = 1,
-            .descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_BUFFER,
-            .offset = BL3D_BINDING_INPUT_BUFFER * sizeof(DescriptorUpdateEntry),
-            .stride = sizeof(DescriptorUpdateEntry),
-        },
-        {
-            .dstBinding = BL3D_BINDING_OUTPUT_BUFFER,
-            .dstArrayElement = 0,
-            .descriptorCount = 1,
-            .descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_BUFFER,
-            .offset = BL3D_BINDING_OUTPUT_BUFFER * sizeof(DescriptorUpdateEntry),
-            .stride = sizeof(DescriptorUpdateEntry),
-        }
-        }},
-        DescriptorBankInfo{
-            .uniform_buffers = 0,
-            .storage_buffers = 2,
-            .texture_buffers = 0,
-            .image_buffers = 0,
-            .textures = 0,
-            .images = 0,
-            .score = 2,
-        },
+    : ComputePass(
+          device_, scheduler_, descriptor_pool_,
+          BL3D_DESCRIPTOR_SET_BINDINGS,
+          BL3D_DESCRIPTOR_UPDATE_TEMPLATE_ENTRY,
+          BL3D_BANK_INFO,
           COMPUTE_PUSH_CONSTANT_RANGE<sizeof(BlockLinearUnswizzle3DPushConstants)>,
           BLOCK_LINEAR_UNSWIZZLE_3D_BCN_COMP_SPV),
       scheduler{scheduler_},
@@ -798,6 +822,8 @@ void BlockLinearUnswizzle3DPass::UnswizzleChunk(
     pc.blocks_dim[2] = z_count; // Only process the count
 
     compute_pass_descriptor_queue.Acquire(scheduler, 3);
+    compute_pass_descriptor_queue.AddBuffer(*image.runtime->swizzle_table_buffer, 0,
+                                           image.runtime->swizzle_table_size);
     compute_pass_descriptor_queue.AddBuffer(swizzled.buffer,
                                            sw.buffer_offset + swizzled.offset,
                                            image.guest_size_bytes - sw.buffer_offset);

src/video_core/renderer_vulkan/vk_pipeline_cache.cpp

@@ -378,6 +378,20 @@ PipelineCache::PipelineCache(Tegra::MaxwellDeviceMemoryManager& device_memory_,
       serialization_thread(1, "VkPipelineSerialization") {
     const auto& float_control{device.FloatControlProperties()};
     const VkDriverId driver_id{device.GetDriverID()};
+    const VkShaderStageFlags subgroup_stages{device.GetSubgroupSupportedStages()};
+    const auto subgroup_stage_bit{[subgroup_stages](VkShaderStageFlags flag, Shader::Stage stage) {
+        return (subgroup_stages & flag) != 0 ? (1u << static_cast<u32>(stage)) : 0u;
+    }};
+    const u32 supported_subgroup_stages{
+        subgroup_stage_bit(VK_SHADER_STAGE_VERTEX_BIT, Shader::Stage::VertexA) |
+        subgroup_stage_bit(VK_SHADER_STAGE_VERTEX_BIT, Shader::Stage::VertexB) |
+        subgroup_stage_bit(VK_SHADER_STAGE_TESSELLATION_CONTROL_BIT,
+                           Shader::Stage::TessellationControl) |
+        subgroup_stage_bit(VK_SHADER_STAGE_TESSELLATION_EVALUATION_BIT,
+                           Shader::Stage::TessellationEval) |
+        subgroup_stage_bit(VK_SHADER_STAGE_GEOMETRY_BIT, Shader::Stage::Geometry) |
+        subgroup_stage_bit(VK_SHADER_STAGE_FRAGMENT_BIT, Shader::Stage::Fragment) |
+        subgroup_stage_bit(VK_SHADER_STAGE_COMPUTE_BIT, Shader::Stage::Compute)};
     profile = Shader::Profile{
         .supported_spirv = device.SupportedSpirvVersion(),
         .unified_descriptor_binding = true,
@@ -402,7 +416,12 @@ PipelineCache::PipelineCache(Tegra::MaxwellDeviceMemoryManager& device_memory_,
         .support_fp64_signed_zero_nan_preserve =
             float_control.shaderSignedZeroInfNanPreserveFloat64 != VK_FALSE,
         .support_explicit_workgroup_layout = device.IsKhrWorkgroupMemoryExplicitLayoutSupported(),
+        .support_workgroup_layout_8bit_access =
+            device.IsWorkgroupMemoryExplicitLayout8BitSupported(),
+        .support_workgroup_layout_16bit_access =
+            device.IsWorkgroupMemoryExplicitLayout16BitSupported(),
         .support_vote = device.IsSubgroupFeatureSupported(VK_SUBGROUP_FEATURE_VOTE_BIT),
+        .supported_subgroup_stages = supported_subgroup_stages,
         .support_viewport_index_layer_non_geometry =
             device.IsExtShaderViewportIndexLayerSupported(),
         .support_viewport_mask = device.IsNvViewportArray2Supported(),
@@ -410,6 +429,7 @@ PipelineCache::PipelineCache(Tegra::MaxwellDeviceMemoryManager& device_memory_,
         .support_demote_to_helper_invocation =
             device.IsExtShaderDemoteToHelperInvocationSupported(),
         .support_int64_atomics = device.IsExtShaderAtomicInt64Supported(),
+        .support_shared_int64_atomics = device.IsSharedInt64AtomicsSupported(),
         .support_derivative_control = true,
         .support_geometry_shader_passthrough = device.IsNvGeometryShaderPassthroughSupported(),
         .support_native_ndc = device.IsExtDepthClipControlSupported(),
@@ -433,7 +453,8 @@ PipelineCache::PipelineCache(Tegra::MaxwellDeviceMemoryManager& device_memory_,
         .has_broken_spirv_position_input = driver_id == false,
         .has_broken_unsigned_image_offsets = false,
         .has_broken_signed_operations = false,
-        .has_broken_fp16_float_controls = driver_id == VK_DRIVER_ID_NVIDIA_PROPRIETARY,
+        .has_broken_fp16_float_controls = driver_id == VK_DRIVER_ID_NVIDIA_PROPRIETARY ||
+                                          driver_id == VK_DRIVER_ID_QUALCOMM_PROPRIETARY,
         .ignore_nan_fp_comparisons = false,
         .has_broken_spirv_subgroup_mask_vector_extract_dynamic = false,
         .has_broken_robust =
@@ -904,12 +925,8 @@ std::unique_ptr<ComputePipeline> PipelineCache::CreateComputePipeline(
     }
 
     auto program{TranslateProgram(pools.inst, pools.block, env, cfg, host_info)};
-    const VkDriverIdKHR driver_id = device.GetDriverID();
-    const bool needs_shared_mem_clamp =
-        driver_id == VK_DRIVER_ID_QUALCOMM_PROPRIETARY ||
-        driver_id == VK_DRIVER_ID_ARM_PROPRIETARY;
     const u32 max_shared_memory = device.GetMaxComputeSharedMemorySize();
-    if (needs_shared_mem_clamp && program.shared_memory_size > max_shared_memory) {
+    if (program.shared_memory_size > max_shared_memory) {
         LOG_WARNING(Render_Vulkan,
                     "Compute shader 0x{:016x} requests {}KB shared memory but device max is {}KB - clamping",
                     key.unique_hash,

src/video_core/renderer_vulkan/vk_rasterizer.cpp

@@ -1255,6 +1255,18 @@ void RasterizerVulkan::UpdateDepthBias(Tegra::Engines::Maxwell3D::Regs& regs) {
         }
     }
 
+    const bool is_float_depth =
+        regs.zeta.format == Tegra::DepthFormat::Z32_FLOAT ||
+        regs.zeta.format == Tegra::DepthFormat::Z32_FLOAT_X24S8_UINT;
+    if (is_float_depth && units != 0.0f && !device.IsExtDepthBiasControlSupported()) {
+        static bool logged_float_bias_warning = false;
+        if (!logged_float_bias_warning) {
+            logged_float_bias_warning = true;
+            LOG_WARNING(Render_Vulkan,
+                        "Depth bias on a float depth target without VK_EXT_depth_bias_control");
+        }
+    }
+
     scheduler.Record([constant = units, clamp = regs.depth_bias_clamp,
                       factor = regs.slope_scale_depth_bias, this](vk::CommandBuffer cmdbuf) {
         if (device.IsExtDepthBiasControlSupported()) {

src/video_core/renderer_vulkan/vk_texture_cache.cpp

@@ -909,6 +909,40 @@ TextureCacheRuntime::TextureCacheRuntime(const Device& device_, Scheduler& sched
         bl3d_unswizzle_pass.emplace(device, scheduler, descriptor_pool,
                                    staging_buffer_pool, compute_pass_descriptor_queue);
     }
+
+    // --- Create swizzle table buffer ---
+    {
+        auto table = Tegra::Texture::MakeSwizzleTable();
+
+        swizzle_table_size = static_cast<VkDeviceSize>(table.size() * sizeof(table[0]));
+
+        auto staging = staging_buffer_pool.Request(swizzle_table_size, MemoryUsage::Upload);
+        std::memcpy(staging.mapped_span.data(), table.data(), static_cast<size_t>(swizzle_table_size));
+
+        VkBufferCreateInfo ci{
+            .sType = VK_STRUCTURE_TYPE_BUFFER_CREATE_INFO,
+            .size = swizzle_table_size,
+            .usage = VK_BUFFER_USAGE_STORAGE_BUFFER_BIT |
+                     VK_BUFFER_USAGE_TRANSFER_DST_BIT |
+                     VK_BUFFER_USAGE_TRANSFER_SRC_BIT,
+            .sharingMode = VK_SHARING_MODE_EXCLUSIVE,
+        };
+        swizzle_table_buffer = memory_allocator.CreateBuffer(ci, MemoryUsage::DeviceLocal);
+
+        scheduler.RequestOutsideRenderPassOperationContext();
+        scheduler.Record([staging_buf = staging.buffer,
+                          dst_buf = *swizzle_table_buffer,
+                          size = swizzle_table_size,
+                          src_off = staging.offset](vk::CommandBuffer cmdbuf) {
+
+            const VkBufferCopy region{
+                .srcOffset = src_off,
+                .dstOffset = 0,
+                .size = size,
+            };
+            cmdbuf.CopyBuffer(staging_buf, dst_buf, region);
+        });
+    }
 }
 
 void TextureCacheRuntime::Finish() {
@@ -2450,13 +2484,18 @@ void TextureCacheRuntime::AccelerateImageUpload(
 
     if (!Settings::values.gpu_unswizzle_enabled.GetValue() || !bl3d_unswizzle_pass) {
         if (IsPixelFormatBCn(image.info.format) && image.info.type == ImageType::e3D) {
-            ASSERT(false && "GPU unswizzle is disabled for BCn 3D texture");
+            ASSERT_MSG(false, "GPU unswizzle is disabled for BCn 3D texture");
         }
         ASSERT(false);
         return;
     }
 
-    if (bl3d_unswizzle_pass && IsPixelFormatBCn(image.info.format) && image.info.type == ImageType::e3D && image.info.resources.levels == 1 && image.info.resources.layers == 1) {
+    if (bl3d_unswizzle_pass &&
+        IsPixelFormatBCn(image.info.format) &&
+        image.info.type == ImageType::e3D &&
+        image.info.resources.levels == 1 &&
+        image.info.resources.layers == 1) {
+
         return bl3d_unswizzle_pass->Unswizzle(image, map, swizzles, z_start, z_count);
     }
 

src/video_core/renderer_vulkan/vk_texture_cache.h

@@ -1,4 +1,4 @@
-// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project
+// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project
 // SPDX-License-Identifier: GPL-3.0-or-later
 
 // SPDX-FileCopyrightText: Copyright 2019 yuzu Emulator Project
@@ -130,6 +130,9 @@ public:
     std::optional<ASTCDecoderPass> astc_decoder_pass;
 
     std::optional<BlockLinearUnswizzle3DPass> bl3d_unswizzle_pass;
+    vk::Buffer swizzle_table_buffer;
+    VkDeviceSize swizzle_table_size = 0;
+
     std::optional<MSAACopyPass> msaa_copy_pass;
     const Settings::ResolutionScalingInfo& resolution;
     std::array<std::vector<VkFormat>, VideoCore::Surface::MaxPixelFormat> view_formats;

src/video_core/texture_cache/texture_cache.h

@@ -1915,13 +1915,16 @@ void TextureCache<P>::TrimInactiveSamplers(size_t budget) {
         ankerl::unordered_dense::set<SamplerId> active_sampler_ids;
         for (auto const& e : channel_state->sampler_ids)
             active_sampler_ids.insert(e.second);
+        if constexpr (requires { runtime.Finish(); }) {
+            runtime.Finish();
+        }
         // Elements in the map must be necesarily valid
         size_t removed = 0;
         for (auto it = channel_state->samplers.begin(); it != channel_state->samplers.end();) {
             const SamplerId sampler_id = it->second;
             if (!sampler_id || sampler_id == CORRUPT_ID) {
                 it = channel_state->samplers.erase(it);
-            } else if (std::ranges::find(active_sampler_ids, sampler_id) != active_sampler_ids.end()) {
+            } else if (active_sampler_ids.contains(sampler_id)) {
                 ++it;
             } else {
                 slot_samplers.erase(sampler_id);

src/video_core/textures/decoders.h

@@ -1,6 +1,3 @@
-// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project
-// SPDX-License-Identifier: GPL-3.0-or-later
-
 // SPDX-FileCopyrightText: Copyright 2018 yuzu Emulator Project
 // SPDX-License-Identifier: GPL-2.0-or-later
 
@@ -26,6 +23,24 @@ constexpr u32 GOB_SIZE_SHIFT = GOB_SIZE_X_SHIFT + GOB_SIZE_Y_SHIFT + GOB_SIZE_Z_
 constexpr u32 SWIZZLE_X_BITS = 0b100101111;
 constexpr u32 SWIZZLE_Y_BITS = 0b011010000;
 
+using SwizzleTable = std::array<std::array<u32, GOB_SIZE_X>, GOB_SIZE_Y>;
+
+/**
+ * This table represents the internal swizzle of a gob, in format 16 bytes x 2 sector packing.
+ * Calculates the offset of an (x, y) position within a swizzled texture.
+ * Taken from the Tegra X1 Technical Reference Manual. pages 1187-1188
+ */
+constexpr SwizzleTable MakeSwizzleTable() {
+    SwizzleTable table{};
+    for (u32 y = 0; y < table.size(); ++y) {
+        for (u32 x = 0; x < table[0].size(); ++x) {
+            table[y][x] = ((x % 64) / 32) * 256 + ((y % 8) / 2) * 64 + ((x % 32) / 16) * 32 +
+                          (y % 2) * 16 + (x % 16);
+        }
+    }
+    return table;
+}
+
 /// Unswizzles a block linear texture into linear memory.
 void UnswizzleTexture(std::span<u8> output, std::span<const u8> input, u32 bytes_per_pixel,
                       u32 width, u32 height, u32 depth, u32 block_height, u32 block_depth,

src/video_core/vulkan_common/vulkan_device.cpp

@@ -501,14 +501,6 @@ Device::Device(VkInstance instance_, vk::PhysicalDevice physical_, VkSurfaceKHR
         LOG_WARNING(Render_Vulkan,
                     "Qualcomm drivers have slow push descriptor implementation");
         RemoveExtension(extensions.push_descriptor, VK_KHR_PUSH_DESCRIPTOR_EXTENSION_NAME);
-        LOG_WARNING(Render_Vulkan,
-                    "Disabling shader float controls and 64-bit integer features on Qualcomm proprietary drivers");
-        RemoveExtension(extensions.shader_float_controls, VK_KHR_SHADER_FLOAT_CONTROLS_EXTENSION_NAME);
-        RemoveExtensionFeature(extensions.shader_atomic_int64, features.shader_atomic_int64,
-                               VK_KHR_SHADER_ATOMIC_INT64_EXTENSION_NAME);
-        features.shader_atomic_int64.shaderBufferInt64Atomics = false;
-        features.shader_atomic_int64.shaderSharedInt64Atomics = false;
-        features.features.shaderInt64 = false;
 
 #if defined(__ANDROID__) && defined(ARCHITECTURE_arm64)
         // BCn patching only safe on Android 9+ (API 28+). Older versions crash on driver load.
@@ -561,7 +553,6 @@ Device::Device(VkInstance instance_, vk::PhysicalDevice physical_, VkSurfaceKHR
             features.shader_float16_int8.shaderFloat16 = false;
         }
 
-        // Mali/ NVIDIA proprietary drivers: Shader stencil export not supported
         // Use hardware depth/stencil blits instead when available
         if (!extensions.shader_stencil_export) {
             LOG_INFO(Render_Vulkan,
@@ -574,8 +565,8 @@ Device::Device(VkInstance instance_, vk::PhysicalDevice physical_, VkSurfaceKHR
 
             if (!is_blit_depth24_stencil8_supported && !is_blit_depth32_stencil8_supported) {
                 LOG_WARNING(Render_Vulkan,
-                            "NVIDIA: Neither shader export nor hardware blits available for "
-                            "depth/stencil. Performance may be degraded.");
+                            "Neither shader export nor hardware blits available for "
+                            "depth/stencil.");
             }
         }
     }
@@ -653,21 +644,13 @@ Device::Device(VkInstance instance_, vk::PhysicalDevice physical_, VkSurfaceKHR
 
     if (is_turnip || is_qualcomm) {
         LOG_WARNING(Render_Vulkan, "Driver requires higher-than-reported binding limits");
-        properties.properties.limits.maxVertexInputBindings = 32;
+        properties.properties.limits.maxVertexInputBindings =
+            (std::max)(properties.properties.limits.maxVertexInputBindings, 32U);
     }
 
     const auto dyna_state = Settings::values.dyna_state.GetValue();
-
-    // Base dynamic states (VIEWPORT, SCISSOR, DEPTH_BIAS, etc.) are ALWAYS active in vk_graphics_pipeline.cpp
-    // This slider controls EXTENDED dynamic states with accumulative levels per Vulkan specs:
-    //   Level 0 = Core Dynamic States only (Vulkan 1.0)
-    //   Level 1 = Core + VK_EXT_extended_dynamic_state
-    //   Level 2 = Core + VK_EXT_extended_dynamic_state + VK_EXT_extended_dynamic_state2
-    //   Level 3 = Core + VK_EXT_extended_dynamic_state + VK_EXT_extended_dynamic_state2 + VK_EXT_extended_dynamic_state3
-
     switch (dyna_state) {
     case Settings::ExtendedDynamicState::Disabled:
-        // Level 0: Disable all extended dynamic state extensions
         RemoveExtensionFeature(extensions.extended_dynamic_state, features.extended_dynamic_state,
                               VK_EXT_EXTENDED_DYNAMIC_STATE_EXTENSION_NAME);
         RemoveExtensionFeature(extensions.extended_dynamic_state2, features.extended_dynamic_state2,
@@ -678,7 +661,6 @@ Device::Device(VkInstance instance_, vk::PhysicalDevice physical_, VkSurfaceKHR
         dynamic_state3_enables = false;
         break;
     case Settings::ExtendedDynamicState::EDS1:
-        // Level 1: Enable EDS1, disable EDS2 and EDS3
         RemoveExtensionFeature(extensions.extended_dynamic_state2, features.extended_dynamic_state2,
                               VK_EXT_EXTENDED_DYNAMIC_STATE_2_EXTENSION_NAME);
         RemoveExtensionFeature(extensions.extended_dynamic_state3, features.extended_dynamic_state3,
@@ -687,7 +669,6 @@ Device::Device(VkInstance instance_, vk::PhysicalDevice physical_, VkSurfaceKHR
         dynamic_state3_enables = false;
         break;
     case Settings::ExtendedDynamicState::EDS2:
-        // Level 2: Enable EDS1 + EDS2, disable EDS3
         RemoveExtensionFeature(extensions.extended_dynamic_state3, features.extended_dynamic_state3,
                               VK_EXT_EXTENDED_DYNAMIC_STATE_3_EXTENSION_NAME);
         dynamic_state3_blending = false;
@@ -695,12 +676,9 @@ Device::Device(VkInstance instance_, vk::PhysicalDevice physical_, VkSurfaceKHR
         break;
     case Settings::ExtendedDynamicState::EDS3:
     default:
-        // Level 3: Enable all (EDS1 + EDS2 + EDS3)
         break;
     }
 
-    // VK_EXT_vertex_input_dynamic_state is independent from EDS
-    // It can be enabled even without extended_dynamic_state
     if (!Settings::values.vertex_input_dynamic_state.GetValue()) {
         RemoveExtensionFeature(extensions.vertex_input_dynamic_state, features.vertex_input_dynamic_state, VK_EXT_VERTEX_INPUT_DYNAMIC_STATE_EXTENSION_NAME);
     }
@@ -1282,8 +1260,7 @@ void Device::RemoveUnsuitableExtensions() {
                                        VK_EXT_IMAGE_ROBUSTNESS_EXTENSION_NAME);
 
     // VK_KHR_shader_atomic_int64
-    extensions.shader_atomic_int64 = features.shader_atomic_int64.shaderBufferInt64Atomics &&
-                                     features.shader_atomic_int64.shaderSharedInt64Atomics;
+    extensions.shader_atomic_int64 = features.shader_atomic_int64.shaderBufferInt64Atomics;
     RemoveExtensionFeatureIfUnsuitable(extensions.shader_atomic_int64, features.shader_atomic_int64,
                                        VK_KHR_SHADER_ATOMIC_INT64_EXTENSION_NAME);
 
@@ -1332,10 +1309,7 @@ void Device::RemoveUnsuitableExtensions() {
 
     // VK_KHR_workgroup_memory_explicit_layout
     extensions.workgroup_memory_explicit_layout =
-        features.features.shaderInt16 &&
         features.workgroup_memory_explicit_layout.workgroupMemoryExplicitLayout &&
-        features.workgroup_memory_explicit_layout.workgroupMemoryExplicitLayout8BitAccess &&
-        features.workgroup_memory_explicit_layout.workgroupMemoryExplicitLayout16BitAccess &&
         features.workgroup_memory_explicit_layout.workgroupMemoryExplicitLayoutScalarBlockLayout;
     RemoveExtensionFeatureIfUnsuitable(extensions.workgroup_memory_explicit_layout,
                                        features.workgroup_memory_explicit_layout,

src/video_core/vulkan_common/vulkan_device.h

@@ -403,6 +403,11 @@ FN_MAX_LIMIT_LIST
         return properties.subgroup_properties.supportedOperations & feature;
     }
 
+    /// Returns the shader stages that support subgroup operations.
+    VkShaderStageFlags GetSubgroupSupportedStages() const {
+        return properties.subgroup_properties.supportedStages;
+    }
+
     /// Returns the maximum number of push descriptors.
     u32 MaxPushDescriptors() const {
         return properties.push_descriptor.maxPushDescriptors;
@@ -483,6 +488,18 @@ FN_MAX_LIMIT_LIST
         return extensions.workgroup_memory_explicit_layout;
     }
 
+    /// Returns true if the device supports 8-bit accesses to workgroup explicit layout memory.
+    bool IsWorkgroupMemoryExplicitLayout8BitSupported() const {
+        return extensions.workgroup_memory_explicit_layout &&
+               features.workgroup_memory_explicit_layout.workgroupMemoryExplicitLayout8BitAccess;
+    }
+
+    /// Returns true if the device supports 16-bit accesses to workgroup explicit layout memory.
+    bool IsWorkgroupMemoryExplicitLayout16BitSupported() const {
+        return extensions.workgroup_memory_explicit_layout && features.features.shaderInt16 &&
+               features.workgroup_memory_explicit_layout.workgroupMemoryExplicitLayout16BitAccess;
+    }
+
     /// Returns true if the device supports VK_KHR_image_format_list.
     bool IsKhrImageFormatListSupported() const {
         return extensions.image_format_list || instance_version >= VK_API_VERSION_1_2;
@@ -711,9 +728,16 @@ FN_MAX_LIMIT_LIST
                features.provoking_vertex.transformFeedbackPreservesProvokingVertex;
     }
 
-    /// Returns true if the device supports VK_KHR_shader_atomic_int64.
+    /// Returns true if the device supports int64 atomics on storage buffers.
     bool IsExtShaderAtomicInt64Supported() const {
-        return extensions.shader_atomic_int64;
+        return extensions.shader_atomic_int64 &&
+               features.shader_atomic_int64.shaderBufferInt64Atomics;
+    }
+
+    /// Returns true if the device supports int64 atomics on workgroup (shared) memory.
+    bool IsSharedInt64AtomicsSupported() const {
+        return extensions.shader_atomic_int64 &&
+               features.shader_atomic_int64.shaderSharedInt64Atomics;
     }
 
     bool IsExtConditionalRendering() const {