fix for tests?!?!?

Signed-off-by: lizzie <lizzie@eden-emu.dev>

.forgejo/workflows/translations.yml

@@ -1,9 +1,9 @@
 name: tx-pull
 
 on:
-  #  tuesday, saturday at 2pm
+  #  monday at 4pm
   schedule:
-    - cron: '0 14 * * 2,6'
+    - cron: '0 16 * * 1'
   workflow_dispatch:
 
 jobs:

.github/ISSUE_TEMPLATE/bug_report.yml

@@ -3,7 +3,7 @@ description: File a bug report
 body:
   - type: markdown
     attributes:
-      value: Tech support does not belong here. You should only file an issue here if you think you have experienced an actual bug with yuzu.
+      value: Tech support does not belong here. You should only file an issue here if you think you have experienced an actual bug with Eden.
   - type: checkboxes
     attributes:
       label: Is there an existing issue for this?
@@ -43,7 +43,7 @@ body:
     id: log
     attributes:
       label: Log File
-      description: A log file will help our developers to better diagnose and fix the issue. Instructions can be found [here](https://yuzu-emu.org/help/reference/log-files).
+      description: A log file will help our developers to better diagnose and fix the issue. Instructions can be found [here](https://git.eden-emu.dev/eden-emu/eden/src/branch/master/docs/user/HowToAccessLogs.md).
     validations:
       required: true
   - type: textarea

.github/ISSUE_TEMPLATE/feature_request.yml

@@ -4,7 +4,7 @@ labels: "request"
 body:
   - type: markdown
     attributes:
-      value: Tech support does not belong here. You should only file an issue here if you are requesting a feature you believe would make yuzu better.
+      value: Tech support does not belong here. You should only file an issue here if you are requesting a feature you believe would make Eden better.
   - type: checkboxes
     attributes:
       label: Is there an existing issue for this?
@@ -23,6 +23,6 @@ body:
     id: why-feature
     attributes:
       label: Why would this feature be useful?
-      description: A brief description of why this feature would make yuzu better.
+      description: A brief description of why this feature would make Eden better.
     validations:
       required: true

.gitignore

@@ -19,6 +19,7 @@ log.txt
 # Generated source files
 src/common/scm_rev.cpp
 dist/english_plurals/generated_en.ts
+*-toolchain.cmake
 
 # Project/editor files
 *.swp

CMakeLists.txt

@@ -28,23 +28,23 @@ if (NOT DEFINED ARCHITECTURE)
 endif()
 
 # Needed for FFmpeg w/ VAAPI and DRM
-if (PLATFORM_OPENBSD)
+if (OPENBSD)
     # OpenBSD 7.8 broke libcxx when upgrading, so we must define the PSTL backend manually
     set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -I${CMAKE_SYSROOT}/usr/X11R6/include -D_LIBCPP_PSTL_BACKEND_SERIAL=1")
     set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -I${CMAKE_SYSROOT}/usr/X11R6/include -D_LIBCPP_PSTL_BACKEND_SERIAL=1")
     set(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -L${CMAKE_SYSROOT}/usr/X11R6/lib")
-elseif (PLATFORM_NETBSD)
+elseif (NETBSD)
     set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -I${CMAKE_SYSROOT}/usr/X11R7/include -I${CMAKE_SYSROOT}/usr/pkg/include/c++/v1")
     set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -I${CMAKE_SYSROOT}/usr/X11R7/include -I${CMAKE_SYSROOT}/usr/pkg/include/c++/v1")
     set(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -L${CMAKE_SYSROOT}/usr/X11R7/lib")
 endif()
 
 # NetBSD: Fun for the whole family!
-if (PLATFORM_NETBSD)
+if (NETBSD)
     set(ENV{PKG_CONFIG_PATH} "${PKG_CONFIG_PATH}:${CMAKE_SYSROOT}/usr/pkg/lib/ffmpeg7/pkgconfig")
 endif()
 
-cmake_dependent_option(YUZU_STATIC_ROOM "Build a static room executable only (CI only)" OFF "PLATFORM_LINUX" OFF)
+cmake_dependent_option(YUZU_STATIC_ROOM "Build a static room executable only (CI only)" OFF "LINUX" OFF)
 if (YUZU_STATIC_ROOM)
     set(YUZU_ROOM ON)
     set(YUZU_ROOM_STANDALONE ON)
@@ -79,6 +79,7 @@ set(YUZU_QT_MIRROR "" CACHE STRING "What mirror to use for downloading the bundl
 cmake_dependent_option(YUZU_USE_BUNDLED_QT "Download bundled Qt binaries" "${MSVC}" "ENABLE_QT" OFF)
 
 option(ENABLE_DEBUG_TOOLS "Enable debugging tools (maxwell disassembler, SPIRV translator, etc)" OFF)
+option(ENABLE_WERROR "Enable -Werror diagnostics" ON)
 
 # non-linux bundled qt are static
 if (YUZU_USE_BUNDLED_QT AND (APPLE OR NOT UNIX))
@@ -157,6 +158,19 @@ if (CXX_CLANG_CL)
         $<$<COMPILE_LANGUAGE:C,CXX>:-Wno-reserved-identifier>
         $<$<COMPILE_LANGUAGE:C,CXX>:-Wno-deprecated-declarations>
         $<$<COMPILE_LANGUAGE:C,CXX>:-Wno-cast-function-type-mismatch>
+        $<$<COMPILE_LANGUAGE:C,CXX>:-Wno-c99-extensions>
+        $<$<COMPILE_LANGUAGE:C,CXX>:-Wno-c++17-compat>
+        $<$<COMPILE_LANGUAGE:C,CXX>:-Wno-c++11-compat-reserved-user-defined-literal>
+        $<$<COMPILE_LANGUAGE:C,CXX>:-Wno-c++11-compat-deprecated-writable-strings>
+        $<$<COMPILE_LANGUAGE:C,CXX>:-Wno-c++11-compat-pedantic>
+        $<$<COMPILE_LANGUAGE:C,CXX>:-Wno-c++11-compat>
+        $<$<COMPILE_LANGUAGE:C,CXX>:-Wno-c++0x-compat>
+        $<$<COMPILE_LANGUAGE:C,CXX>:-Wno-c++98-c++11-compat-binary-literal>
+        $<$<COMPILE_LANGUAGE:C,CXX>:-Wno-c++98-compat-pedantic>
+        $<$<COMPILE_LANGUAGE:C,CXX>:-Wno-c++98-compat>
+        $<$<COMPILE_LANGUAGE:C,CXX>:-Wno-c99-compat>
+        $<$<COMPILE_LANGUAGE:C,CXX>:-Wno-c98-compat>
+        $<$<COMPILE_LANGUAGE:C,CXX>:-Wno-c99-extensions>
         $<$<COMPILE_LANGUAGE:C,CXX>:/EHsc>)
     # REQUIRED CPU features IN Windows-amd64
     if (ARCHITECTURE_x86_64)
@@ -210,7 +224,7 @@ endif()
 
 # ffmpeg
 option(YUZU_USE_BUNDLED_FFMPEG "Download bundled FFmpeg" ${EXT_DEFAULT})
-cmake_dependent_option(YUZU_USE_EXTERNAL_FFMPEG "Build FFmpeg from external source" "${PLATFORM_SUN}" "NOT WIN32 AND NOT ANDROID" OFF)
+cmake_dependent_option(YUZU_USE_EXTERNAL_FFMPEG "Build FFmpeg from external source" "${SOLARIS}" "NOT WIN32 AND NOT ANDROID" OFF)
 
 # sirit
 set(BUNDLED_SIRIT_DEFAULT OFF)
@@ -221,7 +235,7 @@ endif()
 option(YUZU_USE_BUNDLED_SIRIT "Download bundled sirit" ${BUNDLED_SIRIT_DEFAULT})
 
 # FreeBSD 15+ has libusb, versions below should disable it
-cmake_dependent_option(ENABLE_LIBUSB "Enable the use of LibUSB" ON "WIN32 OR PLATFORM_LINUX OR PLATFORM_FREEBSD OR APPLE" OFF)
+cmake_dependent_option(ENABLE_LIBUSB "Enable the use of LibUSB" ON "WIN32 OR LINUX OR FREEBSD OR APPLE" OFF)
 
 cmake_dependent_option(ENABLE_OPENGL "Enable OpenGL" ON "NOT (WIN32 AND ARCHITECTURE_arm64) AND NOT APPLE" OFF)
 mark_as_advanced(FORCE ENABLE_OPENGL)
@@ -235,7 +249,7 @@ option(YUZU_TESTS "Compile tests" "${BUILD_TESTING}")
 
 # Install udev rules on Linux (mainly for gyros)
 # Only acts on joysticks and nothing else.
-cmake_dependent_option(YUZU_INSTALL_UDEV_RULES "Install udev rules for gyro access" OFF "PLATFORM_LINUX" OFF)
+cmake_dependent_option(YUZU_INSTALL_UDEV_RULES "Install udev rules for gyro access" OFF "LINUX" OFF)
 
 option(YUZU_DOWNLOAD_ANDROID_VVL "Download validation layer binary for android" ON)
 
@@ -248,7 +262,7 @@ cmake_dependent_option(YUZU_ROOM_STANDALONE "Enable standalone room executable"
 
 cmake_dependent_option(YUZU_CMD "Compile the eden-cli executable" ON "NOT ANDROID" OFF)
 
-cmake_dependent_option(YUZU_CRASH_DUMPS "Compile crash dump (Minidump) support" OFF "WIN32 OR PLATFORM_LINUX" OFF)
+cmake_dependent_option(YUZU_CRASH_DUMPS "Compile crash dump (Minidump) support" OFF "WIN32 OR LINUX" OFF)
 
 option(YUZU_DOWNLOAD_TIME_ZONE_DATA "Always download time zone binaries" ON)
 set(YUZU_TZDB_PATH "" CACHE STRING "Path to a pre-downloaded timezone database")
@@ -258,7 +272,7 @@ cmake_dependent_option(YUZU_USE_BUNDLED_MOLTENVK "Download bundled MoltenVK lib"
 option(YUZU_DISABLE_LLVM "Disable LLVM (useful for CI)" OFF)
 
 set(DEFAULT_YUZU_USE_BUNDLED_OPENSSL OFF)
-if (EXT_DEFAULT OR PLATFORM_SUN OR PLATFORM_OPENBSD)
+if (EXT_DEFAULT OR SOLARIS OR OPENBSD)
     set(DEFAULT_YUZU_USE_BUNDLED_OPENSSL ON)
 endif()
 
@@ -281,7 +295,7 @@ if(EXISTS ${PROJECT_SOURCE_DIR}/hooks/pre-commit AND NOT EXISTS ${PROJECT_SOURCE
     endif()
 endif()
 
-if (ARCHITECTURE_arm64 AND (ANDROID OR PLATFORM_LINUX))
+if (ARCHITECTURE_arm64 AND (ANDROID OR LINUX))
     set(HAS_NCE 1)
     add_compile_definitions(HAS_NCE=1)
 endif()
@@ -290,7 +304,7 @@ if (YUZU_ROOM)
     add_compile_definitions(YUZU_ROOM)
 endif()
 
-if (UNIX AND NOT (PLATFORM_LINUX OR WIN32))
+if (UNIX AND NOT (LINUX OR WIN32))
     if(CXX_APPLE OR CXX_CLANG)
         # libc++ has stop_token and jthread as experimental
         set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -fexperimental-library")
@@ -404,7 +418,7 @@ if (Boost_ADDED)
 
     if (NOT MSVC OR CXX_CLANG)
         # boost sucks
-        if (PLATFORM_SUN)
+        if (SOLARIS)
             add_compile_options($<$<COMPILE_LANGUAGE:C,CXX>:-pthreads>)
         endif()
 
@@ -508,9 +522,9 @@ elseif (WIN32)
         # PSAPI is the Process Status API
         set(PLATFORM_LIBRARIES ${PLATFORM_LIBRARIES} psapi imm32 version crypt32 rpcrt4 gdi32 wldap32 mswsock)
     endif()
-elseif (PLATFORM_MANAGARM)
+elseif (MANAGARM)
     set(PLATFORM_LIBRARIES iconv intl)
-elseif (PLATFORM_HAIKU)
+elseif (HAIKUOS)
     # Haiku is so special :)
     set(PLATFORM_LIBRARIES bsd /boot/system/lib/libnetwork.so)
 elseif (CMAKE_SYSTEM_NAME MATCHES "^(Linux|kFreeBSD|GNU|SunOS)$")
@@ -604,7 +618,7 @@ if (ENABLE_QT)
 
     # Best practice is to ask for all components at once, so they are from the same version
     set(YUZU_QT_COMPONENTS Core Widgets Charts Concurrent Gui)
-    if (PLATFORM_LINUX OR PLATFORM_FREEBSD)
+    if (LINUX OR FREEBSD)
         list(APPEND YUZU_QT_COMPONENTS DBus)
         # yes Qt, we get it
         set(QT_NO_PRIVATE_MODULE_WARNING ON)

CMakeModules/GentooCross.cmake

@@ -0,0 +1,18 @@
+# SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project
+# SPDX-License-Identifier: GPL-3.0-or-later
+
+set(CROSS_TARGET "powerpc64le" CACHE STRING "Cross-compilation target (aarch64, powerpc64le, riscv64, etc)")
+
+set(CMAKE_SYSROOT /usr/${CROSS_TARGET}-unknown-linux-gnu)
+
+set(CMAKE_C_COMPILER ${CROSS_TARGET}-unknown-linux-gnu-gcc)
+set(CMAKE_CXX_COMPILER ${CROSS_TARGET}-unknown-linux-gnu-g++)
+
+# search programs in the host environment
+set(CMAKE_FIND_ROOT_PATH_MODE_PROGRAM NEVER)
+
+# search headers and libraries in the target environment
+set(CMAKE_FIND_ROOT_PATH_MODE_LIBRARY ONLY)
+set(CMAKE_FIND_ROOT_PATH_MODE_INCLUDE ONLY)
+
+set(CMAKE_FIND_ROOT_PATH /usr/${CROSS_TARGET}-unknown-linux-gnu)

CMakeModules/find/FindOpus.cmake

@@ -13,7 +13,7 @@ find_package_handle_standard_args(Opus
     VERSION_VAR OPUS_VERSION
 )
 
-if (PLATFORM_MSYS)
+if (MSYS2)
     FixMsysPath(PkgConfig::OPUS)
 endif()
 

CMakeModules/find/Findenet.cmake

@@ -14,7 +14,7 @@ find_package_handle_standard_args(enet
     VERSION_VAR ENET_VERSION
 )
 
-if (PLATFORM_MSYS)
+if (MSYS2)
     FixMsysPath(PkgConfig::ENET)
 endif()
 

CMakeModules/find/Findlibusb.cmake

@@ -14,7 +14,7 @@ find_package_handle_standard_args(libusb
     VERSION_VAR LIBUSB_VERSION
 )
 
-if (PLATFORM_MSYS)
+if (MSYS2)
     FixMsysPath(PkgConfig::LIBUSB)
 endif()
 

CMakeModules/find/Findlz4.cmake

@@ -13,7 +13,7 @@ else()
     find_package(PkgConfig QUIET)
     pkg_search_module(LZ4 QUIET IMPORTED_TARGET liblz4)
 
-    if (PLATFORM_MSYS)
+    if (MSYS2)
         FixMsysPath(PkgConfig::LZ4)
     endif()
 

CONTRIBUTING.md

@@ -21,10 +21,14 @@ Eden is free, open-source, copyleft software, licensed under the terms of the [G
 ### Policies
 
 - No LLM or AI usage, *period*, for patches, pull requests, issues, comments, debugging, brainstorming, etc.
-  - For details on why, see the [detailed AI policy](docs/AI.md).
+  - For details on why, see the [detailed AI policy](docs/policies/AI.md).
+- Usage of any form of profanity or otherwise unsavory language is generally discouraged.
+  - This is primarily because it rarely helps to actually understand what's going on.
+  - Remember that your comments should be focused and actually address what's happening. With very few exceptions, expletives are actively detrimental at best.
 - New code must follow the same general style as the surrounding codebase. Exceptions may be granted in certain cases.
 - Maintainers reserve the right to change your patches and pull requests at will. We will try to avoid this.
-  - You should respect all decisions made by the [code owners](docs/CODEOWNERS) in your particular subsystem. If you feel they are overstepping or are incorrect, don't be afraid to stand your ground!
+  - You should generally respect all decisions made by the [code owners](docs/CODEOWNERS) in your particular subsystem.
+  - However, if you feel they are overstepping or are incorrect, don't be afraid to stand your ground! Maintainers are not always correct.
 - While we do *not* adhere to the terms of a formal code of conduct, you will generally be expected to respect other developers, contributors, and community members.
 - You **must** have basic knowledge of [Git](https://git-scm.com/learn). Knowing how to manage your branches and follow proper fork policies is a necessity.
 

docs/CrossCompile.md

@@ -2,7 +2,122 @@
 
 General guide for cross compiling.
 
-## Debian ARM64
+## Gentoo
+
+Gentoo's cross-compilation setup is relatively easy, provided you're already familiar with portage.
+
+### Crossdev
+
+First, emerge crossdev via `sudo emerge -a sys-devel/crossdev`.
+
+Now, set up the environment depending on the target architecture; e.g.
+
+```sh
+sudo crossdev powerpc64le
+sudo crossdev aarch64
+```
+
+### QEMU
+
+Installing a qemu user setup is recommended for testing. To do so, you will need the relevant USE flags:
+
+```sh
+app-emulation/qemu static-user qemu_user_targets_ppc64le qemu_user_targets_aarch64
+```
+
+Note that to use cross-emerged libraries, you will need to tell qemu where the sysroot is. You can do this with an alias:
+
+```sh
+alias qemu-ppc64le="qemu-ppc64le -L /usr/powerpc64le-unknown-linux-gnu"
+alias qemu-aarch64="qemu-aarch64 -L /usr/aarch64-unknown-linux-gnu"
+```
+
+### Dependencies
+
+Some packages have broken USE flags on other architectures; you'll also need to set up python targets. In `/usr/<target>-unknown-linux-gnu/etc/portage/package.use`:
+
+```sh
+>=net-misc/curl-8.16.0-r1 ssl
+
+*/* PYTHON_TARGETS: python3_13 PYTHON_SINGLE_TARGET: python3_13
+*/* pam
+
+sys-apps/util-linux pam su
+app-shells/bash -readline
+>=dev-libs/libpcre2-10.47 unicode
+>=x11-libs/libxkbcommon-1.12.3 X
+>=sys-libs/zlib-1.3.1-r1 minizip
+>=app-alternatives/gpg-1-r3 ssl
+>=app-crypt/gnupg-2.5.13-r2 ssl
+
+dev-libs/* -introspection
+media-libs/harfbuzz -introspection
+dev-libs/quazip -qt5 qt6
+```
+
+Dependencies should be about the same [as normal Gentoo](./Deps.md), but removing gamemode and renderdoc is recommended. Keep in mind that when emerging, you want to use `emerge-<target>-unknown-linux-gnu`, e.g. `emerge-powerpc64le-unknown-linux-gnu`.
+
+Enable GURU in the cross environment (as root):
+
+```sh
+mkdir -p /usr/powerpc64le-unknown-linux-gnu/etc/portage/repos.conf
+cat << EOF > /usr/powerpc64le-unknown-linux-gnu/etc/portage/repos.conf/guru.conf
+[guru]
+location = /var/db/repos/guru
+auto-sync = no
+priority = 1
+EOF
+```
+
+Now emerge your dependencies:
+
+```sh
+sudo emerge-powerpc64le-unknown-linux-gnu -aU app-arch/lz4 app-arch/zstd app-arch/unzip \
+    dev-libs/libfmt dev-libs/libusb dev-libs/mcl dev-libs/sirit dev-libs/oaknut \
+    dev-libs/unordered_dense dev-libs/boost dev-libs/openssl dev-libs/discord-rpc \
+    dev-util/spirv-tools dev-util/spirv-headers dev-util/vulkan-headers \
+    dev-util/vulkan-utility-libraries dev-util/glslang \
+    media-libs/libva media-libs/opus media-video/ffmpeg \
+    media-libs/VulkanMemoryAllocator media-libs/libsdl2 media-libs/cubeb \
+    net-libs/enet net-libs/mbedtls \
+    sys-libs/zlib \
+    dev-cpp/nlohmann_json dev-cpp/simpleini dev-cpp/cpp-httplib dev-cpp/cpp-jwt dev-cpp/catch \
+    net-wireless/wireless-tools \
+    dev-qt/qtbase:6 dev-libs/quazip \
+    virtual/pkgconfig
+```
+
+### Building
+
+A toolchain is provided in `CMakeModules/GentooCross.cmake`. To use it:
+
+```sh
+cmake -S . -B build/ppc64 -DCMAKE_TOOLCHAIN_FILE=CMakeModules/GentooCross.cmake -G Ninja -DCROSS_TARGET=powerpc64le -DENABLE_OPENGL=OFF
+```
+
+Now build as normal:
+
+```sh
+cmake --build build/ppc64 -j$(nproc)
+```
+
+### Alternatively
+
+Only emerge the absolute necessities:
+
+```sh
+sudo emerge-powerpc64le-unknown-linux-gnu -aU media-video/ffmpeg media-libs/libsdl2 dev-qt/qtbase:6
+```
+
+Then set `YUZU_USE_CPM=ON`:
+
+```sh
+cmake -S . -B build/ppc64 -DCMAKE_TOOLCHAIN_FILE=CMakeModules/GentooCross.cmake -G Ninja -DCROSS_TARGET=powerpc64le -DENABLE_OPENGL=OFF -DYUZU_USE_CPM=ON
+```
+
+## ARM64
+
+### Debian ARM64
 
 A painless guide for cross compilation (or to test NCE) from a x86_64 system without polluting your main.
 
@@ -88,3 +203,24 @@ And finally, run the compiled executable with QEMU!
 ```sh
 qemu-aarch64 build/aarch64/bin/eden
 ```
+
+## PowerPC
+
+This is a guide for FreeBSD users mainly.
+
+Now you got a PowerPC sysroot - quickly decompress it somewhere, say `/home/user/opt/powerpc64le`. Create a toolchain file, for example `powerpc64le-toolchain.cmake`; always [consult the manual](https://man.freebsd.org/cgi/man.cgi?query=cmake-toolchains&sektion=7&manpath=FreeBSD+13.2-RELEASE+and+Ports).
+
+There is a script to automatically do all of this under `./tools/setup-cross-sysroot.sh`.
+
+Remember to add `-mabi=elfv1` to `CFLAGS`/`CXXFLAGS` otherwise the program will crash.
+
+Specify:
+
+- `YUZU_USE_CPM`: Set this to `ON` so packages can be found and built if your sysroot doesn't have them.
+- `YUZU_USE_EXTERNAL_FFMPEG`: Set this to `ON` as well.
+
+Then run using a program such as QEMU to emulate userland syscalls:
+
+```sh
+cmake --build build-ppc64-pc-freebsd -t dynarmic_tests -- -j8 && qemu-ppc64-static -L $HOME/opt/ppc64-freebsd/sysroot ./build-ppc64-pc-freebsd/bin/dynarmic_tests
+```

docs/Options.md

@@ -46,6 +46,8 @@ These options control dependencies.
 - `YUZU_INSTALL_UDEV_RULES` (OFF) Install udev rules to enable hidraw access
   - Needed for gyroscopes
   - Only available on Linux
+- `ENABLE_DEBUG_TOOLS` (OFF) Enables debugging and development tools, see [tools](../tools/README.md).
+- `ENABLE_WERROR` (ON) Enables warnings as errors (-Werror).
 
 ### Flavors
 

docs/dynarmic/PowerPC.md

@@ -0,0 +1,8 @@
+# PowerPC 64 backend
+
+The ppc64 backend currently only supports the little endian variant, with big endian support being experimental for the time being. Additionally only A32 is supported (for now).
+
+- Flag handling: Flags are emulated via software, while there may be some funny tricks with the CTR, I'd rather not bother - plus it's widely known that those instructions are not nice on real metal - so I would rather take the i-cache cost.
+- 128-bit atomics: No 128-bit atomic support is provided, this may cause wrong or erroneous execution in some contexts.
+
+To handle endianess differences all 16/32/64-bit loads and stores to the "emulated memory" are byteswapped beforehand.

docs/dynarmic/README.md

@@ -35,6 +35,7 @@ There are no plans to support v1 or v2.
 
 * x86-64
 * AArch64
+* PowerPC 64 (POWER 4 and up)
 
 There are no plans to support any 32-bit architecture.
 
@@ -50,6 +51,7 @@ Documentation
 -------------
 
 Design documentation can be found at [./Design.md](./Design.md).
+PowerPC design documentation can be found at [./PowerPC](./PowerPC.md).
 
 
 Usage Example

docs/policies/Coding.md

@@ -34,7 +34,7 @@ Everyone has their own way of viewing good/bad C++ practices, my general outline
   - The reason is because the project has `-fno-rtti` disabled by default, due to the costs of dynamic polymorphism.
 - Always copy-on-value for objects with `sizeof(void *) >= sizeof(T) * 2`, i.e objects sized as 2 pointers or less, for bigger objects you can use ref/pointer as usual.
 - Try using move semantics instead of references, whenever possible.
-- Remember function parameters are extremelly cheap as fuck, don't be afraid to place upto 8 parameters on a given function.
+- Function parameters are cheap. Don't be afraid to use as many as needed (API usability permitting).
 - Don't save a reference in structures of a parent object, i.e:
 
     ```c++

externals/CMakeLists.txt

@@ -164,7 +164,7 @@ if (NOT ANDROID)
         AddJsonPackage(sdl3)
     else()
         message(STATUS "Using bundled SDL3")
-        if (PLATFORM_FREEBSD)
+        if (FREEBSD)
             set(BUILD_SHARED_LIBS ON)
         endif()
         AddJsonPackage(sdl3-ci)
@@ -254,6 +254,11 @@ endif()
 # TZDB (Time Zone Database)
 add_subdirectory(nx_tzdb)
 
+# PowerPC emitter
+if (ARCHITECTURE_powerpc64)
+    add_subdirectory(powah)
+endif()
+
 add_library(tz tz/tz/tz.cpp)
 target_include_directories(tz PUBLIC ./tz)
 

externals/cmake-modules/DetectArchitecture.cmake

@@ -166,7 +166,7 @@ detect_architecture_symbols(
         "_M_MRX000")
 
 detect_architecture_symbols(
-    ARCH ppc64
+    ARCH powerpc64
     SYMBOLS
         "__ppc64__"
         "__powerpc64__"
@@ -174,7 +174,7 @@ detect_architecture_symbols(
         "_M_PPC64")
 
 detect_architecture_symbols(
-    ARCH ppc
+    ARCH powerpc
     SYMBOLS
         "__ppc__"
         "__ppc"

externals/cmake-modules/DetectPlatform.cmake

@@ -1,45 +1,46 @@
-# SPDX-FileCopyrightText: Copyright 2025 crueter
+# SPDX-FileCopyrightText: Copyright 2026 crueter
 # SPDX-License-Identifier: LGPL-3.0-or-later
 
 ## DetectPlatform ##
 
-# This is a small helper that sets PLATFORM_<platform> variables for various
+# This is a small helper that sets platform variables for various
 # operating systems and distributions. Note that Apple, Windows, Android, etc.
 # are not covered, as CMake already does that for us.
 
 # It also sets CXX_<compiler> for the C++ compiler.
 
-# Furthermore, some platforms have really silly requirements/quirks, so this
-# also does a few of those.
-
 # This module contains contributions from the Eden Emulator Project,
 # notably from crueter and Lizzie.
 
 if (${CMAKE_SYSTEM_NAME} STREQUAL "SunOS")
-    set(PLATFORM_SUN ON)
+    set(SOLARIS ON)
 elseif (${CMAKE_SYSTEM_NAME} STREQUAL "OpenOrbis")
-    set(PLATFORM_PS4 ON)
+    set(OPENORBIS ON)
 elseif (${CMAKE_SYSTEM_NAME} STREQUAL "managarm")
-    set(PLATFORM_MANAGARM ON)
-elseif (${CMAKE_SYSTEM_NAME} STREQUAL "FreeBSD")
-    set(PLATFORM_FREEBSD ON)
-elseif (${CMAKE_SYSTEM_NAME} STREQUAL "OpenBSD")
-    set(PLATFORM_OPENBSD ON)
-elseif (${CMAKE_SYSTEM_NAME} STREQUAL "NetBSD")
-    set(PLATFORM_NETBSD ON)
-elseif (${CMAKE_SYSTEM_NAME} STREQUAL "DragonFly")
-    set(PLATFORM_DRAGONFLYBSD ON)
+    set(MANAGARM ON)
 elseif (${CMAKE_SYSTEM_NAME} STREQUAL "Haiku")
-    set(PLATFORM_HAIKU ON)
-elseif (${CMAKE_SYSTEM_NAME} STREQUAL "Linux")
-    set(PLATFORM_LINUX ON)
+    set(HAIKUOS ON)
+endif()
+
+# BSD
+if (DEFINED BSD)
+    if ("${BSD}" STREQUAL "DragonFlyBSD")
+        set(DRAGONFLYBSD ON)
+    elseif ("${BSD}" STREQUAL "FreeBSD")
+        set(FREEBSD ON)
+    elseif ("${BSD}" STREQUAL "OpenBSD")
+        set(OPENBSD ON)
+    elseif ("${BSD}" STREQUAL "NetBSD")
+        set(NETBSD ON)
+    endif()
 endif()
 
 # dumb heuristic to detect msys2
 if (CMAKE_COMMAND MATCHES "msys64")
-    set(PLATFORM_MSYS ON)
+    set(MSYS2 ON)
 endif()
 
+# compiler checks
 if (CMAKE_CXX_COMPILER_ID STREQUAL "Clang")
     set(CXX_CLANG ON)
     if (MSVC)
@@ -47,8 +48,6 @@ if (CMAKE_CXX_COMPILER_ID STREQUAL "Clang")
     endif()
 elseif (CMAKE_CXX_COMPILER_ID STREQUAL "GNU")
     set(CXX_GCC ON)
-elseif (CMAKE_CXX_COMPILER_ID STREQUAL "MSVC")
-    set(CXX_CL ON)
 elseif (CMAKE_CXX_COMPILER_ID STREQUAL "IntelLLVM")
     set(CXX_ICC ON)
 elseif (CMAKE_CXX_COMPILER_ID STREQUAL "AppleClang")
@@ -61,37 +60,13 @@ if(MINGW AND CXX_CLANG)
     set(CMAKE_SYSTEM_VERSION 10.0.0)
 endif()
 
-# NB: this does not account for SPARC
-if (PLATFORM_SUN)
-    # Terrific OpenIndiana pkg shenanigans
-    list(APPEND CMAKE_PREFIX_PATH
-        "${CMAKE_SYSROOT}/usr/lib/qt/6.6/lib/amd64/cmake")
-    list(APPEND CMAKE_MODULE_PATH
-        "${CMAKE_SYSROOT}/usr/lib/qt/6.6/lib/amd64/cmake")
-
-    # Amazing - absolutely incredible
-    list(APPEND CMAKE_PREFIX_PATH "${CMAKE_SYSROOT}/usr/lib/amd64/cmake")
-    list(APPEND CMAKE_MODULE_PATH "${CMAKE_SYSROOT}/usr/lib/amd64/cmake")
-
-    # For some mighty reason, doing a normal release build sometimes
-    # may not trigger the proper -O3 switch to materialize
-    if (CMAKE_BUILD_TYPE MATCHES "Release")
-        set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -O3")
-        set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -O3")
-    endif()
-    if (CMAKE_BUILD_TYPE MATCHES "RelWithDebInfo")
-        set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -O2")
-        set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -O2")
-    endif()
-endif()
-
 # MSYS2 utilities
 
 # Sometimes, PkgConfig modules will incorrectly reference / when CMake
 # wants you to reference it as C:/msys64/. This function corrects that.
 # Example in a Find module:
 #[[
-    if (PLATFORM_MSYS)
+    if (MSYS2)
         FixMsysPath(PkgConfig::OPUS)
     endif()
 ]]
@@ -116,41 +91,9 @@ function(FixMsysPath target)
         INTERFACE_INCLUDE_DIRECTORIES ${include_dir})
 endfunction()
 
-# MSYSTEM handling + program_path
-if (PLATFORM_MSYS)
-    # really, really dumb heuristic to detect what environment we are in
-    macro(system var)
-        if (CMAKE_COMMAND MATCHES ${var})
-            set(MSYSTEM ${var})
-        endif()
-    endmacro()
-
-    system(mingw64)
-    system(clang64)
-    system(clangarm64)
-    system(ucrt64)
-
-    if (NOT DEFINED MSYSTEM)
-        set(MSYSTEM msys2)
-    endif()
-
-    # We generally want to prioritize environment-specific binaries if possible
-    # some, like autoconf, are not present on environments besides msys2 though
-    set(CMAKE_PROGRAM_PATH C:/msys64/${MSYSTEM}/bin C:/msys64/usr/bin)
-    set(ENV{PKG_CONFIG_PATH} C:/msys64/${MSYSTEM}/lib/pkgconfig)
-endif()
-
-# This saves a truly ridiculous amount of time during linking
-# In my tests, without this, Eden takes 2 mins, with this, it takes 3-5 seconds
-# or on GitHub Actions, 10 minutes -> 3 seconds
+# Saves linking time
 if (MINGW)
     set(MINGW_FLAGS "-Wl,--strip-all -Wl,--gc-sections")
     set(CMAKE_EXE_LINKER_FLAGS_RELEASE
         "${CMAKE_EXE_LINKER_FLAGS_RELEASE} ${MINGW_FLAGS}")
 endif()
-
-# awesome
-if (PLATFORM_FREEBSD OR PLATFORM_DRAGONFLYBSD)
-    set(CMAKE_EXE_LINKER_FLAGS
-        "${CMAKE_EXE_LINKER_FLAGS} -L${CMAKE_SYSROOT}/usr/local/lib")
-endif()

externals/ffmpeg/CMakeLists.txt

@@ -56,7 +56,7 @@ if (NOT YUZU_USE_BUNDLED_FFMPEG)
     endif()
 endif()
 
-if (PLATFORM_PS4 OR PLATFORM_MANAGARM)
+if (OPENORBIS OR MANAGARM)
     # Doesn't support VA-API, don't go thru the embarrassment of trying to enable it
     list(APPEND FFmpeg_HWACCEL_FLAGS --disable-vaapi)
 elseif (ANDROID)
@@ -75,7 +75,7 @@ elseif (UNIX AND NOT DEFINED FFmpeg_IS_CROSS_COMPILING AND NOT ANDROID)
     if(X11_FOUND)
         if (NOT APPLE)
             # In Solaris needs explicit linking for ffmpeg which links to /lib/amd64/libX11.so
-            if(PLATFORM_SUN)
+            if(SOLARIS)
                 list(APPEND FFmpeg_HWACCEL_LIBRARIES
                     X11
                     "${CMAKE_SYSROOT}/usr/lib/xorg/amd64/libdrm.so")
@@ -158,7 +158,7 @@ elseif (UNIX AND NOT DEFINED FFmpeg_IS_CROSS_COMPILING AND NOT ANDROID)
     endif()
 endif()
 
-if (PLATFORM_PS4)
+if (OPENORBIS)
     list(APPEND FFmpeg_CROSS_COMPILE_LIBS
         -lkernel
         -lSceUserService
@@ -172,7 +172,7 @@ if (PLATFORM_PS4)
         --extra-cxxflags=${CMAKE_SYSROOT}/usr/include
         --extra-libs="${FFmpeg_CROSS_COMPILE_LIBS}"
     )
-elseif (PLATFORM_MANAGARM)
+elseif (MANAGARM)
     # Required for proper stuff
     list(APPEND FFmpeg_CROSS_COMPILE_FLAGS
         --disable-pthreads
@@ -299,7 +299,7 @@ else()
     set(FFmpeg_BUILD_LIBRARIES ${FFmpeg_LIBRARIES})
 
     # BSD make or Solaris make don't support ffmpeg make-j8
-    if (PLATFORM_LINUX OR ANDROID OR APPLE OR WIN32 OR PLATFORM_FREEBSD)
+    if (LINUX OR ANDROID OR APPLE OR WIN32 OR FREEBSD)
         set(FFmpeg_MAKE_ARGS -j${SYSTEM_THREADS})
     else()
         set(FFmpeg_MAKE_ARGS "")

externals/libusb/CMakeLists.txt

@@ -11,7 +11,7 @@ if (NOT libusb_ADDED)
 endif()
 
 # TODO: *BSD fails to compile--may need different configs/symbols
-if (MINGW OR PLATFORM_LINUX OR APPLE)
+if (MINGW OR LINUX OR APPLE)
     set(LIBUSB_FOUND ON CACHE BOOL "libusb is present" FORCE)
     set(LIBUSB_VERSION "1.0.24" CACHE STRING "libusb version string" FORCE)
 

externals/powah/CMakeLists.txt

@@ -0,0 +1,10 @@
+# SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project
+# SPDX-License-Identifier: GPL-3.0-or-later
+
+add_library(powah INTERFACE)
+target_include_directories(powah INTERFACE ${CMAKE_CURRENT_SOURCE_DIR})
+target_compile_options(powah INTERFACE -Wno-unused-parameter)
+
+add_executable(powah_tests tests.cpp)
+create_target_directory_groups(powah_tests)
+target_link_libraries(powah_tests PRIVATE Catch2::Catch2WithMain)

externals/powah/altivec_data.txt

@@ -0,0 +1,145 @@
+vabsdub,VX,04,1027
+vabsduh,VX,04,1091
+vabsduw,VX,04,1155
+vaddcuw,VX,04,384
+vaddfp,VX,04,10
+vaddsbs,VX,04,768
+vaddshs,VX,04,832
+vaddsws,VX,04,896
+vaddubm,VX,04,0
+vaddubs,VX,04,512
+vadduhm,VX,04,64
+vadduhs,VX,04,576
+vadduwm,VX,04,128
+vadduws,VX,04,640
+vand,VX,04,1028
+vandc,VX,04,1092
+vavgsb,VX,04,1282
+vavgsh,VX,04,1346
+vavgsw,VX,04,1410
+vavgub,VX,04,1026
+vavguh,VX,04,1090
+vavguw,VX,04,1154
+vcfsx,VDU,04842
+vcfux,VDU,04778
+vcmpbfp,VXR,04,966
+vcmpeqfp,VXR,04,198
+vcmpequb,VXR,04,6
+vcmpequh,VXR,04,70
+vcmpequw,VXR,04,134
+vcmpgefp,VXR,04,454
+vcmpgtfp,VXR,04,710
+vcmpgtsb,VXR,04,774
+vcmpgtsh,VXR,04,838
+vcmpgtsw,VXR,04,902
+vcmpgtub,VXR,04,518
+vcmpgtuh,VXR,04,582
+vcmpgtuw,VXR,04,646
+vctsxs,VDU,04970
+vctuxs,VDU,04906
+vexptefp,VY,04,394
+vlogefp,VY,04,458
+vmaddfp,VXC,46
+vmaxfp,VX,04,1034
+vmaxsb,VX,04,258
+vmaxsh,VX,04,322
+vmaxsw,VX,04,386
+vmaxub,VX,04,2
+vmaxuh,VX,04,66
+vmaxuw,VX,04,130
+vmhaddshs,VXC,32
+vmhraddshs,VXC,33
+vminfp,VX,04,1098
+vminsb,VX,04,770
+vminsh,VX,04,834
+vminsw,VX,04,898
+vminub,VX,04,514
+vminuh,VX,04,578
+vminuw,VX,04,642
+vmladduhm,VXC,34
+vmrghb,VX,04,12
+vmrghh,VX,04,76
+vmrghw,VX,04,140
+vmrglb,VX,04,268
+vmrglh,VX,04,332
+vmrglw,VX,04,396
+vmsummbm,VXC,37
+vmsumshm,VXC,40
+vmsumshs,VXC,41
+vmsumubm,VXC,36
+vmsumuhm,VXC,38
+vmsumuhs,VXC,39
+vmulesb,VX,04,776
+vmulesh,VX,04,840
+vmuleub,VX,04,520
+vmuleuh,VX,04,584
+vmulosb,VX,04,264
+vmulosh,VX,04,328
+vmuloub,VX,04,8
+vmulouh,VX,04,72
+vnmsubfp,VXC,47
+vnor,VX,04,1284
+vor,VX,04,1156
+vperm,VXC,43
+vpkpx,VX,04,782
+vpkshss,VX,04,398
+vpkshus,VX,04,270
+vpkswss,VX,04,462
+vpkswus,VX,04,334
+vpkuhum,VX,04,14
+vpkuhus,VX,04,142
+vpkuwum,VX,04,78
+vpkuwus,VX,04,206
+vrefp,VY,04,266
+vrfim,VY,04,714
+vrfin,VY,04,522
+vrfip,VY,04,650
+vrfiz,VY,04,586
+vrlb,VX,04,4
+vrlh,VX,04,68
+vrlw,VX,04,132
+vrsqrtefp,VY,04,330
+vsel,VXC,42
+vsl,VX,04,452
+vslb,VX,04,260
+vsldoi,VX,04,/ SH 44
+vslh,VX,04,324
+vslo,VX,04,1036
+vslw,VX,04,388
+vspltb,VU,04,524
+vsplth,VU,04,588
+vspltisb,VS,04,780
+vspltish,VS,04,844
+vspltisw,VS,04,908
+vspltw,VSU,04,652
+vsr,VX,04,708
+vsrab,VX,04,772
+vsrah,VX,04,836
+vsraw,VX,04,900
+vsrb,VX,04,516
+vsrh,VX,04,580
+vsro,VX,04,1100
+vsrw,VX,04,644
+vsubcuw,VX,04,1408
+vsubfp,VX,04,74
+vsubsbs,VX,04,1792
+vsubshs,VX,04,1856
+vsubsws,VX,04,1920
+vsububm,VX,04,1024
+vsububs,VX,04,1536
+vsubuhm,VX,04,1088
+vsubuhs,VX,04,1600
+vsubuwm,VX,04,1152
+vsubuws,VX,04,1664
+vsumsws,VX,04,1928
+vsum2sws,VX,04,1672
+vsum4sbs,VX,04,1800
+vsum4shs,VX,04,1608
+vsum4ubs,VX,04,1544
+vupkhpx,VY,04,846
+vupkhsb,VY,04,526
+vupkhsh,VY,04,590
+vupklpx,VY,04,974
+vupklsb,VY,04,654
+vupklsh,VY,04,718
+vxor,VX,04,122

externals/powah/build.sh

@@ -0,0 +1,6 @@
+#!/bin/sh
+
+# SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project
+# SPDX-License-Identifier: GPL-3.0-or-later
+$CC data2code.c -o data2code && ./data2code data.txt >powah_gen_base.hpp
+$CC --target=powerpc64le test.S -c -o test && objdump -SC test

externals/powah/data.txt

@@ -0,0 +1,222 @@
+add[o][.],Add,XO,31,266
+addc[o][.],Add Carrying,XO,31,10
+adde[o][.],Add Extended,XO,31,138
+addi,Add Immediate,D,14,
+addic,Add Immediate Carrying,D,12,
+addic.,Add Immediate Carrying and Record,D,13,
+addis,Add Immediate Shifted,D,15,
+addme[o][.],Add to Minus One Extended,XO,31,234
+addze[o][.],Add to Zero Extended,XO,31,202
+and[.],AND,X,31,28
+andc[.],AND with Complement,X,31,60
+andi.,AND Immediate,D,28,
+andis.,AND Immediate Shifted,D,29,
+b[l][a],Branch,I,18,
+bc[l][a],Branch Conditional,B,16,
+bcctr[l],Branch Conditional to Count Register,XL,19,528
+bclr[l],Branch Conditional Link Register,XL,19,16
+cmp,Compare,X,31,0
+cmpi,Compare Immediate,D,11,
+cmpl,Compare Logical,X,31,32
+cmpli,Compare Logical Immediate,D,10,
+cntlzd,Count Leading Zeros Doubleword,X,31,58
+cntlzw[.],Count Leading Zeros Word,X,31,26
+crand,Condition Register AND,XL,19,257
+crandc,Condition Register AND with Complement,XL,19,129
+creqv,Condition Register Equivalent,XL,19,289
+crnand,Condition Register NAND,XL,19,225
+crnor,Condition Register NOR,XL,19,33
+cror,Condition Register OR,XL,19,449
+crorc,Condition Register OR with Complement,XL,19,417
+crxor,Condition Register XOR,XL,19,193
+dcbf,Data Cache Block Flush,X,31,86
+dcbi,Data Cache Block Invalidate,X,31,470
+dcbst,Data Cache Block Store,X,31,54
+dcbt,Data Cache Block Touch,X,31,278
+dcbtst,Data Cache Block Touch for Store,X,31,246
+dcbz,Data Cache Block Set to Zero,X,31,1014
+divd,Divide Doubleword,XO,31,489
+divdu,Divide Doubleword Unsigned,XO,31,457
+divw[o][.],Divide Word,XO,31,491
+divwu[o][.],Divide Word Unsigned,XO,31,459
+eciwx,External Control in Word Indexed (opt.),X,31,310
+ecowx,External Control out Word Indexed (opt.),X,31,438
+eieio,Enforce In-order Execution of I/O,X,31,854
+eqv[.],Equivalent,X,31,284
+extsb[.],Extend Sign Byte,X,31,954
+extsh[.],Extend Sign Halfword,XO,31,922
+extsw,Extend Sign Word,X,31,986
+fabs[.],Floating Absolute Value,X,63,264
+fadd[.],Floating Add,A,63,21
+fadds[.],Floating Add Single,A,59,21
+fcfid,Floating Convert from Integer Doubleword,X,63,846
+fcmpo,Floating Compare Ordered,X,63,32
+fcmpu,Floating Compare Unordered,XL,63,0
+fctid,Floating Convert to Integer Doubleword,X,63,814
+fctidz,Floating Convert to Integer Doubleword with Round Toward Zero,X,63,815
+fctiw[.],Floating Convert to Integer Word,X,63,14
+fctiwz[.],Floating Convert to Integer Word with Round to Zero,XL,63,15
+fdiv[.],Floating Divide,A,63,18
+fdivs[.],Floating Divide Single,A,59,18
+fmadd[.],Floating Multiply-Add,A,63,29
+fmadds[.],Floating Multiply-Add Single,A,59,29
+fmr[.],Floating Move Register,X,63,72
+fmsub[.],Floating Multiply-Subtract,A,63,28
+fmsubs[.],Floating Multiply-Subtract Single,A,59,28
+fmul[.],Floating Multiply,A,63,25
+fmuls[.],Floating Multiply Single,A,59,25
+fnabs[.],Floating Negative Absolute Value,X,63,136
+fneg[.],Floating Negate,X,63,40
+fnmadd[.],Floating Negative Multiply-Add,A,63,31
+fnmadds[.],Floating Negative Multiply-Add Single,A,59,31
+fnmsub[.],Floating Negative Multiply-Subtract,A,63,30
+fnmsubs[.],Floating Negative Multiply-Subtract Single,A,59,30
+fres[.],Floating Reciprocal Estimate Single (optional),A,59,24
+frsp[.],Floating Round to Single Precision,X,63,12
+frsqrte[.],Floating Reciprocal Square Root Estimate (optional),A,63,26
+fsel[.],Floating-Point Select (optional),A,63,23
+fsub[.],Floating Subtract,A,63,20
+fsubs[.],Floating Subtract Single,A,59,20
+icbi,Instruction Cache Block Invalidate,X,31,982
+isync,Instruction Synchronize,X,19,150
+lbz,Load Byte and Zero,D,34,
+lbzu,Load Byte and Zero with Update,D,35,
+lbzux,Load Byte and Zero with Update Indexed,X,31,119
+lbzx,Load Byte and Zero Indexed,X,31,87
+ld,Load Doubleword,DS,58,0
+ldarx,Load Doubleword and Reserve Indexed,X,31,84
+ldu,Load Doubleword with Update,DS,58,1
+ldux,Load Doubleword with Update Indexed,X,31,53
+ldx,Load Doubleword Indexed,X,31,21
+lfd,Load Floating-Point Double,D,50,
+lfdu,Load Floating-Point Double with Update,D,51,
+lfdux,Load Floating-Point Double with Update Indexed,X,31,631
+lfdx,Load Floating-Point Double Indexed,X,31,599
+lfs,Load Floating-Point Single,D,48,
+lfsu,Load Floating-Point Single with Update,D,49,
+lfsux,Load Floating-Point Single with Update Indexed,X,31,567
+lfsx,Load Floating-Point Single Indexed,X,31,535
+lha,Load Half Algebraic,D,42,
+lhau,Load Half Algebraic with Update,D,43,
+lhaux,Load Half Algebraic with Update Indexed,X,31,375
+lhax,Load Half Algebraic Indexed,X,31,343
+lhbrx,Load Half Byte-Reversed Indexed,X,31,790
+lhz,Load Half and Zero,D,40,
+lhzu,Load Half and Zero with Update,D,41,
+lhzux,Load Half and Zero with Update Indexed,X,31,331
+lhzx,Load Half and Zero Indexed,X,31,279
+lmw,Load Multiple Word,D,46,
+lswi,Load String Word Immediate,X,31,597
+lswx,Load String Word Indexed,X,31,533
+lwa,Load Word Algebraic,DS,58,2
+lwarx,Load Word and Reserve Indexed,X,31,20
+lwaux,Load Word Algebraic with Update Indexed,X,31,373
+lwax,Load Word Algebraic Indexed,X,31,341
+lwbrx,Load Word Byte-Reversed Indexed,X,31,534
+lwz,Load Word and Zero,D,32,
+lwzu,Load Word with Zero Update,D,33,
+lwzux,Load Word and Zero with Update Indexed,X,31,55
+lwzx,Load Word and Zero Indexed,X,31,23
+mcrf,Move Condition Register Field,XL,19,0
+mcrfs,Move to Condition Register from FPSCR,X,63,64
+mcrxr,Move to Condition Register from XER,X,31,512
+mfcr,Move from Condition Register,X,31,19
+mffs[.],Move from FPSCR,X,63,583
+mfmsr,Move from Machine State Register,X,31,83
+mfspr,Move from Special-Purpose Register,X,31,339
+mfsr,Move from Segment Register,X,31,595
+mfsrin,Move from Segment Register Indirect,X,31,659
+mtcrf,Move to Condition Register Fields,XFX,31,144
+mtfsb0[.],Move to FPSCR Bit 0,X,63,70
+mtfsb1[.],Move to FPSCR Bit 1,X,63,38
+mtfsf[.],Move to FPSCR Fields,XFL,63,711
+mtfsfi[.],Move to FPSCR Field Immediate,X,63,134
+mtmsr,Move to Machine State Register,X,31,146
+mtspr,Move to Special-Purpose Register,X,31,467
+mtsr,Move to Segment Register,X,31,210
+mtsrin,Move to Segment Register Indirect,X,31,242
+mulhd,Multiply High Doubleword,XO,31,73
+mulhdu,Multiply High Doubleword Unsigned,XO,31,9
+mulhw[.],Multiply High Word,XO,31,75
+mulhwu[.],Multiply High Word Unsigned,XO,31,11
+mulld,Multiply Low Doubleword,XO,31,233
+mulli,Multiply Low Immediate,D,07,
+mullw[o][.],Multiply Low Word,XO,31,235
+nand[.],NAND,X,31,476
+neg[o][.],Negate,XO,31,104
+nor[.],NOR,X,31,124
+or[.],OR,X,31,444
+orc[.],OR with Complement,X,31,412
+ori,OR Immediate,D,24,
+oris,OR Immediate Shifted,D,25,
+rfi,Return from Interrupt,X,19,50
+rldcl,Rotate Left Doubleword then Clear Left,MDS,30,8
+rldcr,Rotate Left Doubleword then Clear Right,MDS,30,9
+rldic,Rotate Left Doubleword Immediate then Clear,MD,30,2
+rldicl,Rotate Left Doubleword Immediate then Clear Left,MD,30,0
+rldicr,Rotate Left Doubleword Immediate then Clear Right,MD,30,1
+rldimi,Rotate Left Doubleword Immediate then Mask Insert,MD,30,3
+rlwimi[.],Rotate Left Word Immediate then Mask Insert,M,20,
+rlwinm[.],Rotate Left Word Immediate then AND with Mask,M,21,
+rlwnm[.],Rotate Left Word then AND with Mask,M,23,
+sc,System Call,SC,17,
+si,Subtract Immediate,D,12,
+si.,Subtract Immediate and Record,D,13,
+slbia,SLB Invalidate All,X,31,498
+slbie,SLB Invalidate Entry,X,31,434
+sld,Shift Left Doubleword,X,31,27
+slw[.],Shift Left Word,X,31,24
+srad,Shift Right Algebraic Doubleword,X,31,794
+sradi,Shift Right Algebraic Doubleword Immediate,XS,31,413
+srd,Shift Right Doubleword,X,31,539
+sraw[.],Shift Right Algebraic Word,X,31,792
+srawi[.],Shift Right Algebraic Word Immediate,X,31,824
+srw[.],Shift Right Word,X,31,536
+stb,Store Byte,D,38,
+stbu,Store Byte with Update,D,39,
+stbux,Store Byte with Update Indexed,X,31,247
+stbx,Store Byte Indexed,X,31,215
+std,Store Doubleword,DS,62,0
+stdcx,Store Doubleword Conditional Indexed,X,31,214
+stdu,Store Doubleword with Update,DS,62,1
+stdux,Store Doubleword with Update Indexed,X,31,181
+stdx,Store Doubleword Indexed,X,31,149
+stfd,Store Floating-Point Double,D,54,
+stfdu,Store Floating-Point Double with Update,D,55,
+stfdux,Store Floating-Point Double with Update Indexed,X,31,759
+stfdx,Store Floating-Point Double Indexed,X,31,727
+stfiwx,Store Floating-Point as Integer Word Indexed (optional),X,31,983
+stfs,Store Floating-Point Single,D,52,
+stfsu,Store Floating-Point Single with Update,D,53,
+stfsux,Store Floating-Point Single with Update Indexed,X,31,695
+stfsx,Store Floating-Point Single Indexed,X,31,663
+sth,Store Half,D,44,
+sthbrx,Store Half Byte-Reverse Indexed,X,31,918
+sthu,Store Half with Update,D,45,
+sthux,Store Half with Update Indexed,X,31,439
+sthx,Store Half Indexed,X,31,407
+stmw,Store Multiple Word,D,47,
+stswi,Store String Word Immediate,X,31,725
+stswx,Store String Word Indexed,X,31,661
+stw,Store,D,36,
+stwbrx,Store Word Byte-Reversed Indexed,X,31,662
+stwcx.,Store Word Conditional Indexed,X,31,150
+stwu,Store Word with Update,D,37,
+stwux,Store Word with Update Indexed,X,31,183
+stwx,Store Word Indexed,X,31,151
+subf[o][.],Subtract from,XO,31,40
+subfc[o][.],Subtract from Carrying,XO,31,08
+subfe[o][.],Subtract from Extended,XO,31,136
+subfic,Subtract from Immediate Carrying,D,08,
+subfme[o][.],Subtract from Minus One Extended,XO,31,232
+subfze[o][.],Subtract from Zero Extended,XO,31,200
+sync,Synchronize,X,31,598
+td,Trap Doubleword,X,31,68
+tdi,Trap Doubleword Immediate,D,2,
+tlbie,Translation Look-aside Buffer Invalidate Entry (optional),X,31,306
+tlbsync,Translation Look-aside Buffer Synchronize (optional),X,31,566
+tw,Trap Word,X,31,04
+twi,Trap Word Immediate,D,03,
+xor[.],XOR,X,31,316
+xori,XOR Immediate,D,26,
+xoris,XOR Immediate Shift,D,27,

externals/powah/data2code.c

@@ -0,0 +1,343 @@
+// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project
+// SPDX-License-Identifier: GPL-3.0-or-later
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <unistd.h>
+#include <stdbool.h>
+#include <ctype.h>
+#include <string.h>
+int main(int argc, char *argv[]) {
+    printf(
+        "// this file is autogenerated DO NOT MODIFY\n"
+        "#pragma once\n"
+    );
+    FILE* fp = fopen(argv[1], "rt");
+    if (fp) {
+        char line[80];
+        while (fgets(line, sizeof line, fp) != NULL) {
+            bool with_o = strstr(line, "[o]"), with_d = strstr(line, "[.]");
+            char* p = strchr(line, '\n'), *name = strchr(line, ','), *mem = line;
+            if (p) *p = '\0';
+            if (name) {
+                *name++ = '\0';
+                char *form = strchr(name, ',');
+                if (form) {
+                    *form++ = '\0';
+                    char *opc = strchr(form, ',');
+                    if (opc) {
+                        *opc++ = '\0';
+                        char *sec = strchr(opc, ',');
+                        if (sec) {
+                            struct b_info { const char *s; int o; int p; } infos[] = {
+                                {"",1,0},
+                                {"LT",1,12},
+                                {"LE",2,4},
+                                {"NG",2,4},
+                                {"EQ",3,12},
+                                {"GE",1,4},
+                                {"NL",1,4},
+                                {"GT",2,12},
+                                {"NE",3,4},
+                                {"SO",4,12},
+                                {"UN",4,12},
+                                {"NS",4,4},
+                                {"NU",4,4},
+                            };
+#define OP_EXT ((i_opcode << 26) | (i_extopc << 1))
+                            if (strchr(mem, '[') != NULL) *strchr(mem, '[') = '\0';
+                            if (strchr(mem, '.') != NULL) *strchr(mem, '.') = '_';
+                            *sec++ = '\0';
+                            for (int i = 0; i < strlen(mem); ++i)
+                                mem[i] = toupper(mem[i]);
+                            int i_opcode = atoi(opc);
+                            int i_extopc = atoi(sec);
+                            //printf("// %s\n", mem);
+                            if (!strcmp(form, "XO")) {
+                                if (!strcmp(mem, "EXTSH")) {
+                                    printf(
+                                        "void %s(GPR const rt, GPR const ra) {"
+                                        " emit_%s(0x%08x, rt, ra, R0, false, false); "
+                                        "}\n"
+                                    , mem, form, OP_EXT);
+                                    printf(
+                                        "void %sC(GPR const rt, GPR const ra) {"
+                                        " emit_%s(0x%08x, rt, ra, R0, true, false); "
+                                        "}\n"
+                                    , mem, form, OP_EXT);
+                                    printf(
+                                        "void %s_(GPR const rt, GPR const ra) {"
+                                        " emit_%s(0x%08x, rt, ra, R0, false, true); "
+                                        "}\n"
+                                    , mem, form, OP_EXT);
+                                    printf(
+                                        "void %sC_(GPR const rt, GPR const ra) {"
+                                        " emit_%s(0x%08x, rt, ra, R0, true, true); "
+                                        "}\n"
+                                    , mem, form, OP_EXT);
+                                } else {
+                                    printf(
+                                        "void %s(GPR const rt, GPR const ra, GPR const rb) {"
+                                        " emit_%s(0x%08x, rt, ra, rb, false, false); "
+                                        "}\n"
+                                    , mem, form, OP_EXT);
+                                    printf(
+                                        "void %sO(GPR const rt, GPR const ra, GPR const rb) {"
+                                        " emit_%s(0x%08x, rt, ra, rb, true, false); "
+                                        "}\n"
+                                    , mem, form, OP_EXT);
+                                    printf(
+                                        "void %s_(GPR const rt, GPR const ra, GPR const rb) {"
+                                        " emit_%s(0x%08x, rt, ra, rb, false, true); "
+                                        "}\n"
+                                    , mem, form, OP_EXT);
+                                    printf(
+                                        "void %sO_(GPR const rt, GPR const ra, GPR const rb) {"
+                                        " emit_%s(0x%08x, rt, ra, rb, true, true); "
+                                        "}\n"
+                                    , mem, form, OP_EXT);
+                                }
+                            } else if (!strcmp(form, "X")) {
+                                if (!strcmp(mem, "CMPL") || !strcmp(mem, "CMP")) {
+                                    printf(
+                                        "void %s(uint32_t bf, uint32_t l, GPR const ra, GPR const rb) {"
+                                        " emit_%s(0x%08x, GPR{(bf << 2) | l}, ra, rb, false); "
+                                        "}\n"
+                                    , mem, form, OP_EXT);
+                                } else if (!strcmp(mem, "CNTLZD") || !strcmp(mem, "CNTLZW") || !strcmp(mem, "EXTSB") || !strcmp(mem, "EXTSH") || !strcmp(mem, "EXTSW")) {
+                                    printf(
+                                        "void %s(GPR const rt, GPR const ra) {"
+                                        " emit_%s(0x%08x, ra, rt, R0, false); "
+                                        "}\n"
+                                    , mem, form, OP_EXT);
+                                    printf(
+                                        "void %s_(GPR const rt, GPR const ra) {"
+                                        " emit_%s(0x%08x, ra, rt, R0, true); "
+                                        "}\n"
+                                    , mem, form, OP_EXT);
+                                } else {
+                                    printf(
+                                        "void %s(GPR const rt, GPR const ra, GPR const rb) {"
+                                        " emit_%s(0x%08x, ra, rt, rb, false); "
+                                        "}\n"
+                                    , mem, form, OP_EXT);
+                                    printf(
+                                        "void %s_(GPR const rt, GPR const ra, GPR const rb) {"
+                                        " emit_%s(0x%08x, ra, rt, rb, true); "
+                                        "}\n"
+                                    , mem, form, OP_EXT);
+                                }
+                            } else if (!strcmp(form, "I")) {
+                                printf(
+                                    "void %s(Label const& i) {"
+                                    " emit_reloc_%s(0x%08x, i, false); "
+                                    "}\n"
+                                , mem, form, i_opcode << 26);
+                                printf(
+                                    "void %sL(Label const& i) {"
+                                    " emit_reloc_%s(0x%08x, i, true); "
+                                    "}\n"
+                                , mem, form, i_opcode << 26);
+                            } else if (!strcmp(form, "B")) {
+                                for (int i = 0; i < 12; ++i) {
+                                    printf(
+                                        "void %s%s(CPR const cr, Label const& i) {"
+                                        " emit_reloc_%s(0x%08x, %i, cr.index + %i, i, false); "
+                                        "}\n"
+                                    , mem, infos[i].s, form, i_opcode << 26, infos[i].p, infos[i].o - 1);
+                                    printf(
+                                        "void %s%sL(CPR const cr, Label const& i) {"
+                                        " emit_reloc_%s(0x%08x, %i, cr.index + %i, i, true); "
+                                        "}\n"
+                                    , mem, infos[i].s, form, i_opcode << 26, infos[i].p, infos[i].o - 1);
+                                    if (!strcmp(mem, "BC")) mem[1] = '\0';
+                                }
+                            } else if (!strcmp(form, "D")) {
+                                if (!strcmp(mem, "CMPLI") || !strcmp(mem, "CMPI")) {
+                                    printf(
+                                        "void %s(uint32_t bf, uint32_t l, GPR const ra, uint32_t d) {"
+                                        " emit_%s(0x%08x, GPR{(bf << 2) | l}, ra, d); "
+                                        "}\n"
+                                    , mem, form, i_opcode << 26);
+                                } else if (!strcmp(mem, "ANDIS_") || !strcmp(mem, "ANDI_")
+                                || !strcmp(mem, "ORI") || !strcmp(mem, "ORIS")
+                                || !strcmp(mem, "XORI") || !strcmp(mem, "XORIS")) {
+                                    printf(
+                                        "void %s(GPR const rt, GPR const ra, uint32_t d) {"
+                                        " emit_%s(0x%08x, ra, rt, d); "
+                                        "}\n"
+                                    , mem, form, i_opcode << 26);
+                                } else {
+                                    printf(
+                                        "void %s(GPR const rt, GPR const ra, uint32_t d) {"
+                                        " emit_%s(0x%08x, rt, ra, d); "
+                                        "}\n"
+                                    , mem, form, i_opcode << 26);
+                                }
+                            } else if (!strcmp(form, "SC")) {
+                                printf(
+                                    "void %s(uint32_t lev) {"
+                                    " emit_%s(0x%08x, lev); "
+                                    "}\n"
+                                , mem, form, i_opcode << 26);
+                            } else if (!strcmp(form, "DS")) {
+#define OP_EXT_DS ((i_opcode << 26) | (i_extopc << 0))
+                                printf(
+                                    "void %s(GPR const rt, GPR const ra, uint32_t d) {"
+                                    " emit_%s(0x%08x, rt, ra, d >> 2); "
+                                    "}\n"
+                                , mem, form, OP_EXT_DS);
+#undef OP_EXT_DS
+                            } else if (!strcmp(form, "XS")) {
+#define OP_EXT_XS ((i_opcode << 26) | (i_extopc << 2))
+                                /* HUGE DIFFERENCE DO NOT REMOVE */
+                                printf(
+                                    "void %s(GPR const rt, GPR const ra, uint32_t sh) {"
+                                    " emit_%s(0x%08x, rt, ra, sh, false); "
+                                    "}\n"
+                                , mem, form, OP_EXT_XS);
+                                printf(
+                                    "void %s_(GPR const rt, GPR const ra, uint32_t sh) {"
+                                    " emit_%s(0x%08x, rt, ra, sh, true); "
+                                    "}\n"
+                                , mem, form, OP_EXT_XS);
+#undef OP_EXT_XS
+                            } else if (!strcmp(form, "XL")) {
+                                if (!strcmp(mem, "BCLR")) {
+                                    printf(
+                                        "void %s(GPR const bt, CPR const ba, GPR const bb) {"
+                                        " emit_%s(0x%08x, bt.index, ba.index, bb.index, false); "
+                                        "}\n"
+                                    , mem, form, OP_EXT);
+                                    printf(
+                                        "void %sL(GPR const bt, CPR const ba, GPR const bb) {"
+                                        " emit_%s(0x%08x, bt.index, ba.index, bb.index, true); "
+                                        "}\n"
+                                    , mem, form, OP_EXT);
+                                    if (!strcmp(mem, "BCLR")) mem[1] = '\0';
+                                    for (int i = 1; i < 12; ++i) {
+                                        printf(
+                                            "void %s%sLR(CPR const cr) {"
+                                            " emit_%s(0x%08x, %i, cr.index + %i, 0, false); "
+                                            "}\n"
+                                        , mem, infos[i].s, form, OP_EXT, infos[i].p, infos[i].o - 1);
+                                        printf(
+                                            "void %s%sLRL(CPR const cr) {"
+                                            " emit_%s(0x%08x, %i, cr.index + %i, 0, true); "
+                                            "}\n"
+                                        , mem, infos[i].s, form, OP_EXT, infos[i].p, infos[i].o - 1);
+                                    }
+                                } else if (mem[0] == 'B') {
+                                    printf(
+                                        "void %s(GPR const bt, CPR const ba, GPR const bb) {"
+                                        " emit_%s(0x%08x, bt.index, ba.index, bb.index, false); "
+                                        "}\n"
+                                    , mem, form, OP_EXT);
+                                    printf(
+                                        "void %sL(GPR const bt, CPR const ba, GPR const bb) {"
+                                        " emit_%s(0x%08x, bt.index, ba.index, bb.index, true); "
+                                        "}\n"
+                                    , mem, form, OP_EXT);
+                                    printf(
+                                        "void %s(GPR const bt, Cond const ba, GPR const bb) {"
+                                        " emit_%s(0x%08x, bt.index, cond2offset(ba), bb.index, false); "
+                                        "}\n"
+                                    , mem, form, OP_EXT);
+                                    printf(
+                                        "void %sL(GPR const bt, Cond const ba, GPR const bb) {"
+                                        " emit_%s(0x%08x, bt.index, cond2offset(ba), bb.index, true); "
+                                        "}\n"
+                                    , mem, form, OP_EXT);
+                                } else {
+                                    printf(
+                                        "void %s(CPR const bt, CPR const ba, CPR const bb) {"
+                                        " emit_%s(0x%08x, bt.index, ba.index, bb.index, false); "
+                                        "}\n"
+                                    , mem, form, OP_EXT);
+                                    printf(
+                                        "void %sL(CPR const bt, CPR const ba, CPR const bb) {"
+                                        " emit_%s(0x%08x, bt.index, ba.index, bb.index, true); "
+                                        "}\n"
+                                    , mem, form, OP_EXT);
+                                }
+                            } else if (!strcmp(form, "M")) {
+                                if (!strcmp(mem, "RLWNM")) {
+                                    printf(
+                                        "void %s(GPR const rs, GPR const ra, GPR const rb, uint32_t mb, uint32_t me = 0) {"
+                                        " emit_%s(0x%08x, ra, rs, rb.index, mb, me, false); "
+                                        "}\n"
+                                    , mem, form, OP_EXT);
+                                    printf(
+                                        "void %s_(GPR const rs, GPR const ra, GPR const rb, uint32_t mb, uint32_t me = 0) {"
+                                        " emit_%s(0x%08x, ra, rs, rb.index, mb, me, true); "
+                                        "}\n"
+                                    , mem, form, OP_EXT);
+                                } else {
+                                    printf(
+                                        "void %s(GPR const rs, GPR const ra, uint32_t sh, uint32_t mb, uint32_t me = 0) {"
+                                        " emit_%s(0x%08x, ra, rs, sh, mb, me, false); "
+                                        "}\n"
+                                    , mem, form, OP_EXT);
+                                    printf(
+                                        "void %s_(GPR const rs, GPR const ra, uint32_t sh, uint32_t mb, uint32_t me = 0) {"
+                                        " emit_%s(0x%08x, ra, rs, sh, mb, me, true); "
+                                        "}\n"
+                                    , mem, form, OP_EXT);
+                                }
+                            } else if (!strcmp(form, "MD")) {
+                                printf(
+                                    "void %s(GPR const rs, GPR const ra, uint32_t mb, uint32_t sh) {"
+                                    " emit_%s(0x%08x, ra, rs, mb, sh, false); "
+                                    "}\n"
+                                , mem, form, (i_opcode << 26) | (i_extopc << 2));
+                                printf(
+                                    "void %s_(GPR const rs, GPR const ra, uint32_t mb, uint32_t sh) {"
+                                    " emit_%s(0x%08x, ra, rs, mb, sh, true); "
+                                    "}\n"
+                                , mem, form, (i_opcode << 26) | (i_extopc << 2));
+                            } else if (!strcmp(form, "MDS")) {
+                                printf(
+                                    "void %s(GPR const rs, GPR const ra, GPR const rb, uint32_t mb) {"
+                                    " emit_%s(0x%08x, ra, rs, rb, mb, false); "
+                                    "}\n"
+                                , mem, form, OP_EXT);
+                                printf(
+                                    "void %s_(GPR const rs, GPR const ra, GPR const rb, uint32_t mb) {"
+                                    " emit_%s(0x%08x, ra, rs, rb, mb, true); "
+                                    "}\n"
+                                , mem, form, OP_EXT);
+                            } else if (!strcmp(form, "A")) {
+                                printf(
+                                    "void %s(FPR const frt, FPR const fra, FPR const frb, FPR const frc) {"
+                                    " emit_%s(0x%08x, frt, fra, frb, frc, false); "
+                                    "}\n"
+                                , mem, form, OP_EXT);
+                                printf(
+                                    "void %s_(FPR const frt, FPR const fra, FPR const frb, FPR const frc) {"
+                                    " emit_%s(0x%08x, frt, fra, frb, frc, true); "
+                                    "}\n"
+                                , mem, form, OP_EXT);
+                            } else if (!strcmp(form, "XFX")) {
+                                printf(
+                                    "void %s(GPR const rt, uint32_t spr) {"
+                                    " emit_%s(0x%08x, rt, spr); "
+                                    "}\n"
+                                , mem, form, OP_EXT);
+                            } else {
+                                printf(
+                                    "void %s() {"
+                                    " emit_%s(0x%08x); "
+                                    "}\n"
+                                , mem, form, OP_EXT);
+                            }
+                        }
+                    }
+                }
+            }
+            //printf("%s\n", line);
+        }
+        fclose(fp);
+        return 0;
+    }
+    return 1;
+}

externals/powah/powah_emit.hpp

@@ -0,0 +1,401 @@
+// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project
+// SPDX-License-Identifier: GPL-3.0-or-later
+
+#pragma once
+
+#undef NDEBUG
+
+#include <cstdint>
+#include <cstddef>
+#include <cassert>
+#include <vector>
+#include <utility>
+#include <sys/mman.h>
+#include <cstdlib>
+
+//#ifndef __cpp_lib_unreachable
+namespace std {
+[[noreturn]] inline void unreachable() {
+#if defined(_MSC_VER) && !defined(__clang__) // MSVC
+    __assume(false);
+#else // GCC, Clang
+    __builtin_unreachable();
+#endif
+}
+}
+//#endif
+
+namespace powah {
+
+// Symbolic conditions
+enum class Cond : uint8_t {
+    LT, LE, NG, EQ, GE, NL, GT, NE, SO, UN, NS, NU
+};
+
+struct GPR { uint32_t index; };
+struct FPR { uint32_t index; };
+struct VPR { uint32_t index; };
+struct CPR { uint32_t index; };
+struct Label { uint32_t index; };
+
+constexpr inline GPR R0{0};
+constexpr inline GPR R1{1};
+constexpr inline GPR R2{2};
+constexpr inline GPR R3{3};
+constexpr inline GPR R4{4};
+constexpr inline GPR R5{5};
+constexpr inline GPR R6{6};
+constexpr inline GPR R7{7};
+constexpr inline GPR R8{8};
+constexpr inline GPR R9{9};
+constexpr inline GPR R10{10};
+constexpr inline GPR R11{11};
+constexpr inline GPR R12{12};
+constexpr inline GPR R13{13};
+constexpr inline GPR R14{14};
+constexpr inline GPR R15{15};
+constexpr inline GPR R16{16};
+constexpr inline GPR R17{17};
+constexpr inline GPR R18{18};
+constexpr inline GPR R19{19};
+constexpr inline GPR R20{20};
+constexpr inline GPR R21{21};
+constexpr inline GPR R22{22};
+constexpr inline GPR R23{23};
+constexpr inline GPR R24{24};
+constexpr inline GPR R25{25};
+constexpr inline GPR R26{26};
+constexpr inline GPR R27{27};
+constexpr inline GPR R28{28};
+constexpr inline GPR R29{29};
+constexpr inline GPR R30{30};
+constexpr inline GPR R31{31};
+
+constexpr inline FPR FR0{0};
+constexpr inline FPR FR1{1};
+constexpr inline FPR FR2{2};
+constexpr inline FPR FR3{3};
+constexpr inline FPR FR4{4};
+constexpr inline FPR FR5{5};
+constexpr inline FPR FR6{6};
+constexpr inline FPR FR7{7};
+constexpr inline FPR FR8{8};
+constexpr inline FPR FR9{9};
+constexpr inline FPR FR10{10};
+constexpr inline FPR FR11{11};
+constexpr inline FPR FR12{12};
+constexpr inline FPR FR13{13};
+constexpr inline FPR FR14{14};
+constexpr inline FPR FR15{15};
+constexpr inline FPR FR16{16};
+constexpr inline FPR FR17{17};
+constexpr inline FPR FR18{18};
+constexpr inline FPR FR19{19};
+constexpr inline FPR FR20{20};
+constexpr inline FPR FR21{21};
+constexpr inline FPR FR22{22};
+constexpr inline FPR FR23{23};
+constexpr inline FPR FR24{24};
+constexpr inline FPR FR25{25};
+constexpr inline FPR FR26{26};
+constexpr inline FPR FR27{27};
+constexpr inline FPR FR28{28};
+constexpr inline FPR FR29{29};
+constexpr inline FPR FR30{30};
+constexpr inline FPR FR31{31};
+
+// They call it CPR because when programmers see this code they-
+constexpr inline CPR CR0{0};
+constexpr inline CPR CR1{4};
+constexpr inline CPR CR2{8};
+constexpr inline CPR CR3{12};
+constexpr inline CPR CR4{16};
+constexpr inline CPR CR5{20};
+constexpr inline CPR CR6{24};
+constexpr inline CPR CR7{28};
+
+constexpr uint32_t XER_SO = 32;
+constexpr uint32_t XER_OV = 33;
+constexpr uint32_t XER_CA = 34;
+
+enum class RelocKind : uint8_t {
+    FormB,
+    FormI,
+};
+struct RelocInfo {
+    uint32_t offset;
+    RelocKind kind;
+};
+
+struct Context {
+    Context() = default;
+    Context(void* ptr, size_t size)
+        : base{reinterpret_cast<uint32_t*>(ptr)}
+        , offset{0}
+        , size{uint32_t(size)} {
+
+    }
+    ~Context() = default;
+
+    std::vector<uint32_t> labels;
+    std::vector<std::pair<uint32_t, RelocInfo>> relocs;
+
+    Label DefineLabel() {
+        labels.push_back(0);
+        return Label{ uint32_t(labels.size() - 1) };
+    }
+
+    void ApplyRelocs() {
+        for (auto const &[index, info] : relocs) {
+            //assert(labels[index] != 0); //label must have an addr
+            int32_t rel = (int32_t)labels[index] - (int32_t)info.offset;
+            switch (info.kind) {
+            case RelocKind::FormB:
+                base[info.offset] |= bitExt(rel, 16, 14);
+                break;
+            case RelocKind::FormI:
+                base[info.offset] |= bitExt(rel, 6, 24);
+                break;
+            }
+        }
+        relocs.clear();
+    }
+
+    void LABEL(Label l) {
+        assert(labels[l.index] == 0);
+        labels[l.index] = offset;
+    }
+
+    static constexpr uint32_t cond2offset(Cond c) noexcept {
+        switch (c) {
+        case Cond::LT: return 1;
+        case Cond::LE: return 2;
+        case Cond::NG: return 2;
+        case Cond::EQ: return 3;
+        case Cond::GE: return 1;
+        case Cond::NL: return 1;
+        case Cond::GT: return 2;
+        case Cond::NE: return 3;
+        case Cond::SO: return 4;
+        case Cond::UN: return 4;
+        case Cond::NS: return 4;
+        case Cond::NU: return 4;
+        default: return 0; //hopefully icc isn't stupid
+        }
+    }
+
+    uint32_t bitExt(uint32_t value, uint32_t offs, uint32_t n) {
+        uint32_t mask = (1UL << n) - 1;
+        return (value & mask) << (32 - (n + offs));
+    }
+    void emit_XO(uint32_t op, GPR const rt, GPR const ra, GPR const rb, bool oe, bool rc) {
+        base[offset++] = (op |
+            bitExt(rt.index, 6, 5)
+            | bitExt(ra.index, 11, 5)
+            | bitExt(rb.index, 16, 5)
+            | bitExt(oe, 21, 1)
+            | bitExt(rc, 31, 1)
+        );
+    }
+    void emit_D(uint32_t op, GPR const rt, GPR const ra, uint32_t d) {
+        base[offset++] = (op |
+            bitExt(rt.index, 6, 5)
+            | bitExt(ra.index, 11, 5)
+            | (d & 0xffff)
+        );
+    }
+    void emit_X(uint32_t op, GPR const rt, GPR const ra, GPR const rb, bool rc) {
+        base[offset++] = (op |
+            bitExt(rt.index, 6, 5)
+            | bitExt(ra.index, 11, 5)
+            | bitExt(rb.index, 16, 5)
+            | bitExt(rc, 31, 1)
+        );
+    }
+    void emit_XS(uint32_t op, GPR const rt, GPR const ra, uint32_t sh, bool rc) {
+        base[offset++] = (op |
+            ((rt.index & 0x1f) << 16)
+            | ((ra.index & 0x1f) << 21)
+            | ((sh & 0x1f) << 11)
+            | ((sh >> 4) & 0x02)
+            | bitExt(rc, 31, 1)
+        );
+    }
+    void emit_reloc_I(uint32_t op, Label const& l, bool lk) {
+        relocs.emplace_back(l.index, RelocInfo{ offset, RelocKind::FormI });
+        base[offset++] = (op |
+            bitExt(lk, 31, 1)
+        );
+    }
+    void emit_reloc_B(uint32_t op, uint32_t bo, uint32_t cri, Label const& l, bool lk) {
+        relocs.emplace_back(l.index, RelocInfo{ offset, RelocKind::FormB });
+        base[offset++] = (op |
+            bitExt(bo, 6, 5)
+            | bitExt(cri, 11, 5)
+            | bitExt(lk, 31, 1)
+        );
+    }
+    void emit_XL(uint32_t op, uint32_t bt, uint32_t ba, uint32_t bb, bool lk) {
+        base[offset++] = (op |
+            bitExt(bt, 6, 5)
+            | bitExt(ba, 11, 5)
+            | bitExt(bb, 16, 5)
+            | bitExt(lk, 31, 1)
+        );
+    }
+    void emit_A(uint32_t op, FPR const frt, FPR const fra, FPR const frb, FPR const frc, bool rc) {
+        base[offset++] = (op |
+            bitExt(frt.index, 6, 5)
+            | bitExt(fra.index, 11, 5)
+            | bitExt(frb.index, 16, 5)
+            | bitExt(frc.index, 21, 5)
+            | bitExt(rc, 31, 1)
+        );
+    }
+    void emit_DS(uint32_t op, GPR const rt, GPR const ra, uint32_t d) {
+        //assert(d & 0x03 == 0);
+        base[offset++] = (op |
+            bitExt(rt.index, 6, 5)
+            | bitExt(ra.index, 11, 5)
+            | bitExt(d, 16, 14)
+        );
+    }
+    void emit_M(uint32_t op, GPR const rs, GPR const ra, uint32_t sh, uint32_t mb, uint32_t me, bool rc) {
+        assert(sh <= 0x3f && mb <= 0x3f);
+        base[offset++] = (op |
+            bitExt(rs.index, 6, 5)
+            | bitExt(ra.index, 11, 5)
+            | ((sh & 0x1f) << 11)
+            | ((mb & 0x1f) << 6)
+            | ((me & 0x1f) << 1)
+            | bitExt(rc, 31, 1)
+        );
+    }
+    void emit_MD(uint32_t op, GPR const rs, GPR const ra, GPR const rb, uint32_t mb, bool rc) {
+        assert(mb <= 0x3f);
+        base[offset++] = (op |
+            bitExt(rs.index, 6, 5)
+            | bitExt(ra.index, 11, 5)
+            | bitExt(rb.index, 16, 5)
+            | ((mb & 0x1f) << 6) | (mb & 0x20)
+            | bitExt(rc, 31, 1)
+        );
+    }
+    void emit_MD(uint32_t op, GPR const rs, GPR const ra, uint32_t sh, uint32_t mb, bool rc) {
+        assert(sh <= 0x3f && mb <= 0x3f);
+        base[offset++] = (op |
+            bitExt(rs.index, 6, 5)
+            | bitExt(ra.index, 11, 5)
+            | ((mb & 0x1f) << 6) | (mb & 0x20)
+            | ((sh & 0x1f) << 11) | ((sh >> 4) & 0x02)
+            | bitExt(rc, 31, 1)
+        );
+    }
+    void emit_MDS(uint32_t op, GPR const rs, GPR const ra, GPR const rb, uint32_t mb, bool rc) {
+        base[offset++] = (op |
+            bitExt(rs.index, 6, 5)
+            | bitExt(ra.index, 11, 5)
+            | bitExt(rb.index, 16, 5)
+            | ((mb & 0x1f) << 6) | (mb & 0x20)
+            | bitExt(rc, 31, 1)
+        );
+    }
+    void emit_XFL(uint32_t op) {
+        (void)op;
+        std::abort();
+    }
+    void emit_XFX(uint32_t op, GPR const rt, uint32_t spr) {
+        base[offset++] = (op |
+            (rt.index & 0x1f) << 21
+            | ((spr & 0xff) << 12)
+        );
+    }
+    void emit_SC(uint32_t op, uint32_t lev) {
+        (void)op;
+        (void)lev;
+        std::abort();
+    }
+
+    // Extended Memmonics, hand coded :)
+    void MR(GPR const ra, GPR const rs) { OR(ra, rs, rs); }
+    void NOP() { ORI(R0, R0, 0); }
+    void NOT(GPR const ra, GPR const rs) { NOR(ra, rs, rs); }
+
+    void ROTLDI(GPR const ra, GPR const rs, uint32_t n) { RLDICL(ra, rs, n, 0); }
+    void ROTRDI(GPR const ra, GPR const rs, uint32_t n) { RLDICL(ra, rs, 64 - n, 0); }
+
+    void ROTLWI(GPR const ra, GPR const rs, uint32_t n) { RLWINM(ra, rs, n, 0, 31); }
+    void ROTRWI(GPR const ra, GPR const rs, uint32_t n) { RLWINM(ra, rs, 32 - n, 0, 31); }
+
+    void ROTLW(GPR const ra, GPR const rs, GPR const rb) { RLWNM(ra, rs, rb, 0, 31); }
+    void ROTLD(GPR const ra, GPR const rs, GPR const rb) { RLDCL(ra, rs, rb, 0); }
+
+    void EXTLDI(GPR const ra, GPR const rs, uint32_t n, uint32_t b) { RLDICR(ra, rs, b, n - 1); }
+    void SLDI(GPR const ra, GPR const rs, uint32_t n) { RLDICR(ra, rs,  n, 63 - n); }
+    void CLRLDI(GPR const ra, GPR const rs, uint32_t n) { RLDICL(ra, rs, 0, n); }
+
+    void EXTRDI(GPR const ra, GPR const rs, uint32_t n, uint32_t b) { RLDICL(ra, rs, b + n, 64 - n); }
+    void SRDI(GPR const ra, GPR const rs, uint32_t n) { RLDICL(ra, rs, 64 - n, n); }
+    void CLLDI(GPR const ra, GPR const rs, uint32_t n) { RLDICR(ra, rs, 0, n); }
+    void CLRSLDI(GPR const ra, GPR const rs, uint32_t n, uint32_t b) { RLDICR(ra, rs, n, b - n); }
+
+    void EXTLWI(GPR const ra, GPR const rs, uint32_t n, uint32_t b) { RLWINM(ra, rs, b, 0, n - 1); }
+    void SRWI(GPR const ra, GPR const rs, uint32_t n) { RLWINM(ra, rs, 32 - n, n, 31); }
+    void CLRRWI(GPR const ra, GPR const rs, uint32_t n) { RLWINM(ra, rs, 0, 0, 31 - n); }
+
+    void CRSET(CPR const bx) { CREQV(bx, bx, bx); }
+    void CRCLR(CPR const bx) { CRXOR(bx, bx, bx); }
+    void CRMOVE(CPR const bx, CPR const by) { CROR(bx, by, by); }
+    void CRNOT(CPR const bx, CPR const by) { CRNOR(bx, by, by); }
+
+    void CMPLDI(CPR const cr, GPR const rx, uint32_t v) { CMPLI(cr.index, 1, rx, v); }
+    void CMPLWI(CPR const cr, GPR const rx, uint32_t v) { CMPLI(cr.index, 0, rx, v); }
+    void CMPLD(CPR const cr, GPR const rx, GPR const ry) { CMPL(cr.index, 1, rx, ry); }
+    void CMPLW(CPR const cr, GPR const rx, GPR const ry) { CMPL(cr.index, 0, rx, ry); }
+    void CMPLDI(GPR const rx, uint32_t v) { CMPLI(0, 1, rx, v); }
+    void CMPLWI(GPR const rx, uint32_t v) { CMPLI(0, 0, rx, v); }
+    void CMPLD(GPR const rx, GPR const ry) { CMPL(0, 1, rx, ry); }
+    void CMPLW(GPR const rx, GPR const ry) { CMPL(0, 0, rx, ry); }
+
+    void CMPWI(CPR const cr, GPR const rx, uint32_t si) { CMPI(cr.index, 0, rx, si); }
+    void CMPW(CPR const cr, GPR const rx, GPR const ry) { CMP(cr.index, 0, rx, ry); }
+    void CMPDI(CPR const cr, GPR const rx, uint32_t si) { CMPI(cr.index, 1, rx, si); }
+    void CMPD(CPR const cr, GPR const rx, GPR const ry) { CMP(cr.index, 1, rx, ry); }
+    void CMPWI(GPR const rx, uint32_t si) { CMPI(0, 0, rx, si); }
+    void CMPW(GPR const rx, GPR const ry) { CMP(0, 0, rx, ry); }
+    void CMPDI(GPR const rx, uint32_t si) { CMPI(0, 1, rx, si); }
+    void CMPD(GPR const rx, GPR const ry) { CMP(0, 1, rx, ry); }
+
+    void LI(GPR const rx, uint32_t value) { ADDI(rx, R0, value); }
+    void LIS(GPR const rx, uint32_t value) { ADDIS(rx, R0, value); }
+
+    void MFLR(GPR const rt) { MFSPR(powah::GPR{8}, rt, powah::GPR{0}); }
+    void MTLR(GPR const rt) { MTSPR(powah::GPR{8}, rt, powah::GPR{0}); }
+    void BLR() { base[offset++] = 0x4e800020; } //BCLR(R0, CR0, R0);
+
+    void MFCTR(GPR const rt) { MFSPR(powah::GPR{9}, rt, powah::GPR{0}); }
+    void MTCTR(GPR const rt) { MTSPR(powah::GPR{9}, rt, powah::GPR{0}); }
+    void BCTRL() { base[offset++] = 0x4e800421; } //BCCTRL(R0, CR0, R0);
+    void BCTR() { base[offset++] = 0x4e800420; } //BCCTR(R0, CR0, R0);
+
+    // TODO: PowerPC 11 stuff
+    void ISEL(GPR const rd, GPR const ra, GPR const rb, uint32_t d) {
+        (void)rd;
+        (void)ra;
+        (void)rb;
+        (void)d;
+        std::unreachable();
+    }
+    void ISELLT(GPR const rd, GPR const ra, GPR const rb) { ISEL(rd, ra, rb, 0); }
+    void ISELGT(GPR const rd, GPR const ra, GPR const rb) { ISEL(rd, ra, rb, 1); }
+    void ISELEQ(GPR const rd, GPR const ra, GPR const rb) { ISEL(rd, ra, rb, 2); }
+
+    // Rawly pasted because fuck you
+#include "powah_gen_base.hpp"
+
+    uint32_t* base = nullptr;
+    uint32_t offset = 0;
+    uint32_t size = 0;
+};
+
+}

externals/powah/powah_gen_base.hpp

@@ -0,0 +1,487 @@
+// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project
+// SPDX-License-Identifier: GPL-3.0-or-later
+
+// this file is autogenerated DO NOT MODIFY
+#pragma once
+void ADD(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c000214, rt, ra, rb, false, false); }
+void ADDO(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c000214, rt, ra, rb, true, false); }
+void ADD_(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c000214, rt, ra, rb, false, true); }
+void ADDO_(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c000214, rt, ra, rb, true, true); }
+void ADDC(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c000014, rt, ra, rb, false, false); }
+void ADDCO(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c000014, rt, ra, rb, true, false); }
+void ADDC_(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c000014, rt, ra, rb, false, true); }
+void ADDCO_(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c000014, rt, ra, rb, true, true); }
+void ADDE(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c000114, rt, ra, rb, false, false); }
+void ADDEO(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c000114, rt, ra, rb, true, false); }
+void ADDE_(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c000114, rt, ra, rb, false, true); }
+void ADDEO_(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c000114, rt, ra, rb, true, true); }
+void ADDI(GPR const rt, GPR const ra, uint32_t d) { emit_D(0x38000000, rt, ra, d); }
+void ADDIC(GPR const rt, GPR const ra, uint32_t d) { emit_D(0x30000000, rt, ra, d); }
+void ADDIC_(GPR const rt, GPR const ra, uint32_t d) { emit_D(0x34000000, rt, ra, d); }
+void ADDIS(GPR const rt, GPR const ra, uint32_t d) { emit_D(0x3c000000, rt, ra, d); }
+void ADDME(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c0001d4, rt, ra, rb, false, false); }
+void ADDMEO(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c0001d4, rt, ra, rb, true, false); }
+void ADDME_(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c0001d4, rt, ra, rb, false, true); }
+void ADDMEO_(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c0001d4, rt, ra, rb, true, true); }
+void ADDZE(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c000194, rt, ra, rb, false, false); }
+void ADDZEO(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c000194, rt, ra, rb, true, false); }
+void ADDZE_(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c000194, rt, ra, rb, false, true); }
+void ADDZEO_(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c000194, rt, ra, rb, true, true); }
+void AND(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c000038, ra, rt, rb, false); }
+void AND_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c000038, ra, rt, rb, true); }
+void ANDC(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c000078, ra, rt, rb, false); }
+void ANDC_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c000078, ra, rt, rb, true); }
+void ANDI_(GPR const rt, GPR const ra, uint32_t d) { emit_D(0x70000000, ra, rt, d); }
+void ANDIS_(GPR const rt, GPR const ra, uint32_t d) { emit_D(0x74000000, ra, rt, d); }
+void B(Label const& i) { emit_reloc_I(0x48000000, i, false); }
+void BL(Label const& i) { emit_reloc_I(0x48000000, i, true); }
+void BC(CPR const cr, Label const& i) { emit_reloc_B(0x40000000, 0, cr.index + 0, i, false); }
+void BCL(CPR const cr, Label const& i) { emit_reloc_B(0x40000000, 0, cr.index + 0, i, true); }
+void BLT(CPR const cr, Label const& i) { emit_reloc_B(0x40000000, 12, cr.index + 0, i, false); }
+void BLTL(CPR const cr, Label const& i) { emit_reloc_B(0x40000000, 12, cr.index + 0, i, true); }
+void BLE(CPR const cr, Label const& i) { emit_reloc_B(0x40000000, 4, cr.index + 1, i, false); }
+void BLEL(CPR const cr, Label const& i) { emit_reloc_B(0x40000000, 4, cr.index + 1, i, true); }
+void BNG(CPR const cr, Label const& i) { emit_reloc_B(0x40000000, 4, cr.index + 1, i, false); }
+void BNGL(CPR const cr, Label const& i) { emit_reloc_B(0x40000000, 4, cr.index + 1, i, true); }
+void BEQ(CPR const cr, Label const& i) { emit_reloc_B(0x40000000, 12, cr.index + 2, i, false); }
+void BEQL(CPR const cr, Label const& i) { emit_reloc_B(0x40000000, 12, cr.index + 2, i, true); }
+void BGE(CPR const cr, Label const& i) { emit_reloc_B(0x40000000, 4, cr.index + 0, i, false); }
+void BGEL(CPR const cr, Label const& i) { emit_reloc_B(0x40000000, 4, cr.index + 0, i, true); }
+void BNL(CPR const cr, Label const& i) { emit_reloc_B(0x40000000, 4, cr.index + 0, i, false); }
+void BNLL(CPR const cr, Label const& i) { emit_reloc_B(0x40000000, 4, cr.index + 0, i, true); }
+void BGT(CPR const cr, Label const& i) { emit_reloc_B(0x40000000, 12, cr.index + 1, i, false); }
+void BGTL(CPR const cr, Label const& i) { emit_reloc_B(0x40000000, 12, cr.index + 1, i, true); }
+void BNE(CPR const cr, Label const& i) { emit_reloc_B(0x40000000, 4, cr.index + 2, i, false); }
+void BNEL(CPR const cr, Label const& i) { emit_reloc_B(0x40000000, 4, cr.index + 2, i, true); }
+void BSO(CPR const cr, Label const& i) { emit_reloc_B(0x40000000, 12, cr.index + 3, i, false); }
+void BSOL(CPR const cr, Label const& i) { emit_reloc_B(0x40000000, 12, cr.index + 3, i, true); }
+void BUN(CPR const cr, Label const& i) { emit_reloc_B(0x40000000, 12, cr.index + 3, i, false); }
+void BUNL(CPR const cr, Label const& i) { emit_reloc_B(0x40000000, 12, cr.index + 3, i, true); }
+void BNS(CPR const cr, Label const& i) { emit_reloc_B(0x40000000, 4, cr.index + 3, i, false); }
+void BNSL(CPR const cr, Label const& i) { emit_reloc_B(0x40000000, 4, cr.index + 3, i, true); }
+void BCCTR(GPR const bt, CPR const ba, GPR const bb) { emit_XL(0x4c000420, bt.index, ba.index, bb.index, false); }
+void BCCTRL(GPR const bt, CPR const ba, GPR const bb) { emit_XL(0x4c000420, bt.index, ba.index, bb.index, true); }
+void BCCTR(GPR const bt, Cond const ba, GPR const bb) { emit_XL(0x4c000420, bt.index, cond2offset(ba), bb.index, false); }
+void BCCTRL(GPR const bt, Cond const ba, GPR const bb) { emit_XL(0x4c000420, bt.index, cond2offset(ba), bb.index, true); }
+void BCLR(GPR const bt, CPR const ba, GPR const bb) { emit_XL(0x4c000020, bt.index, ba.index, bb.index, false); }
+void BCLRL(GPR const bt, CPR const ba, GPR const bb) { emit_XL(0x4c000020, bt.index, ba.index, bb.index, true); }
+void BLTLR(CPR const cr) { emit_XL(0x4c000020, 12, cr.index + 0, 0, false); }
+void BLTLRL(CPR const cr) { emit_XL(0x4c000020, 12, cr.index + 0, 0, true); }
+void BLELR(CPR const cr) { emit_XL(0x4c000020, 4, cr.index + 1, 0, false); }
+void BLELRL(CPR const cr) { emit_XL(0x4c000020, 4, cr.index + 1, 0, true); }
+void BNGLR(CPR const cr) { emit_XL(0x4c000020, 4, cr.index + 1, 0, false); }
+void BNGLRL(CPR const cr) { emit_XL(0x4c000020, 4, cr.index + 1, 0, true); }
+void BEQLR(CPR const cr) { emit_XL(0x4c000020, 12, cr.index + 2, 0, false); }
+void BEQLRL(CPR const cr) { emit_XL(0x4c000020, 12, cr.index + 2, 0, true); }
+void BGELR(CPR const cr) { emit_XL(0x4c000020, 4, cr.index + 0, 0, false); }
+void BGELRL(CPR const cr) { emit_XL(0x4c000020, 4, cr.index + 0, 0, true); }
+void BNLLR(CPR const cr) { emit_XL(0x4c000020, 4, cr.index + 0, 0, false); }
+void BNLLRL(CPR const cr) { emit_XL(0x4c000020, 4, cr.index + 0, 0, true); }
+void BGTLR(CPR const cr) { emit_XL(0x4c000020, 12, cr.index + 1, 0, false); }
+void BGTLRL(CPR const cr) { emit_XL(0x4c000020, 12, cr.index + 1, 0, true); }
+void BNELR(CPR const cr) { emit_XL(0x4c000020, 4, cr.index + 2, 0, false); }
+void BNELRL(CPR const cr) { emit_XL(0x4c000020, 4, cr.index + 2, 0, true); }
+void BSOLR(CPR const cr) { emit_XL(0x4c000020, 12, cr.index + 3, 0, false); }
+void BSOLRL(CPR const cr) { emit_XL(0x4c000020, 12, cr.index + 3, 0, true); }
+void BUNLR(CPR const cr) { emit_XL(0x4c000020, 12, cr.index + 3, 0, false); }
+void BUNLRL(CPR const cr) { emit_XL(0x4c000020, 12, cr.index + 3, 0, true); }
+void BNSLR(CPR const cr) { emit_XL(0x4c000020, 4, cr.index + 3, 0, false); }
+void BNSLRL(CPR const cr) { emit_XL(0x4c000020, 4, cr.index + 3, 0, true); }
+void CMP(uint32_t bf, uint32_t l, GPR const ra, GPR const rb) { emit_X(0x7c000000, GPR{(bf << 2) | l}, ra, rb, false); }
+void CMPI(uint32_t bf, uint32_t l, GPR const ra, uint32_t d) { emit_D(0x2c000000, GPR{(bf << 2) | l}, ra, d); }
+void CMPL(uint32_t bf, uint32_t l, GPR const ra, GPR const rb) { emit_X(0x7c000040, GPR{(bf << 2) | l}, ra, rb, false); }
+void CMPLI(uint32_t bf, uint32_t l, GPR const ra, uint32_t d) { emit_D(0x28000000, GPR{(bf << 2) | l}, ra, d); }
+void CNTLZD(GPR const rt, GPR const ra) { emit_X(0x7c000074, ra, rt, R0, false); }
+void CNTLZD_(GPR const rt, GPR const ra) { emit_X(0x7c000074, ra, rt, R0, true); }
+void CNTLZW(GPR const rt, GPR const ra) { emit_X(0x7c000034, ra, rt, R0, false); }
+void CNTLZW_(GPR const rt, GPR const ra) { emit_X(0x7c000034, ra, rt, R0, true); }
+void CRAND(CPR const bt, CPR const ba, CPR const bb) { emit_XL(0x4c000202, bt.index, ba.index, bb.index, false); }
+void CRANDL(CPR const bt, CPR const ba, CPR const bb) { emit_XL(0x4c000202, bt.index, ba.index, bb.index, true); }
+void CRANDC(CPR const bt, CPR const ba, CPR const bb) { emit_XL(0x4c000102, bt.index, ba.index, bb.index, false); }
+void CRANDCL(CPR const bt, CPR const ba, CPR const bb) { emit_XL(0x4c000102, bt.index, ba.index, bb.index, true); }
+void CREQV(CPR const bt, CPR const ba, CPR const bb) { emit_XL(0x4c000242, bt.index, ba.index, bb.index, false); }
+void CREQVL(CPR const bt, CPR const ba, CPR const bb) { emit_XL(0x4c000242, bt.index, ba.index, bb.index, true); }
+void CRNAND(CPR const bt, CPR const ba, CPR const bb) { emit_XL(0x4c0001c2, bt.index, ba.index, bb.index, false); }
+void CRNANDL(CPR const bt, CPR const ba, CPR const bb) { emit_XL(0x4c0001c2, bt.index, ba.index, bb.index, true); }
+void CRNOR(CPR const bt, CPR const ba, CPR const bb) { emit_XL(0x4c000042, bt.index, ba.index, bb.index, false); }
+void CRNORL(CPR const bt, CPR const ba, CPR const bb) { emit_XL(0x4c000042, bt.index, ba.index, bb.index, true); }
+void CROR(CPR const bt, CPR const ba, CPR const bb) { emit_XL(0x4c000382, bt.index, ba.index, bb.index, false); }
+void CRORL(CPR const bt, CPR const ba, CPR const bb) { emit_XL(0x4c000382, bt.index, ba.index, bb.index, true); }
+void CRORC(CPR const bt, CPR const ba, CPR const bb) { emit_XL(0x4c000342, bt.index, ba.index, bb.index, false); }
+void CRORCL(CPR const bt, CPR const ba, CPR const bb) { emit_XL(0x4c000342, bt.index, ba.index, bb.index, true); }
+void CRXOR(CPR const bt, CPR const ba, CPR const bb) { emit_XL(0x4c000182, bt.index, ba.index, bb.index, false); }
+void CRXORL(CPR const bt, CPR const ba, CPR const bb) { emit_XL(0x4c000182, bt.index, ba.index, bb.index, true); }
+void DCBF(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c0000ac, ra, rt, rb, false); }
+void DCBF_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c0000ac, ra, rt, rb, true); }
+void DCBI(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c0003ac, ra, rt, rb, false); }
+void DCBI_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c0003ac, ra, rt, rb, true); }
+void DCBST(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c00006c, ra, rt, rb, false); }
+void DCBST_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c00006c, ra, rt, rb, true); }
+void DCBT(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c00022c, ra, rt, rb, false); }
+void DCBT_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c00022c, ra, rt, rb, true); }
+void DCBTST(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c0001ec, ra, rt, rb, false); }
+void DCBTST_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c0001ec, ra, rt, rb, true); }
+void DCBZ(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c0007ec, ra, rt, rb, false); }
+void DCBZ_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c0007ec, ra, rt, rb, true); }
+void DIVD(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c0003d2, rt, ra, rb, false, false); }
+void DIVDO(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c0003d2, rt, ra, rb, true, false); }
+void DIVD_(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c0003d2, rt, ra, rb, false, true); }
+void DIVDO_(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c0003d2, rt, ra, rb, true, true); }
+void DIVDU(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c000392, rt, ra, rb, false, false); }
+void DIVDUO(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c000392, rt, ra, rb, true, false); }
+void DIVDU_(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c000392, rt, ra, rb, false, true); }
+void DIVDUO_(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c000392, rt, ra, rb, true, true); }
+void DIVW(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c0003d6, rt, ra, rb, false, false); }
+void DIVWO(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c0003d6, rt, ra, rb, true, false); }
+void DIVW_(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c0003d6, rt, ra, rb, false, true); }
+void DIVWO_(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c0003d6, rt, ra, rb, true, true); }
+void DIVWU(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c000396, rt, ra, rb, false, false); }
+void DIVWUO(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c000396, rt, ra, rb, true, false); }
+void DIVWU_(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c000396, rt, ra, rb, false, true); }
+void DIVWUO_(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c000396, rt, ra, rb, true, true); }
+void ECIWX(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c00026c, ra, rt, rb, false); }
+void ECIWX_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c00026c, ra, rt, rb, true); }
+void ECOWX(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c00036c, ra, rt, rb, false); }
+void ECOWX_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c00036c, ra, rt, rb, true); }
+void EIEIO(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c0006ac, ra, rt, rb, false); }
+void EIEIO_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c0006ac, ra, rt, rb, true); }
+void EQV(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c000238, ra, rt, rb, false); }
+void EQV_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c000238, ra, rt, rb, true); }
+void EXTSB(GPR const rt, GPR const ra) { emit_X(0x7c000774, ra, rt, R0, false); }
+void EXTSB_(GPR const rt, GPR const ra) { emit_X(0x7c000774, ra, rt, R0, true); }
+void EXTSH(GPR const rt, GPR const ra) { emit_XO(0x7c000734, rt, ra, R0, false, false); }
+void EXTSHC(GPR const rt, GPR const ra) { emit_XO(0x7c000734, rt, ra, R0, true, false); }
+void EXTSH_(GPR const rt, GPR const ra) { emit_XO(0x7c000734, rt, ra, R0, false, true); }
+void EXTSHC_(GPR const rt, GPR const ra) { emit_XO(0x7c000734, rt, ra, R0, true, true); }
+void EXTSW(GPR const rt, GPR const ra) { emit_X(0x7c0007b4, ra, rt, R0, false); }
+void EXTSW_(GPR const rt, GPR const ra) { emit_X(0x7c0007b4, ra, rt, R0, true); }
+void FABS(GPR const rt, GPR const ra, GPR const rb) { emit_X(0xfc000210, ra, rt, rb, false); }
+void FABS_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0xfc000210, ra, rt, rb, true); }
+void FADD(FPR const frt, FPR const fra, FPR const frb, FPR const frc) { emit_A(0xfc00002a, frt, fra, frb, frc, false); }
+void FADD_(FPR const frt, FPR const fra, FPR const frb, FPR const frc) { emit_A(0xfc00002a, frt, fra, frb, frc, true); }
+void FADDS(FPR const frt, FPR const fra, FPR const frb, FPR const frc) { emit_A(0xec00002a, frt, fra, frb, frc, false); }
+void FADDS_(FPR const frt, FPR const fra, FPR const frb, FPR const frc) { emit_A(0xec00002a, frt, fra, frb, frc, true); }
+void FCFID(GPR const rt, GPR const ra, GPR const rb) { emit_X(0xfc00069c, ra, rt, rb, false); }
+void FCFID_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0xfc00069c, ra, rt, rb, true); }
+void FCMPO(GPR const rt, GPR const ra, GPR const rb) { emit_X(0xfc000040, ra, rt, rb, false); }
+void FCMPO_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0xfc000040, ra, rt, rb, true); }
+void FCMPU(CPR const bt, CPR const ba, CPR const bb) { emit_XL(0xfc000000, bt.index, ba.index, bb.index, false); }
+void FCMPUL(CPR const bt, CPR const ba, CPR const bb) { emit_XL(0xfc000000, bt.index, ba.index, bb.index, true); }
+void FCTID(GPR const rt, GPR const ra, GPR const rb) { emit_X(0xfc00065c, ra, rt, rb, false); }
+void FCTID_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0xfc00065c, ra, rt, rb, true); }
+void FCTIDZ(GPR const rt, GPR const ra, GPR const rb) { emit_X(0xfc00065e, ra, rt, rb, false); }
+void FCTIDZ_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0xfc00065e, ra, rt, rb, true); }
+void FCTIW(GPR const rt, GPR const ra, GPR const rb) { emit_X(0xfc00001c, ra, rt, rb, false); }
+void FCTIW_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0xfc00001c, ra, rt, rb, true); }
+void FCTIWZ(CPR const bt, CPR const ba, CPR const bb) { emit_XL(0xfc00001e, bt.index, ba.index, bb.index, false); }
+void FCTIWZL(CPR const bt, CPR const ba, CPR const bb) { emit_XL(0xfc00001e, bt.index, ba.index, bb.index, true); }
+void FDIV(FPR const frt, FPR const fra, FPR const frb, FPR const frc) { emit_A(0xfc000024, frt, fra, frb, frc, false); }
+void FDIV_(FPR const frt, FPR const fra, FPR const frb, FPR const frc) { emit_A(0xfc000024, frt, fra, frb, frc, true); }
+void FDIVS(FPR const frt, FPR const fra, FPR const frb, FPR const frc) { emit_A(0xec000024, frt, fra, frb, frc, false); }
+void FDIVS_(FPR const frt, FPR const fra, FPR const frb, FPR const frc) { emit_A(0xec000024, frt, fra, frb, frc, true); }
+void FMADD(FPR const frt, FPR const fra, FPR const frb, FPR const frc) { emit_A(0xfc00003a, frt, fra, frb, frc, false); }
+void FMADD_(FPR const frt, FPR const fra, FPR const frb, FPR const frc) { emit_A(0xfc00003a, frt, fra, frb, frc, true); }
+void FMADDS(FPR const frt, FPR const fra, FPR const frb, FPR const frc) { emit_A(0xec00003a, frt, fra, frb, frc, false); }
+void FMADDS_(FPR const frt, FPR const fra, FPR const frb, FPR const frc) { emit_A(0xec00003a, frt, fra, frb, frc, true); }
+void FMR(GPR const rt, GPR const ra, GPR const rb) { emit_X(0xfc000090, ra, rt, rb, false); }
+void FMR_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0xfc000090, ra, rt, rb, true); }
+void FMSUB(FPR const frt, FPR const fra, FPR const frb, FPR const frc) { emit_A(0xfc000038, frt, fra, frb, frc, false); }
+void FMSUB_(FPR const frt, FPR const fra, FPR const frb, FPR const frc) { emit_A(0xfc000038, frt, fra, frb, frc, true); }
+void FMSUBS(FPR const frt, FPR const fra, FPR const frb, FPR const frc) { emit_A(0xec000038, frt, fra, frb, frc, false); }
+void FMSUBS_(FPR const frt, FPR const fra, FPR const frb, FPR const frc) { emit_A(0xec000038, frt, fra, frb, frc, true); }
+void FMUL(FPR const frt, FPR const fra, FPR const frb, FPR const frc) { emit_A(0xfc000032, frt, fra, frb, frc, false); }
+void FMUL_(FPR const frt, FPR const fra, FPR const frb, FPR const frc) { emit_A(0xfc000032, frt, fra, frb, frc, true); }
+void FMULS(FPR const frt, FPR const fra, FPR const frb, FPR const frc) { emit_A(0xec000032, frt, fra, frb, frc, false); }
+void FMULS_(FPR const frt, FPR const fra, FPR const frb, FPR const frc) { emit_A(0xec000032, frt, fra, frb, frc, true); }
+void FNABS(GPR const rt, GPR const ra, GPR const rb) { emit_X(0xfc000110, ra, rt, rb, false); }
+void FNABS_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0xfc000110, ra, rt, rb, true); }
+void FNEG(GPR const rt, GPR const ra, GPR const rb) { emit_X(0xfc000050, ra, rt, rb, false); }
+void FNEG_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0xfc000050, ra, rt, rb, true); }
+void FNMADD(FPR const frt, FPR const fra, FPR const frb, FPR const frc) { emit_A(0xfc00003e, frt, fra, frb, frc, false); }
+void FNMADD_(FPR const frt, FPR const fra, FPR const frb, FPR const frc) { emit_A(0xfc00003e, frt, fra, frb, frc, true); }
+void FNMADDS(FPR const frt, FPR const fra, FPR const frb, FPR const frc) { emit_A(0xec00003e, frt, fra, frb, frc, false); }
+void FNMADDS_(FPR const frt, FPR const fra, FPR const frb, FPR const frc) { emit_A(0xec00003e, frt, fra, frb, frc, true); }
+void FNMSUB(FPR const frt, FPR const fra, FPR const frb, FPR const frc) { emit_A(0xfc00003c, frt, fra, frb, frc, false); }
+void FNMSUB_(FPR const frt, FPR const fra, FPR const frb, FPR const frc) { emit_A(0xfc00003c, frt, fra, frb, frc, true); }
+void FNMSUBS(FPR const frt, FPR const fra, FPR const frb, FPR const frc) { emit_A(0xec00003c, frt, fra, frb, frc, false); }
+void FNMSUBS_(FPR const frt, FPR const fra, FPR const frb, FPR const frc) { emit_A(0xec00003c, frt, fra, frb, frc, true); }
+void FRES(FPR const frt, FPR const fra, FPR const frb, FPR const frc) { emit_A(0xec000030, frt, fra, frb, frc, false); }
+void FRES_(FPR const frt, FPR const fra, FPR const frb, FPR const frc) { emit_A(0xec000030, frt, fra, frb, frc, true); }
+void FRSP(GPR const rt, GPR const ra, GPR const rb) { emit_X(0xfc000018, ra, rt, rb, false); }
+void FRSP_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0xfc000018, ra, rt, rb, true); }
+void FRSQRTE(FPR const frt, FPR const fra, FPR const frb, FPR const frc) { emit_A(0xfc000034, frt, fra, frb, frc, false); }
+void FRSQRTE_(FPR const frt, FPR const fra, FPR const frb, FPR const frc) { emit_A(0xfc000034, frt, fra, frb, frc, true); }
+void FSEL(FPR const frt, FPR const fra, FPR const frb, FPR const frc) { emit_A(0xfc00002e, frt, fra, frb, frc, false); }
+void FSEL_(FPR const frt, FPR const fra, FPR const frb, FPR const frc) { emit_A(0xfc00002e, frt, fra, frb, frc, true); }
+void FSUB(FPR const frt, FPR const fra, FPR const frb, FPR const frc) { emit_A(0xfc000028, frt, fra, frb, frc, false); }
+void FSUB_(FPR const frt, FPR const fra, FPR const frb, FPR const frc) { emit_A(0xfc000028, frt, fra, frb, frc, true); }
+void FSUBS(FPR const frt, FPR const fra, FPR const frb, FPR const frc) { emit_A(0xec000028, frt, fra, frb, frc, false); }
+void FSUBS_(FPR const frt, FPR const fra, FPR const frb, FPR const frc) { emit_A(0xec000028, frt, fra, frb, frc, true); }
+void ICBI(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c0007ac, ra, rt, rb, false); }
+void ICBI_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c0007ac, ra, rt, rb, true); }
+void ISYNC(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x4c00012c, ra, rt, rb, false); }
+void ISYNC_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x4c00012c, ra, rt, rb, true); }
+void LBZ(GPR const rt, GPR const ra, uint32_t d) { emit_D(0x88000000, rt, ra, d); }
+void LBZU(GPR const rt, GPR const ra, uint32_t d) { emit_D(0x8c000000, rt, ra, d); }
+void LBZUX(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c0000ee, ra, rt, rb, false); }
+void LBZUX_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c0000ee, ra, rt, rb, true); }
+void LBZX(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c0000ae, ra, rt, rb, false); }
+void LBZX_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c0000ae, ra, rt, rb, true); }
+void LD(GPR const rt, GPR const ra, uint32_t d) { emit_DS(0xe8000000, rt, ra, d >> 2); }
+void LDARX(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c0000a8, ra, rt, rb, false); }
+void LDARX_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c0000a8, ra, rt, rb, true); }
+void LDU(GPR const rt, GPR const ra, uint32_t d) { emit_DS(0xe8000001, rt, ra, d >> 2); }
+void LDUX(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c00006a, ra, rt, rb, false); }
+void LDUX_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c00006a, ra, rt, rb, true); }
+void LDX(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c00002a, ra, rt, rb, false); }
+void LDX_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c00002a, ra, rt, rb, true); }
+void LFD(GPR const rt, GPR const ra, uint32_t d) { emit_D(0xc8000000, rt, ra, d); }
+void LFDU(GPR const rt, GPR const ra, uint32_t d) { emit_D(0xcc000000, rt, ra, d); }
+void LFDUX(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c0004ee, ra, rt, rb, false); }
+void LFDUX_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c0004ee, ra, rt, rb, true); }
+void LFDX(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c0004ae, ra, rt, rb, false); }
+void LFDX_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c0004ae, ra, rt, rb, true); }
+void LFS(GPR const rt, GPR const ra, uint32_t d) { emit_D(0xc0000000, rt, ra, d); }
+void LFSU(GPR const rt, GPR const ra, uint32_t d) { emit_D(0xc4000000, rt, ra, d); }
+void LFSUX(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c00046e, ra, rt, rb, false); }
+void LFSUX_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c00046e, ra, rt, rb, true); }
+void LFSX(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c00042e, ra, rt, rb, false); }
+void LFSX_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c00042e, ra, rt, rb, true); }
+void LHA(GPR const rt, GPR const ra, uint32_t d) { emit_D(0xa8000000, rt, ra, d); }
+void LHAU(GPR const rt, GPR const ra, uint32_t d) { emit_D(0xac000000, rt, ra, d); }
+void LHAUX(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c0002ee, ra, rt, rb, false); }
+void LHAUX_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c0002ee, ra, rt, rb, true); }
+void LHAX(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c0002ae, ra, rt, rb, false); }
+void LHAX_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c0002ae, ra, rt, rb, true); }
+void LHBRX(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c00062c, ra, rt, rb, false); }
+void LHBRX_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c00062c, ra, rt, rb, true); }
+void LHZ(GPR const rt, GPR const ra, uint32_t d) { emit_D(0xa0000000, rt, ra, d); }
+void LHZU(GPR const rt, GPR const ra, uint32_t d) { emit_D(0xa4000000, rt, ra, d); }
+void LHZUX(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c000296, ra, rt, rb, false); }
+void LHZUX_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c000296, ra, rt, rb, true); }
+void LHZX(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c00022e, ra, rt, rb, false); }
+void LHZX_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c00022e, ra, rt, rb, true); }
+void LMW(GPR const rt, GPR const ra, uint32_t d) { emit_D(0xb8000000, rt, ra, d); }
+void LSWI(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c0004aa, ra, rt, rb, false); }
+void LSWI_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c0004aa, ra, rt, rb, true); }
+void LSWX(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c00042a, ra, rt, rb, false); }
+void LSWX_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c00042a, ra, rt, rb, true); }
+void LWA(GPR const rt, GPR const ra, uint32_t d) { emit_DS(0xe8000002, rt, ra, d >> 2); }
+void LWARX(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c000028, ra, rt, rb, false); }
+void LWARX_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c000028, ra, rt, rb, true); }
+void LWAUX(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c0002ea, ra, rt, rb, false); }
+void LWAUX_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c0002ea, ra, rt, rb, true); }
+void LWAX(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c0002aa, ra, rt, rb, false); }
+void LWAX_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c0002aa, ra, rt, rb, true); }
+void LWBRX(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c00042c, ra, rt, rb, false); }
+void LWBRX_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c00042c, ra, rt, rb, true); }
+void LWZ(GPR const rt, GPR const ra, uint32_t d) { emit_D(0x80000000, rt, ra, d); }
+void LWZU(GPR const rt, GPR const ra, uint32_t d) { emit_D(0x84000000, rt, ra, d); }
+void LWZUX(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c00006e, ra, rt, rb, false); }
+void LWZUX_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c00006e, ra, rt, rb, true); }
+void LWZX(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c00002e, ra, rt, rb, false); }
+void LWZX_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c00002e, ra, rt, rb, true); }
+void MCRF(CPR const bt, CPR const ba, CPR const bb) { emit_XL(0x4c000000, bt.index, ba.index, bb.index, false); }
+void MCRFL(CPR const bt, CPR const ba, CPR const bb) { emit_XL(0x4c000000, bt.index, ba.index, bb.index, true); }
+void MCRFS(GPR const rt, GPR const ra, GPR const rb) { emit_X(0xfc000080, ra, rt, rb, false); }
+void MCRFS_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0xfc000080, ra, rt, rb, true); }
+void MCRXR(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c000400, ra, rt, rb, false); }
+void MCRXR_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c000400, ra, rt, rb, true); }
+void MFCR(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c000026, ra, rt, rb, false); }
+void MFCR_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c000026, ra, rt, rb, true); }
+void MFFS(GPR const rt, GPR const ra, GPR const rb) { emit_X(0xfc00048e, ra, rt, rb, false); }
+void MFFS_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0xfc00048e, ra, rt, rb, true); }
+void MFMSR(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c0000a6, ra, rt, rb, false); }
+void MFMSR_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c0000a6, ra, rt, rb, true); }
+void MFSPR(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c0002a6, ra, rt, rb, false); }
+void MFSPR_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c0002a6, ra, rt, rb, true); }
+void MFSR(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c0004a6, ra, rt, rb, false); }
+void MFSR_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c0004a6, ra, rt, rb, true); }
+void MFSRIN(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c000526, ra, rt, rb, false); }
+void MFSRIN_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c000526, ra, rt, rb, true); }
+void MTCRF(GPR const rt, uint32_t spr) { emit_XFX(0x7c000120, rt, spr); }
+void MTFSB0(GPR const rt, GPR const ra, GPR const rb) { emit_X(0xfc00008c, ra, rt, rb, false); }
+void MTFSB0_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0xfc00008c, ra, rt, rb, true); }
+void MTFSB1(GPR const rt, GPR const ra, GPR const rb) { emit_X(0xfc00004c, ra, rt, rb, false); }
+void MTFSB1_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0xfc00004c, ra, rt, rb, true); }
+void MTFSF() { emit_XFL(0xfc00058e); }
+void MTFSFI(GPR const rt, GPR const ra, GPR const rb) { emit_X(0xfc00010c, ra, rt, rb, false); }
+void MTFSFI_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0xfc00010c, ra, rt, rb, true); }
+void MTMSR(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c000124, ra, rt, rb, false); }
+void MTMSR_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c000124, ra, rt, rb, true); }
+void MTSPR(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c0003a6, ra, rt, rb, false); }
+void MTSPR_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c0003a6, ra, rt, rb, true); }
+void MTSR(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c0001a4, ra, rt, rb, false); }
+void MTSR_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c0001a4, ra, rt, rb, true); }
+void MTSRIN(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c0001e4, ra, rt, rb, false); }
+void MTSRIN_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c0001e4, ra, rt, rb, true); }
+void MULHD(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c000092, rt, ra, rb, false, false); }
+void MULHDO(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c000092, rt, ra, rb, true, false); }
+void MULHD_(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c000092, rt, ra, rb, false, true); }
+void MULHDO_(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c000092, rt, ra, rb, true, true); }
+void MULHDU(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c000012, rt, ra, rb, false, false); }
+void MULHDUO(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c000012, rt, ra, rb, true, false); }
+void MULHDU_(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c000012, rt, ra, rb, false, true); }
+void MULHDUO_(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c000012, rt, ra, rb, true, true); }
+void MULHW(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c000096, rt, ra, rb, false, false); }
+void MULHWO(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c000096, rt, ra, rb, true, false); }
+void MULHW_(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c000096, rt, ra, rb, false, true); }
+void MULHWO_(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c000096, rt, ra, rb, true, true); }
+void MULHWU(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c000016, rt, ra, rb, false, false); }
+void MULHWUO(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c000016, rt, ra, rb, true, false); }
+void MULHWU_(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c000016, rt, ra, rb, false, true); }
+void MULHWUO_(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c000016, rt, ra, rb, true, true); }
+void MULLD(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c0001d2, rt, ra, rb, false, false); }
+void MULLDO(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c0001d2, rt, ra, rb, true, false); }
+void MULLD_(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c0001d2, rt, ra, rb, false, true); }
+void MULLDO_(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c0001d2, rt, ra, rb, true, true); }
+void MULLI(GPR const rt, GPR const ra, uint32_t d) { emit_D(0x1c000000, rt, ra, d); }
+void MULLW(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c0001d6, rt, ra, rb, false, false); }
+void MULLWO(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c0001d6, rt, ra, rb, true, false); }
+void MULLW_(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c0001d6, rt, ra, rb, false, true); }
+void MULLWO_(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c0001d6, rt, ra, rb, true, true); }
+void NAND(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c0003b8, ra, rt, rb, false); }
+void NAND_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c0003b8, ra, rt, rb, true); }
+void NEG(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c0000d0, rt, ra, rb, false, false); }
+void NEGO(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c0000d0, rt, ra, rb, true, false); }
+void NEG_(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c0000d0, rt, ra, rb, false, true); }
+void NEGO_(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c0000d0, rt, ra, rb, true, true); }
+void NOR(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c0000f8, ra, rt, rb, false); }
+void NOR_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c0000f8, ra, rt, rb, true); }
+void OR(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c000378, ra, rt, rb, false); }
+void OR_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c000378, ra, rt, rb, true); }
+void ORC(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c000338, ra, rt, rb, false); }
+void ORC_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c000338, ra, rt, rb, true); }
+void ORI(GPR const rt, GPR const ra, uint32_t d) { emit_D(0x60000000, ra, rt, d); }
+void ORIS(GPR const rt, GPR const ra, uint32_t d) { emit_D(0x64000000, ra, rt, d); }
+void RFI(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x4c000064, ra, rt, rb, false); }
+void RFI_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x4c000064, ra, rt, rb, true); }
+void RLDCL(GPR const rs, GPR const ra, GPR const rb, uint32_t mb) { emit_MDS(0x78000010, ra, rs, rb, mb, false); }
+void RLDCL_(GPR const rs, GPR const ra, GPR const rb, uint32_t mb) { emit_MDS(0x78000010, ra, rs, rb, mb, true); }
+void RLDCR(GPR const rs, GPR const ra, GPR const rb, uint32_t mb) { emit_MDS(0x78000012, ra, rs, rb, mb, false); }
+void RLDCR_(GPR const rs, GPR const ra, GPR const rb, uint32_t mb) { emit_MDS(0x78000012, ra, rs, rb, mb, true); }
+void RLDIC(GPR const rs, GPR const ra, uint32_t mb, uint32_t sh) { emit_MD(0x78000008, ra, rs, mb, sh, false); }
+void RLDIC_(GPR const rs, GPR const ra, uint32_t mb, uint32_t sh) { emit_MD(0x78000008, ra, rs, mb, sh, true); }
+void RLDICL(GPR const rs, GPR const ra, uint32_t mb, uint32_t sh) { emit_MD(0x78000000, ra, rs, mb, sh, false); }
+void RLDICL_(GPR const rs, GPR const ra, uint32_t mb, uint32_t sh) { emit_MD(0x78000000, ra, rs, mb, sh, true); }
+void RLDICR(GPR const rs, GPR const ra, uint32_t mb, uint32_t sh) { emit_MD(0x78000004, ra, rs, mb, sh, false); }
+void RLDICR_(GPR const rs, GPR const ra, uint32_t mb, uint32_t sh) { emit_MD(0x78000004, ra, rs, mb, sh, true); }
+void RLDIMI(GPR const rs, GPR const ra, uint32_t mb, uint32_t sh) { emit_MD(0x7800000c, ra, rs, mb, sh, false); }
+void RLDIMI_(GPR const rs, GPR const ra, uint32_t mb, uint32_t sh) { emit_MD(0x7800000c, ra, rs, mb, sh, true); }
+void RLWIMI(GPR const rs, GPR const ra, uint32_t sh, uint32_t mb, uint32_t me = 0) { emit_M(0x50000000, ra, rs, sh, mb, me, false); }
+void RLWIMI_(GPR const rs, GPR const ra, uint32_t sh, uint32_t mb, uint32_t me = 0) { emit_M(0x50000000, ra, rs, sh, mb, me, true); }
+void RLWINM(GPR const rs, GPR const ra, uint32_t sh, uint32_t mb, uint32_t me = 0) { emit_M(0x54000000, ra, rs, sh, mb, me, false); }
+void RLWINM_(GPR const rs, GPR const ra, uint32_t sh, uint32_t mb, uint32_t me = 0) { emit_M(0x54000000, ra, rs, sh, mb, me, true); }
+void RLWNM(GPR const rs, GPR const ra, GPR const rb, uint32_t mb, uint32_t me = 0) { emit_M(0x5c000000, ra, rs, rb.index, mb, me, false); }
+void RLWNM_(GPR const rs, GPR const ra, GPR const rb, uint32_t mb, uint32_t me = 0) { emit_M(0x5c000000, ra, rs, rb.index, mb, me, true); }
+void SC(uint32_t lev) { emit_SC(0x44000000, lev); }
+void SI(GPR const rt, GPR const ra, uint32_t d) { emit_D(0x30000000, rt, ra, d); }
+void SI_(GPR const rt, GPR const ra, uint32_t d) { emit_D(0x34000000, rt, ra, d); }
+void SLBIA(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c0003e4, ra, rt, rb, false); }
+void SLBIA_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c0003e4, ra, rt, rb, true); }
+void SLBIE(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c000364, ra, rt, rb, false); }
+void SLBIE_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c000364, ra, rt, rb, true); }
+void SLD(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c000036, ra, rt, rb, false); }
+void SLD_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c000036, ra, rt, rb, true); }
+void SLW(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c000030, ra, rt, rb, false); }
+void SLW_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c000030, ra, rt, rb, true); }
+void SRAD(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c000634, ra, rt, rb, false); }
+void SRAD_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c000634, ra, rt, rb, true); }
+void SRADI(GPR const rt, GPR const ra, uint32_t sh) { emit_XS(0x7c000674, rt, ra, sh, false); }
+void SRADI_(GPR const rt, GPR const ra, uint32_t sh) { emit_XS(0x7c000674, rt, ra, sh, true); }
+void SRD(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c000436, ra, rt, rb, false); }
+void SRD_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c000436, ra, rt, rb, true); }
+void SRAW(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c000630, ra, rt, rb, false); }
+void SRAW_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c000630, ra, rt, rb, true); }
+void SRAWI(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c000670, ra, rt, rb, false); }
+void SRAWI_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c000670, ra, rt, rb, true); }
+void SRW(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c000430, ra, rt, rb, false); }
+void SRW_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c000430, ra, rt, rb, true); }
+void STB(GPR const rt, GPR const ra, uint32_t d) { emit_D(0x98000000, rt, ra, d); }
+void STBU(GPR const rt, GPR const ra, uint32_t d) { emit_D(0x9c000000, rt, ra, d); }
+void STBUX(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c0001ee, ra, rt, rb, false); }
+void STBUX_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c0001ee, ra, rt, rb, true); }
+void STBX(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c0001ae, ra, rt, rb, false); }
+void STBX_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c0001ae, ra, rt, rb, true); }
+void STD(GPR const rt, GPR const ra, uint32_t d) { emit_DS(0xf8000000, rt, ra, d >> 2); }
+void STDCX(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c0001ac, ra, rt, rb, false); }
+void STDCX_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c0001ac, ra, rt, rb, true); }
+void STDU(GPR const rt, GPR const ra, uint32_t d) { emit_DS(0xf8000001, rt, ra, d >> 2); }
+void STDUX(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c00016a, ra, rt, rb, false); }
+void STDUX_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c00016a, ra, rt, rb, true); }
+void STDX(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c00012a, ra, rt, rb, false); }
+void STDX_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c00012a, ra, rt, rb, true); }
+void STFD(GPR const rt, GPR const ra, uint32_t d) { emit_D(0xd8000000, rt, ra, d); }
+void STFDU(GPR const rt, GPR const ra, uint32_t d) { emit_D(0xdc000000, rt, ra, d); }
+void STFDUX(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c0005ee, ra, rt, rb, false); }
+void STFDUX_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c0005ee, ra, rt, rb, true); }
+void STFDX(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c0005ae, ra, rt, rb, false); }
+void STFDX_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c0005ae, ra, rt, rb, true); }
+void STFIWX(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c0007ae, ra, rt, rb, false); }
+void STFIWX_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c0007ae, ra, rt, rb, true); }
+void STFS(GPR const rt, GPR const ra, uint32_t d) { emit_D(0xd0000000, rt, ra, d); }
+void STFSU(GPR const rt, GPR const ra, uint32_t d) { emit_D(0xd4000000, rt, ra, d); }
+void STFSUX(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c00056e, ra, rt, rb, false); }
+void STFSUX_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c00056e, ra, rt, rb, true); }
+void STFSX(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c00052e, ra, rt, rb, false); }
+void STFSX_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c00052e, ra, rt, rb, true); }
+void STH(GPR const rt, GPR const ra, uint32_t d) { emit_D(0xb0000000, rt, ra, d); }
+void STHBRX(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c00072c, ra, rt, rb, false); }
+void STHBRX_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c00072c, ra, rt, rb, true); }
+void STHU(GPR const rt, GPR const ra, uint32_t d) { emit_D(0xb4000000, rt, ra, d); }
+void STHUX(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c00036e, ra, rt, rb, false); }
+void STHUX_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c00036e, ra, rt, rb, true); }
+void STHX(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c00032e, ra, rt, rb, false); }
+void STHX_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c00032e, ra, rt, rb, true); }
+void STMW(GPR const rt, GPR const ra, uint32_t d) { emit_D(0xbc000000, rt, ra, d); }
+void STSWI(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c0005aa, ra, rt, rb, false); }
+void STSWI_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c0005aa, ra, rt, rb, true); }
+void STSWX(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c00052a, ra, rt, rb, false); }
+void STSWX_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c00052a, ra, rt, rb, true); }
+void STW(GPR const rt, GPR const ra, uint32_t d) { emit_D(0x90000000, rt, ra, d); }
+void STWBRX(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c00052c, ra, rt, rb, false); }
+void STWBRX_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c00052c, ra, rt, rb, true); }
+void STWCX_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c00012c, ra, rt, rb, false); }
+void STWCX__(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c00012c, ra, rt, rb, true); }
+void STWU(GPR const rt, GPR const ra, uint32_t d) { emit_D(0x94000000, rt, ra, d); }
+void STWUX(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c00016e, ra, rt, rb, false); }
+void STWUX_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c00016e, ra, rt, rb, true); }
+void STWX(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c00012e, ra, rt, rb, false); }
+void STWX_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c00012e, ra, rt, rb, true); }
+void SUBF(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c000050, rt, ra, rb, false, false); }
+void SUBFO(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c000050, rt, ra, rb, true, false); }
+void SUBF_(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c000050, rt, ra, rb, false, true); }
+void SUBFO_(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c000050, rt, ra, rb, true, true); }
+void SUBFC(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c000010, rt, ra, rb, false, false); }
+void SUBFCO(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c000010, rt, ra, rb, true, false); }
+void SUBFC_(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c000010, rt, ra, rb, false, true); }
+void SUBFCO_(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c000010, rt, ra, rb, true, true); }
+void SUBFE(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c000110, rt, ra, rb, false, false); }
+void SUBFEO(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c000110, rt, ra, rb, true, false); }
+void SUBFE_(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c000110, rt, ra, rb, false, true); }
+void SUBFEO_(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c000110, rt, ra, rb, true, true); }
+void SUBFIC(GPR const rt, GPR const ra, uint32_t d) { emit_D(0x20000000, rt, ra, d); }
+void SUBFME(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c0001d0, rt, ra, rb, false, false); }
+void SUBFMEO(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c0001d0, rt, ra, rb, true, false); }
+void SUBFME_(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c0001d0, rt, ra, rb, false, true); }
+void SUBFMEO_(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c0001d0, rt, ra, rb, true, true); }
+void SUBFZE(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c000190, rt, ra, rb, false, false); }
+void SUBFZEO(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c000190, rt, ra, rb, true, false); }
+void SUBFZE_(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c000190, rt, ra, rb, false, true); }
+void SUBFZEO_(GPR const rt, GPR const ra, GPR const rb) { emit_XO(0x7c000190, rt, ra, rb, true, true); }
+void SYNC(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c0004ac, ra, rt, rb, false); }
+void SYNC_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c0004ac, ra, rt, rb, true); }
+void TD(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c000088, ra, rt, rb, false); }
+void TD_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c000088, ra, rt, rb, true); }
+void TDI(GPR const rt, GPR const ra, uint32_t d) { emit_D(0x08000000, rt, ra, d); }
+void TLBIE(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c000264, ra, rt, rb, false); }
+void TLBIE_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c000264, ra, rt, rb, true); }
+void TLBSYNC(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c00046c, ra, rt, rb, false); }
+void TLBSYNC_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c00046c, ra, rt, rb, true); }
+void TW(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c000008, ra, rt, rb, false); }
+void TW_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c000008, ra, rt, rb, true); }
+void TWI(GPR const rt, GPR const ra, uint32_t d) { emit_D(0x0c000000, rt, ra, d); }
+void XOR(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c000278, ra, rt, rb, false); }
+void XOR_(GPR const rt, GPR const ra, GPR const rb) { emit_X(0x7c000278, ra, rt, rb, true); }
+void XORI(GPR const rt, GPR const ra, uint32_t d) { emit_D(0x68000000, ra, rt, d); }
+void XORIS(GPR const rt, GPR const ra, uint32_t d) { emit_D(0x6c000000, ra, rt, d); }

externals/powah/tests.cpp

@@ -0,0 +1,340 @@
+// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project
+// SPDX-License-Identifier: GPL-3.0-or-later
+
+#include <catch2/catch_test_macros.hpp>
+#include <sys/mman.h>
+#include "powah_emit.hpp"
+
+#define EB32(X) __bswap32(X)
+
+TEST_CASE("ppc64: addi", "[ppc64]") {
+    std::vector<uint32_t> data(64);
+    powah::Context ctx(data.data(), data.size());
+
+    ctx.ADDI(powah::R2, powah::R2, 0);
+    ctx.ADDIS(powah::R2, powah::R12, 0);
+    REQUIRE(data[0] == EB32(0x00004238));
+    REQUIRE(data[1] == EB32(0x00004c3c));
+}
+
+TEST_CASE("ppc64: std/mr", "[ppc64]") {
+    std::vector<uint32_t> data(64);
+    powah::Context ctx(data.data(), data.size());
+
+    ctx.STD(powah::R26, powah::R1, 144);
+    ctx.MR(powah::R26, powah::R4);
+    ctx.STD(powah::R30, powah::R1, 176);
+    ctx.MR(powah::R30, powah::R3);
+    ctx.RLDICR(powah::R4, powah::R5, 25, 6);
+    ctx.STD(powah::R28, powah::R1, 160);
+    REQUIRE(data[0] == EB32(0x900041fb));
+    REQUIRE(data[1] == EB32(0x78239a7c));
+    REQUIRE(data[2] == EB32(0xb000c1fb));
+    REQUIRE(data[3] == EB32(0x781b7e7c));
+    REQUIRE(data[4] == EB32(0x84c9a478));
+    REQUIRE(data[5] == EB32(0xa00081fb));
+}
+
+TEST_CASE("ppc64: sldi", "[ppc64]") {
+    std::vector<uint32_t> data(64);
+    powah::Context ctx(data.data(), data.size());
+
+    ctx.SLDI(powah::R3, powah::R5, 37);
+    REQUIRE(data[0] == EB32(0x862ea378));
+}
+
+TEST_CASE("ppc64: rldicr", "[ppc64]") {
+    std::vector<uint32_t> data(64);
+    powah::Context ctx(data.data(), data.size());
+    ctx.RLDICR(powah::R1, powah::R1, 0, 0);
+    ctx.RLDICR(powah::R1, powah::R1, 1, 0);
+    ctx.RLDICR(powah::R1, powah::R1, 0, 1);
+    ctx.RLDICR(powah::R1, powah::R1, 1, 1);
+    ctx.RLDICR(powah::R1, powah::R1, 31, 31);
+    REQUIRE(data[0] == EB32(0x04002178));
+    REQUIRE(data[1] == EB32(0x04082178));
+    REQUIRE(data[2] == EB32(0x44002178));
+    REQUIRE(data[3] == EB32(0x44082178));
+    REQUIRE(data[4] == EB32(0xc4ff2178));
+}
+
+TEST_CASE("ppc64: mr/or/std", "[ppc64]") {
+    std::vector<uint32_t> data(64);
+    powah::Context ctx(data.data(), data.size());
+    ctx.MR(powah::R27, powah::R7);
+    ctx.MR(powah::R29, powah::R6);
+    ctx.OR(powah::R3, powah::R3, powah::R4);
+    ctx.MR(powah::R4, powah::R28);
+    ctx.CRMOVE(powah::CPR{8}, powah::CPR{1});
+    ctx.MR(powah::R25, powah::R5);
+    ctx.OR(powah::R3, powah::R3, powah::R26);
+    ctx.STD(powah::R3, powah::R1, 56);
+    ctx.MR(powah::R3, powah::R30);
+    REQUIRE(data[0] == EB32(0x783bfb7c));
+    REQUIRE(data[1] == EB32(0x7833dd7c));
+    REQUIRE(data[2] == EB32(0x7823637c));
+    REQUIRE(data[3] == EB32(0x78e3847f));
+    REQUIRE(data[4] == EB32(0x820b014d));
+    REQUIRE(data[5] == EB32(0x782bb97c));
+    REQUIRE(data[6] == EB32(0x78d3637c));
+    REQUIRE(data[7] == EB32(0x380061f8));
+    REQUIRE(data[8] == EB32(0x78f3c37f));
+}
+
+TEST_CASE("ppc64: ld/crand+addi", "[ppc64]") {
+    std::vector<uint32_t> data(64);
+    powah::Context ctx(data.data(), data.size());
+    ctx.LD(powah::R4, powah::R1, 72);
+    ctx.LWZ(powah::R5, powah::R1, 80);
+    ctx.CRAND(powah::CPR{20}, powah::CPR{10}, powah::CPR{9});
+    ctx.ADDI(powah::R6, powah::R4, 4);
+    ctx.ANDIS_(powah::R4, powah::R5, 1992);
+    ctx.LD(powah::R5, powah::R30, 1984);
+    ctx.LBZ(powah::R3, powah::R1, 84);
+    ctx.CLRLDI(powah::R26, powah::R6, 8);
+    ctx.STW(powah::R4, powah::R1, 80);
+    ctx.ADDI(powah::R5, powah::R5, 1);
+    ctx.STD(powah::R26, powah::R1, 72);
+    ctx.STD(powah::R5, powah::R30, 1984);
+    REQUIRE(data[0] == EB32(0x480081e8));
+    REQUIRE(data[1] == EB32(0x5000a180));
+    REQUIRE(data[2] == EB32(0x024a8a4e));
+    REQUIRE(data[3] == EB32(0x0400c438));
+    REQUIRE(data[4] == EB32(0xc807a474));
+    REQUIRE(data[5] == EB32(0xc007bee8));
+    REQUIRE(data[6] == EB32(0x54006188));
+    REQUIRE(data[7] == EB32(0x0002da78));
+    REQUIRE(data[8] == EB32(0x50008190));
+    REQUIRE(data[9] == EB32(0x0100a538));
+    REQUIRE(data[10] == EB32(0x480041fb));
+    REQUIRE(data[11] == EB32(0xc007bef8));
+}
+
+TEST_CASE("ppc64: rotldi", "[ppc64]") {
+    std::vector<uint32_t> data(64);
+    powah::Context ctx(data.data(), data.size());
+    ctx.ROTLDI(powah::R5, powah::R3, 16);
+    ctx.ROTLDI(powah::R4, powah::R3, 8);
+    ctx.RLDIMI(powah::R4, powah::R5, 8, 48);
+    ctx.ROTLDI(powah::R5, powah::R3, 24);
+    ctx.RLDIMI(powah::R4, powah::R5, 16, 40);
+    ctx.ROTLDI(powah::R5, powah::R3, 32);
+    ctx.RLDIMI(powah::R4, powah::R5, 24, 32);
+    ctx.ROTLDI(powah::R5, powah::R3, 48);
+    ctx.RLDIMI(powah::R4, powah::R5, 40, 16);
+    ctx.ROTLDI(powah::R5, powah::R3, 56);
+    ctx.RLDIMI(powah::R4, powah::R5, 48, 8);
+    ctx.RLDIMI(powah::R4, powah::R3, 56, 0);
+    ctx.MR(powah::R3, powah::R4);
+    REQUIRE(data[0] == EB32(0x00806578));
+    REQUIRE(data[1] == EB32(0x00406478));
+    REQUIRE(data[2] == EB32(0x2c44a478));
+    REQUIRE(data[3] == EB32(0x00c06578));
+    REQUIRE(data[4] == EB32(0x2c82a478));
+    REQUIRE(data[5] == EB32(0x02006578));
+    REQUIRE(data[6] == EB32(0x2cc0a478));
+    REQUIRE(data[7] == EB32(0x02806578));
+    REQUIRE(data[8] == EB32(0x0e44a478));
+    REQUIRE(data[9] == EB32(0x02c06578));
+    REQUIRE(data[10] == EB32(0x0e82a478));
+    REQUIRE(data[11] == EB32(0x0ec06478));
+    REQUIRE(data[12] == EB32(0x7823837c));
+}
+
+TEST_CASE("ppc64: branch-backwards", "[ppc64]") {
+    std::vector<uint32_t> data(64);
+    powah::Context ctx(data.data(), data.size());
+    powah::Label l_3 = ctx.DefineLabel();
+    ctx.LABEL(l_3);
+    ctx.ADD(powah::R1, powah::R2, powah::R3);
+    ctx.B(l_3);
+    ctx.ApplyRelocs();
+    REQUIRE(data[0] == EB32(0x141a227c));
+    REQUIRE(data[1] == EB32(0xfcffff4b));
+}
+
+TEST_CASE("ppc64: rlwimi madness", "[ppc64]") {
+    std::vector<uint32_t> data(64);
+    powah::Context ctx(data.data(), data.size());
+    ctx.ROTLWI(powah::R10, powah::R3, 24);
+    ctx.SRDI(powah::R9, powah::R3, 32);
+    ctx.RLWIMI(powah::R10, powah::R3, 8, 8, 15);
+    ctx.RLWIMI(powah::R10, powah::R3, 8, 24, 31);
+    ctx.ROTLWI(powah::R3, powah::R9, 24);
+    ctx.RLWIMI(powah::R3, powah::R9, 8, 8, 15);
+    ctx.RLWIMI(powah::R3, powah::R9, 8, 24, 31);
+    ctx.RLDIMI(powah::R3, powah::R10, 32, 0);
+    REQUIRE(data[0] == EB32(0x3ec06a54));
+    REQUIRE(data[1] == EB32(0x22006978));
+    REQUIRE(data[2] == EB32(0x1e426a50));
+    REQUIRE(data[3] == EB32(0x3e466a50));
+    REQUIRE(data[4] == EB32(0x3ec02355));
+    REQUIRE(data[5] == EB32(0x1e422351));
+    REQUIRE(data[6] == EB32(0x3e462351));
+    REQUIRE(data[7] == EB32(0x0e004379));
+}
+
+/*
+       0: 78 1b 68 7c  	mr	8, 3
+       4: 38 28 83 7c  	and 3, 4, 5
+       8: 74 00 6a 7c  	cntlzd 10, 3
+       c: 76 06 69 7c  	sradi 9, 3, 32
+      10: 82 d1 4a 79  	rldicl 10, 10, 58, 6
+      14: 00 00 29 55  	rlwinm 9, 9, 0, 0, 0
+      18: 64 f0 4a 79  	sldi 10, 10, 30
+      1c: 78 53 29 7d  	or 9, 9, 10
+      20: 00 00 28 f9  	std 9, 0(8)
+      24: 20 00 80 4e  	blr
+*/
+TEST_CASE("ppc64: functor-2", "[ppc64]") {
+    std::vector<uint32_t> data(64);
+    powah::Context ctx(data.data(), data.size());
+    ctx.MR(powah::R8, powah::R3);
+    ctx.AND(powah::R3, powah::R4, powah::R5);
+    ctx.CNTLZD(powah::R10, powah::R3);
+    ctx.SRADI(powah::R9, powah::R3, 32);
+    ctx.RLDICL(powah::R10, powah::R10, 58, 6);
+    ctx.RLWINM(powah::R9, powah::R9, 0, 0, 0);
+    ctx.SLDI(powah::R10, powah::R10, 30);
+    ctx.OR(powah::R9, powah::R9, powah::R10);
+    ctx.STD(powah::R9, powah::R8, 0);
+    ctx.BLR();
+    REQUIRE(data[0] == EB32(0x781b687c));
+    REQUIRE(data[1] == EB32(0x3828837c));
+    REQUIRE(data[2] == EB32(0x74006a7c));
+    REQUIRE(data[3] == EB32(0x7606697c));
+    REQUIRE(data[4] == EB32(0x82d14a79));
+    REQUIRE(data[5] == EB32(0x00002955));
+    REQUIRE(data[6] == EB32(0x64f04a79));
+    REQUIRE(data[7] == EB32(0x7853297d));
+    REQUIRE(data[8] == EB32(0x000028f9));
+    REQUIRE(data[9] == EB32(0x2000804e));
+}
+
+TEST_CASE("ppc64: functor-1", "[ppc64]") {
+    std::vector<uint32_t> data(64);
+    powah::Context ctx(data.data(), data.size());
+    powah::Label l_4 = ctx.DefineLabel();
+    powah::Label l_7 = ctx.DefineLabel();
+    ctx.CMPLD(powah::CR0, powah::R3, powah::R4);
+    ctx.MR(powah::R9, powah::R3);
+    ctx.BGT(powah::CR0, l_7);
+    ctx.CMPLDI(powah::CR0, powah::R3, 3781);
+    ctx.LI(powah::R3, 1);
+    ctx.BGTLR(powah::CR0);
+    ctx.CMPLD(powah::CR0, powah::R9, powah::R5);
+    ctx.BLE(powah::CR0, l_4);
+    ctx.SUBF(powah::R5, powah::R9, powah::R5);
+    ctx.XOR(powah::R3, powah::R5, powah::R4);
+    ctx.BLR();
+    ctx.LABEL(l_4);
+    ctx.ADD(powah::R5, powah::R4, powah::R5);
+    ctx.ADD(powah::R3, powah::R5, powah::R9);
+    ctx.BLR();
+    ctx.LABEL(l_7);
+    ctx.ADD(powah::R3, powah::R4, powah::R5);
+    ctx.BLR();
+    ctx.ApplyRelocs();
+    REQUIRE(data[0] == EB32(0x4020237c));
+    REQUIRE(data[1] == EB32(0x781b697c));
+    REQUIRE(data[2] == EB32(0x30008141));
+    REQUIRE(data[3] == EB32(0xc50e2328));
+    REQUIRE(data[4] == EB32(0x01006038));
+    REQUIRE(data[5] == EB32(0x2000814d));
+    REQUIRE(data[6] == EB32(0x4028297c));
+    REQUIRE(data[7] == EB32(0x10008140));
+    REQUIRE(data[8] == EB32(0x5028a97c));
+    REQUIRE(data[9] == EB32(0x7822a37c));
+    REQUIRE(data[10] == EB32(0x2000804e));
+    REQUIRE(data[11] == EB32(0x142aa47c));
+    REQUIRE(data[12] == EB32(0x144a657c));
+    REQUIRE(data[13] == EB32(0x2000804e));
+    REQUIRE(data[14] == EB32(0x142a647c));
+    REQUIRE(data[15] == EB32(0x2000804e));
+}
+
+#if defined(ARCHITECTURE_powerpc64)
+/*
+    0: d619637c  	mullw 3, 3, 3
+    4: 20006378  	clrldi	3, 3, 32
+    8: 2000804e  	blr
+*/
+TEST_CASE("ppc64: live-exec square", "[ppc64]") {
+    uint32_t* data = (uint32_t*)mmap(nullptr, 4096, PROT_WRITE | PROT_READ | PROT_EXEC, MAP_ANONYMOUS | MAP_PRIVATE, -1, 0);
+    REQUIRE(data != nullptr);
+
+    powah::Context ctx((void*)data, 4096);
+    ctx.MULLW(powah::R3, powah::R3, powah::R3);
+    ctx.CLRLDI(powah::R3, powah::R3, 32);
+    ctx.BLR();
+    REQUIRE(data[0] == EB32(0xd619637c));
+    REQUIRE(data[1] == EB32(0x20006378));
+    REQUIRE(data[2] == EB32(0x2000804e));
+
+    auto* fn = (int (*)(int))data;
+    REQUIRE(fn(4) == 4 * 4);
+    REQUIRE(fn(8) == 8 * 8);
+
+    munmap((void*)data, 4096);
+}
+
+/*
+int f(int a, int b, int c) {
+    a += (a > b) ? b - 0xffff : c + 402, b += 2, c &= b*c;
+    return a * a + b ^ c & b;
+}
+*/
+TEST_CASE("ppc64: live-exec xoralu", "[ppc64]") {
+    uint32_t* data = (uint32_t*)mmap(nullptr, 4096, PROT_WRITE | PROT_READ | PROT_EXEC, MAP_ANONYMOUS | MAP_PRIVATE, -1, 0);
+    REQUIRE(data != nullptr);
+
+    powah::Context ctx((void*)data, 4096);
+    powah::Label l_2 = ctx.DefineLabel();
+    powah::Label l_3 = ctx.DefineLabel();
+    ctx.CMPW(powah::R3, powah::R4);
+    ctx.BGT(powah::CR0, l_2);
+    ctx.ADDI(powah::R6, powah::R5, 402);
+    ctx.B(l_3);
+    ctx.LABEL(l_2);
+    ctx.ADDI(powah::R6, powah::R4, 1);
+    ctx.ADDIS(powah::R6, powah::R6, -1);
+    ctx.LABEL(l_3);
+    ctx.ADDI(powah::R4, powah::R4, 2);
+    ctx.ADD(powah::R3, powah::R6, powah::R3);
+    ctx.MULLW(powah::R6, powah::R4, powah::R5);
+    ctx.MULLW(powah::R3, powah::R3, powah::R3);
+    ctx.AND(powah::R5, powah::R5, powah::R6);
+    ctx.ADD(powah::R3, powah::R3, powah::R4);
+    ctx.AND(powah::R4, powah::R5, powah::R4);
+    ctx.XOR(powah::R3, powah::R3, powah::R4);
+    ctx.EXTSW(powah::R3, powah::R3);
+    ctx.BLR();
+    ctx.ApplyRelocs();
+    REQUIRE(data[0] == EB32(0x0020037c));
+    REQUIRE(data[1] == EB32(0x0c008141));
+    REQUIRE(data[2] == EB32(0x9201c538));
+    REQUIRE(data[3] == EB32(0x0c000048));
+    REQUIRE(data[4] == EB32(0x0100c438));
+    REQUIRE(data[5] == EB32(0xffffc63c));
+    REQUIRE(data[6] == EB32(0x02008438));
+    REQUIRE(data[7] == EB32(0x141a667c));
+    REQUIRE(data[8] == EB32(0xd629c47c));
+    REQUIRE(data[9] == EB32(0xd619637c));
+    REQUIRE(data[10] == EB32(0x3830a57c));
+    REQUIRE(data[11] == EB32(0x1422637c));
+    REQUIRE(data[12] == EB32(0x3820a47c));
+    REQUIRE(data[13] == EB32(0x7822637c));
+    REQUIRE(data[14] == EB32(0xb407637c));
+    REQUIRE(data[15] == EB32(0x2000804e));
+
+    auto const orig = [](int a, int b, int c) {
+        a += (a > b) ? b - 0xffff : c + 402, b += 2, c &= b*c;
+        return a * a + b ^ c & b;
+    };
+    auto* fn = (int (*)(int, int, int))data;
+    REQUIRE(fn(0, 1, 2) == orig(0, 1, 2));
+    REQUIRE(fn(6456, 4564, 4564561) == orig(6456, 4564, 4564561));
+
+    munmap((void*)data, 4096);
+}
+#endif

externals/stb/stb_image.h

@@ -1177,7 +1177,7 @@ static void *stbi__load_main(stbi__context *s, int *x, int *y, int *comp, int re
    #endif
 
    #ifndef STBI_NO_TGA
-   // test tga last because it's a crappy test!
+   // test tga last because it's a bad test!
    if (stbi__tga_test(s))
       return stbi__tga_load(s,x,y,comp,req_comp, ri);
    #endif
@@ -7662,7 +7662,7 @@ static int stbi__info_main(stbi__context *s, int *x, int *y, int *comp)
    if (stbi__hdr_info(s, x, y, comp))  return 1;
    #endif
 
-   // test tga last because it's a crappy test!
+   // test tga last because it's a bad test!
    #ifndef STBI_NO_TGA
    if (stbi__tga_info(s, x, y, comp))
        return 1;

src/CMakeLists.txt

@@ -8,7 +8,7 @@
 include_directories(.)
 
 # Dynarmic
-if ((ARCHITECTURE_x86_64 OR ARCHITECTURE_arm64 OR ARCHITECTURE_riscv64 OR ARCHITECTURE_loongarch64) AND NOT YUZU_STATIC_ROOM)
+if ((ARCHITECTURE_x86_64 OR ARCHITECTURE_arm64 OR ARCHITECTURE_riscv64 OR ARCHITECTURE_loongarch64 OR ARCHITECTURE_powerpc64) AND NOT YUZU_STATIC_ROOM)
     add_subdirectory(dynarmic)
     add_library(dynarmic::dynarmic ALIAS dynarmic)
 endif()
@@ -155,12 +155,24 @@ else()
             $<$<COMPILE_LANGUAGE:CXX>:-fno-rtti>)
     endif()
 
+    if (ENABLE_WERROR)
+        add_compile_options(
+            $<$<COMPILE_LANGUAGE:C,CXX>:-Werror=all>
+            $<$<COMPILE_LANGUAGE:C,CXX>:-Werror=extra>
+            $<$<COMPILE_LANGUAGE:C,CXX>:-Werror=missing-declarations>
+            $<$<COMPILE_LANGUAGE:C,CXX>:-Werror=shadow>
+            $<$<COMPILE_LANGUAGE:C,CXX>:-Werror=unused>)
+    else()
+        add_compile_options(
+            $<$<COMPILE_LANGUAGE:C,CXX>:-Wall>
+            $<$<COMPILE_LANGUAGE:C,CXX>:-Wextra>
+            $<$<COMPILE_LANGUAGE:C,CXX>:-Wmissing-declarations>
+            $<$<COMPILE_LANGUAGE:C,CXX>:-Wshadow>
+            $<$<COMPILE_LANGUAGE:C,CXX>:-Wunused>
+            # Some compilers could particularly misbehave :)
+            $<$<COMPILE_LANGUAGE:C,CXX>:-Wno-error-all>)
+    endif()
     add_compile_options(
-        $<$<COMPILE_LANGUAGE:C,CXX>:-Werror=all>
-        $<$<COMPILE_LANGUAGE:C,CXX>:-Werror=extra>
-        $<$<COMPILE_LANGUAGE:C,CXX>:-Werror=missing-declarations>
-        $<$<COMPILE_LANGUAGE:C,CXX>:-Werror=shadow>
-        $<$<COMPILE_LANGUAGE:C,CXX>:-Werror=unused>
         $<$<COMPILE_LANGUAGE:C,CXX>:-Wno-attributes>
         $<$<COMPILE_LANGUAGE:C,CXX>:-Wno-invalid-offsetof>
         $<$<COMPILE_LANGUAGE:C,CXX>:-Wno-unused-parameter>
@@ -169,9 +181,9 @@ else()
     if (CXX_CLANG OR CXX_ICC OR CXX_APPLE) # Clang, AppleClang, or Intel C++
         if (NOT MSVC)
             add_compile_options(
-                $<$<COMPILE_LANGUAGE:C,CXX>:-Werror=shadow-uncaptured-local>
-                $<$<COMPILE_LANGUAGE:C,CXX>:-Werror=implicit-fallthrough>
-                $<$<COMPILE_LANGUAGE:C,CXX>:-Werror=type-limits>)
+                $<$<COMPILE_LANGUAGE:C,CXX>:-Wshadow-uncaptured-local>
+                $<$<COMPILE_LANGUAGE:C,CXX>:-Wimplicit-fallthrough>
+                $<$<COMPILE_LANGUAGE:C,CXX>:-Wtype-limits>)
         endif()
         add_compile_options(
             $<$<COMPILE_LANGUAGE:C,CXX>:-Wno-braced-scalar-init>
@@ -181,7 +193,7 @@ else()
 
     if (ARCHITECTURE_x86_64)
         add_compile_options($<$<COMPILE_LANGUAGE:C,CXX>:-mcx16>)
-        if (PLATFORM_LINUX OR PLATFORM_FREEBSD)
+        if (LINUX OR FREEBSD)
             add_compile_options($<$<COMPILE_LANGUAGE:C,CXX>:-mtls-dialect=gnu2>)
         endif()
     endif()

src/android/app/build.gradle.kts

@@ -188,6 +188,7 @@ android {
         create("mainline") {
             dimension = "version"
             isDefault = true
+            minSdk = 33
 
             manifestPlaceholders += mapOf("appNameBase" to "Eden")
             resValue("string", "app_name_suffixed", "Eden")
@@ -199,6 +200,7 @@ android {
 
         create("genshinSpoof") {
             dimension = "version"
+            minSdk = 35
             manifestPlaceholders += mapOf("appNameBase" to "Eden Optimized")
             resValue("string", "app_name_suffixed", "Eden Optimized")
             applicationId = "com.miHoYo.Yuanshen"
@@ -216,6 +218,7 @@ android {
 
         create("legacy") {
             dimension = "version"
+            minSdk = 29
             manifestPlaceholders += mapOf("appNameBase" to "Eden Legacy")
             resValue("string", "app_name_suffixed", "Eden Legacy")
             applicationId = "dev.legacy.eden_emulator"

src/android/app/src/main/java/org/yuzu/yuzu_emu/NativeLibrary.kt

@@ -218,6 +218,8 @@ object NativeLibrary {
 
     external fun logSettings()
 
+    external fun refreshThreadPolicies()
+
     external fun getDebugKnobAt(index: Int): Boolean
 
     /**

src/android/app/src/main/java/org/yuzu/yuzu_emu/features/settings/model/view/SettingsItem.kt

@@ -594,7 +594,7 @@ abstract class SettingsItem(
                     IntSetting.ANDROID_PIPELINE_WORKERS,
                     titleId = R.string.pipeline_worker_cores,
                     descriptionId = R.string.pipeline_worker_cores_description,
-                    min = 4,
+                    min = 2,
                     max = 8,
                     units = "cores"
                 )

src/android/app/src/main/java/org/yuzu/yuzu_emu/features/settings/ui/SettingsFragmentPresenter.kt

@@ -250,8 +250,9 @@ class SettingsFragmentPresenter(
             add(BooleanSetting.USE_CUSTOM_RTC.key)
             add(LongSetting.CUSTOM_RTC.key)
 
-            add(HeaderSetting(R.string.cpu))
+            add(HeaderSetting(R.string.clocks))
             add(IntSetting.FAST_CPU_TIME.key)
+            add(IntSetting.FAST_GPU_TIME.key)
             add(BooleanSetting.CORE_SYNC_CORE_SPEED.key)
 
             add(IntSetting.MEMORY_LAYOUT.key)
@@ -298,7 +299,6 @@ class SettingsFragmentPresenter(
 
             add(HeaderSetting(R.string.hacks))
 
-            add(IntSetting.FAST_GPU_TIME.key)
             add(BooleanSetting.SKIP_CPU_INNER_INVALIDATION.key)
             add(BooleanSetting.FIX_BLOOM_EFFECTS.key)
             add(BooleanSetting.EMULATE_BGR565.key)

src/android/app/src/main/java/org/yuzu/yuzu_emu/fragments/EmulationFragment.kt

@@ -1451,6 +1451,7 @@ class EmulationFragment : Fragment(), SurfaceHolder.Callback {
 
     override fun onResume() {
         super.onResume()
+        NativeLibrary.refreshThreadPolicies()
         val b = _binding ?: return
         updateStatsPosition(IntSetting.PERF_OVERLAY_POSITION.getInt())
         updateSocPosition(IntSetting.SOC_OVERLAY_POSITION.getInt())

src/android/app/src/main/jni/game_metadata.cpp

@@ -20,132 +20,96 @@ struct RomMetadata {
     std::vector<u8> icon;
     bool isHomebrew;
 };
+static ankerl::unordered_dense::map<std::string, RomMetadata> m_rom_metadata_cache;
 
-ankerl::unordered_dense::map<std::string, RomMetadata> m_rom_metadata_cache;
+static RomMetadata CacheRomMetadata(const std::string& path) {
+    auto& instance = EmulationSession::GetInstance();
+    const auto file = Core::GetGameFileFromPath(instance.System().GetFilesystem(), path);
+    if (auto loader = Loader::GetLoader(instance.System(), file, 0, 0); loader) {
+        RomMetadata entry;
+        loader->ReadTitle(entry.title);
+        loader->ReadProgramId(entry.programId);
+        loader->ReadIcon(entry.icon);
 
-RomMetadata CacheRomMetadata(const std::string& path) {
-    const auto file =
-        Core::GetGameFileFromPath(EmulationSession::GetInstance().System().GetFilesystem(), path);
-    auto loader = Loader::GetLoader(EmulationSession::GetInstance().System(), file, 0, 0);
+        const FileSys::PatchManager pm{
+            entry.programId,
+            instance.System().GetFileSystemController(),
+            instance.System().GetContentProvider()
+        };
+        const auto control = pm.GetControlMetadata();
 
-    RomMetadata entry;
-    loader->ReadTitle(entry.title);
-    loader->ReadProgramId(entry.programId);
-    loader->ReadIcon(entry.icon);
-
-    const FileSys::PatchManager pm{
-        entry.programId, EmulationSession::GetInstance().System().GetFileSystemController(),
-        EmulationSession::GetInstance().System().GetContentProvider()};
-    const auto control = pm.GetControlMetadata();
-
-    if (control.first != nullptr) {
-        entry.developer = control.first->GetDeveloperName();
-        entry.version = control.first->GetVersionString();
-    } else {
-        FileSys::NACP nacp;
-        if (loader->ReadControlData(nacp) == Loader::ResultStatus::Success) {
-            entry.developer = nacp.GetDeveloperName();
+        if (control.first != nullptr) {
+            entry.developer = control.first->GetDeveloperName();
+            entry.version = control.first->GetVersionString();
         } else {
-            entry.developer = "";
+            FileSys::NACP nacp{};
+            entry.developer = loader->ReadControlData(nacp) == Loader::ResultStatus::Success
+                ? nacp.GetDeveloperName()
+                : "";
+            entry.version = "1.0.0";
         }
-
-        entry.version = "1.0.0";
+        if (loader->GetFileType() == Loader::FileType::NRO) {
+            auto loader_nro = reinterpret_cast<Loader::AppLoader_NRO*>(loader.get());
+            entry.isHomebrew = loader_nro->IsHomebrew();
+        } else {
+            entry.isHomebrew = false;
+        }
+        m_rom_metadata_cache[path] = entry;
+        return entry;
     }
-
-    if (loader->GetFileType() == Loader::FileType::NRO) {
-        auto loader_nro = reinterpret_cast<Loader::AppLoader_NRO*>(loader.get());
-        entry.isHomebrew = loader_nro->IsHomebrew();
-    } else {
-        entry.isHomebrew = false;
-    }
-
-    m_rom_metadata_cache[path] = entry;
-
-    return entry;
+    return {};
 }
 
-RomMetadata GetRomMetadata(const std::string& path, bool reload = false) {
-    if (reload) {
+static RomMetadata GetRomMetadata(const std::string& path, bool reload = false) {
+    if (reload)
         return CacheRomMetadata(path);
-    }
-
-    if (auto search = m_rom_metadata_cache.find(path); search != m_rom_metadata_cache.end()) {
-        return search->second;
-    }
-
+    if (auto it = m_rom_metadata_cache.find(path); it != m_rom_metadata_cache.end())
+        return it->second;
     return CacheRomMetadata(path);
 }
 
 extern "C" {
 
-jboolean Java_org_yuzu_yuzu_1emu_utils_GameMetadata_getIsValid(JNIEnv* env, jobject obj,
-                                                               jstring jpath) {
-    const auto file = EmulationSession::GetInstance().System().GetFilesystem()->OpenFile(
-        Common::Android::GetJString(env, jpath), FileSys::OpenMode::Read);
-    if (!file) {
-        return false;
+jboolean Java_org_yuzu_yuzu_1emu_utils_GameMetadata_getIsValid(JNIEnv* env, jobject obj, jstring jpath) {
+    if (auto const file = EmulationSession::GetInstance().System().GetFilesystem()->OpenFile(Common::Android::GetJString(env, jpath), FileSys::OpenMode::Read); file) {
+        if (auto loader = Loader::GetLoader(EmulationSession::GetInstance().System(), file); loader) {
+            auto const file_type = loader->GetFileType();
+            if (file_type == Loader::FileType::Unknown || file_type == Loader::FileType::Error)
+                return false;
+            if ((file_type == Loader::FileType::NSP || file_type == Loader::FileType::XCI) && !Loader::IsBootableGameContainer(file, file_type))
+                return false;
+            u64 program_id = 0;
+            return loader->ReadProgramId(program_id) == Loader::ResultStatus::Success;
+        }
     }
-
-    auto loader = Loader::GetLoader(EmulationSession::GetInstance().System(), file);
-    if (!loader) {
-        return false;
-    }
-
-    const auto file_type = loader->GetFileType();
-    if (file_type == Loader::FileType::Unknown || file_type == Loader::FileType::Error) {
-        return false;
-    }
-
-    if ((file_type == Loader::FileType::NSP || file_type == Loader::FileType::XCI) &&
-        !Loader::IsBootableGameContainer(file, file_type)) {
-        return false;
-    }
-
-    u64 program_id = 0;
-    Loader::ResultStatus res = loader->ReadProgramId(program_id);
-    if (res != Loader::ResultStatus::Success) {
-        return false;
-    }
-    return true;
+    return false;
 }
 
-jstring Java_org_yuzu_yuzu_1emu_utils_GameMetadata_getTitle(JNIEnv* env, jobject obj,
-                                                            jstring jpath) {
-    return Common::Android::ToJString(
-        env, GetRomMetadata(Common::Android::GetJString(env, jpath)).title);
+jstring Java_org_yuzu_yuzu_1emu_utils_GameMetadata_getTitle(JNIEnv* env, jobject obj, jstring jpath) {
+    return Common::Android::ToJString(env, GetRomMetadata(Common::Android::GetJString(env, jpath)).title);
 }
 
-jstring Java_org_yuzu_yuzu_1emu_utils_GameMetadata_getProgramId(JNIEnv* env, jobject obj,
-                                                                jstring jpath) {
-    return Common::Android::ToJString(
-        env, std::to_string(GetRomMetadata(Common::Android::GetJString(env, jpath)).programId));
+jstring Java_org_yuzu_yuzu_1emu_utils_GameMetadata_getProgramId(JNIEnv* env, jobject obj, jstring jpath) {
+    return Common::Android::ToJString(env, std::to_string(GetRomMetadata(Common::Android::GetJString(env, jpath)).programId));
 }
 
-jstring Java_org_yuzu_yuzu_1emu_utils_GameMetadata_getDeveloper(JNIEnv* env, jobject obj,
-                                                                jstring jpath) {
-    return Common::Android::ToJString(
-        env, GetRomMetadata(Common::Android::GetJString(env, jpath)).developer);
+jstring Java_org_yuzu_yuzu_1emu_utils_GameMetadata_getDeveloper(JNIEnv* env, jobject obj, jstring jpath) {
+    return Common::Android::ToJString(env, GetRomMetadata(Common::Android::GetJString(env, jpath)).developer);
 }
 
-jstring Java_org_yuzu_yuzu_1emu_utils_GameMetadata_getVersion(JNIEnv* env, jobject obj,
-                                                              jstring jpath, jboolean jreload) {
-    return Common::Android::ToJString(
-        env, GetRomMetadata(Common::Android::GetJString(env, jpath), jreload).version);
+jstring Java_org_yuzu_yuzu_1emu_utils_GameMetadata_getVersion(JNIEnv* env, jobject obj, jstring jpath, jboolean jreload) {
+    return Common::Android::ToJString(env, GetRomMetadata(Common::Android::GetJString(env, jpath), jreload).version);
 }
 
-jbyteArray Java_org_yuzu_yuzu_1emu_utils_GameMetadata_getIcon(JNIEnv* env, jobject obj,
-                                                              jstring jpath) {
+jbyteArray Java_org_yuzu_yuzu_1emu_utils_GameMetadata_getIcon(JNIEnv* env, jobject obj, jstring jpath) {
     auto icon_data = GetRomMetadata(Common::Android::GetJString(env, jpath)).icon;
-    jbyteArray icon = env->NewByteArray(static_cast<jsize>(icon_data.size()));
-    env->SetByteArrayRegion(icon, 0, env->GetArrayLength(icon),
-                            reinterpret_cast<jbyte*>(icon_data.data()));
+    jbyteArray icon = env->NewByteArray(jsize(icon_data.size()));
+    env->SetByteArrayRegion(icon, 0, env->GetArrayLength(icon), reinterpret_cast<jbyte*>(icon_data.data()));
     return icon;
 }
 
-jboolean Java_org_yuzu_yuzu_1emu_utils_GameMetadata_getIsHomebrew(JNIEnv* env, jobject obj,
-                                                                  jstring jpath) {
-    return static_cast<jboolean>(
-        GetRomMetadata(Common::Android::GetJString(env, jpath)).isHomebrew);
+jboolean Java_org_yuzu_yuzu_1emu_utils_GameMetadata_getIsHomebrew(JNIEnv* env, jobject obj, jstring jpath) {
+    return jboolean(GetRomMetadata(Common::Android::GetJString(env, jpath)).isHomebrew);
 }
 
 void Java_org_yuzu_yuzu_1emu_utils_GameMetadata_resetMetadata(JNIEnv* env, jobject obj) {

src/android/app/src/main/jni/native.cpp

@@ -50,6 +50,7 @@ extern "C" {
 #include "common/scope_exit.h"
 #include "common/settings.h"
 #include "common/string_util.h"
+#include "common/thread.h"
 #include "frontend_common/play_time_manager.h"
 #include "core/constants.h"
 #include "core/core.h"
@@ -1182,6 +1183,10 @@ void Java_org_yuzu_yuzu_1emu_NativeLibrary_logSettings(JNIEnv* env, jobject jobj
     Settings::LogSettings();
 }
 
+void Java_org_yuzu_yuzu_1emu_NativeLibrary_refreshThreadPolicies(JNIEnv* env, jobject jobj) {
+    Common::RefreshThreadPolicies();
+}
+
 jboolean Java_org_yuzu_yuzu_1emu_NativeLibrary_getDebugKnobAt(JNIEnv* env, jobject jobj, jint index) {
     return static_cast<jboolean>(Settings::getDebugKnobAt(static_cast<u8>(index)));
 }

src/android/app/src/main/res/values-ar/strings.xml

@@ -958,7 +958,6 @@
     <string name="clock_fast">سريع (2000MHz)</string>
 
     <!-- GPU overclock factors -->
-    <string name="off">تعطيل</string>
     <string name="fast_gpu_medium">متوسط (256)</string>
     <string name="fast_gpu_high">مرتفع (512)</string>
 

src/android/app/src/main/res/values-de/strings.xml

@@ -884,7 +884,6 @@ Wirklich fortfahren?</string>
     <string name="clock_fast">Schnell (2000MHz)</string>
 
     <!-- GPU overclock factors -->
-    <string name="off">Aus</string>
     <string name="fast_gpu_medium">Mittel (256)</string>
     <string name="fast_gpu_high">Hoch (512)</string>
 

src/android/app/src/main/res/values-es/strings.xml

@@ -950,7 +950,6 @@
     <string name="clock_fast">Rápido (2000MHz)</string>
 
     <!-- GPU overclock factors -->
-    <string name="off">Desactivado</string>
     <string name="fast_gpu_medium">Medio (256)</string>
     <string name="fast_gpu_high">Alto (512)</string>
 

src/android/app/src/main/res/values-fr/strings.xml

@@ -897,7 +897,6 @@
     <string name="clock_fast">Rapide (2000MHz)</string>
 
     <!-- GPU overclock factors -->
-    <string name="off">Désactivé</string>
     <string name="fast_gpu_medium">Moyen (256)</string>
     <string name="fast_gpu_high">Élevé (512)</string>
 

src/android/app/src/main/res/values-pl/strings.xml

@@ -871,7 +871,6 @@
     <string name="clock_fast">Szybkie (2000MHz)</string>
 
     <!-- GPU overclock factors -->
-    <string name="off">Wyłączone</string>
     <string name="fast_gpu_medium">Średnie (256)</string>
     <string name="fast_gpu_high">Wysokie (512)</string>
 

src/android/app/src/main/res/values-ru/strings.xml

@@ -954,7 +954,6 @@
     <string name="clock_fast">Быстрая (2000MHz)</string>
 
     <!-- GPU overclock factors -->
-    <string name="off">Выкл.</string>
     <string name="fast_gpu_medium">Среднее (256)</string>
     <string name="fast_gpu_high">Высокое (512)</string>
 

src/android/app/src/main/res/values-uk/strings.xml

@@ -943,7 +943,6 @@
     <string name="clock_fast">Швидко (2000 МГц)</string>
 
     <!-- GPU overclock factors -->
-    <string name="off">Вимкнено</string>
     <string name="fast_gpu_medium">Середньо (256)</string>
     <string name="fast_gpu_high">Високо (512)</string>
 

src/android/app/src/main/res/values-zh-rCN/strings.xml

@@ -948,7 +948,6 @@
     <string name="clock_fast">快速 (2000MHz)</string>
 
     <!-- GPU overclock factors -->
-    <string name="off">关闭</string>
     <string name="fast_gpu_medium">中 (256)</string>
     <string name="fast_gpu_high">高 (512)</string>
 

src/android/app/src/main/res/values-zh-rTW/strings.xml

@@ -53,7 +53,7 @@
     <string name="stats_overlay_options">疊加層</string>
     <string name="enable_stats_overlay_">啟用效能統計疊加層</string>
     <string name="stats_overlay_options_description">設定疊加層中顯示的資訊</string>
-    <string name="show_fps">顯示FPS</string>
+    <string name="show_fps">顯示影格率</string>
     <string name="show_fps_description">顯示當前影格率</string>
     <string name="show_frametime">顯示影格時間</string>
     <string name="show_app_ram_usage">顯示應用程式的記憶體用量</string>

src/android/app/src/main/res/values/arrays.xml

@@ -34,7 +34,7 @@
     </integer-array>
 
     <string-array name="clockNames">
-        <item>@string/off</item>
+        <item>@string/clock_normal</item>
         <item>@string/clock_boost</item>
         <item>@string/clock_fast</item>
     </string-array>
@@ -547,7 +547,7 @@
     </integer-array>
 
     <string-array name="gpuEntries">
-        <item>@string/off</item>
+        <item>@string/fast_gpu_normal</item>
         <item>@string/fast_gpu_medium</item>
         <item>@string/fast_gpu_high</item>
     </string-array>

src/android/app/src/main/res/values/strings.xml

@@ -450,8 +450,8 @@
     <string name="set_custom_rtc">Set custom RTC</string>
 
     <!-- CPU -->
-    <string name="fast_cpu_time">CPU Overclock</string>
-    <string name="fast_cpu_time_description">Forces the emulated CPU to run at a higher clock, reducing certain FPS limiters. Use Boost (1700MHz) to run at the Switch\'s highest native clock, or Fast (2000MHz) to run at 2x clock.</string>
+    <string name="fast_cpu_time">CPU Clocks</string>
+    <string name="fast_cpu_time_description">Raises the clock the emulated CPU reports, which removes some FPS limiters. Weaker CPUs may see reduced performance, and certain games may behave improperly.</string>
     <string name="custom_cpu_ticks">Custom CPU Ticks</string>
     <string name="custom_cpu_ticks_description">Set a custom value of CPU ticks. Higher values can increase performance, but may also cause the game to freeze. A range of 77–21000 is recommended.</string>
     <string name="cpu_ticks">Ticks</string>
@@ -512,8 +512,8 @@
 
     <string name="hacks">Hacks</string>
 
-    <string name="fast_gpu_time">Fast GPU Time</string>
-    <string name="fast_gpu_time_description">Forces most games to run at their highest native resolution. Use 256 for maximal performance and 512 for maximal graphics fidelity.</string>
+    <string name="fast_gpu_time">GPU Clocks</string>
+    <string name="fast_gpu_time_description">Makes the game believe GPU work finishes faster than it does, so it stops lowering resolution and render distance to fit the Switch\'s clocks.</string>
     <string name="skip_cpu_inner_invalidation">Skip CPU Inner Invalidation</string>
     <string name="skip_cpu_inner_invalidation_description">Skips certain CPU-side cache invalidations during memory updates, reducing CPU usage and improving it\'s performance. This may cause glitches or crashes on some games.</string>
     <string name="fix_bloom_effects">Fix Bloom Effects</string>
@@ -560,6 +560,7 @@
 
     <!-- Debug settings strings -->
     <string name="cpu">CPU</string>
+    <string name="clocks">Clocks</string>
     <string name="use_auto_stub">Use Auto Stub</string>
     <string name="use_auto_stub_description">Automatically stub missing services and functions. This may improve compatibility but can cause crashes and stability issues.</string>
 
@@ -968,14 +969,15 @@
     <string name="memory_6gb">6GB (Unsafe)</string>
     <string name="memory_8gb">8GB (Unsafe)</string>
 
-    <!--CPU clock speeds-->
-    <string name="clock_boost">Boost (1700MHz)</string>
-    <string name="clock_fast">Fast (2000MHz)</string>
+    <!-- CPU clock levels -->
+    <string name="clock_normal">Normal</string>
+    <string name="clock_boost">Boost</string>
+    <string name="clock_fast">Overclock</string>
 
-    <!-- GPU overclock factors -->
-    <string name="off">Off</string>
-    <string name="fast_gpu_medium">Medium (256)</string>
-    <string name="fast_gpu_high">High (512)</string>
+    <!-- GPU clock levels -->
+    <string name="fast_gpu_normal">Normal</string>
+    <string name="fast_gpu_medium">Boost</string>
+    <string name="fast_gpu_high">Overclock</string>
 
     <!-- GPU swizzle texture size -->
     <string name="gpu_texturesizeswizzle_verysmall">Very Small (16 MB)</string>

src/android/app/src/main/res/xml/game_mode_config.xml

@@ -1,7 +1,7 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <game-mode-config
     xmlns:android="http://schemas.android.com/apk/res/android"
-    android:supportsBatteryGameMode="true"
+    android:supportsBatteryGameMode="false"
     android:supportsPerformanceGameMode="true"
     android:allowGameDownscaling="false"
     android:allowGameFpsOverride="false"/>

src/audio_core/CMakeLists.txt

@@ -222,7 +222,7 @@ if (MSVC)
     )
 else()
     target_compile_options(audio_core PRIVATE
-        $<$<COMPILE_LANGUAGE:C,CXX>:-Werror=conversion>
+        $<$<COMPILE_LANGUAGE:C,CXX>:-Wconversion>
         $<$<COMPILE_LANGUAGE:C,CXX>:-Wno-sign-conversion>)
 endif()
 

src/audio_core/renderer/command/data_source/decode.cpp

@@ -18,20 +18,15 @@
 namespace AudioCore::Renderer {
 
 constexpr u32 TempBufferSize = 0x3F00;
-constexpr std::array<u8, 3> PitchBySrcQuality = {4, 8, 4};
 
-/**
- * Decode PCM data. Only s16 or f32 is supported.
- *
- * @tparam T         - Type to decode. Only s16 and f32 are supported.
- * @param memory     - Core memory for reading samples.
- * @param out_buffer - Output mix buffer to receive the samples.
- * @param req        - Information for how to decode.
- * @return Number of samples decoded.
- */
+/// @brief Decode PCM data. Only s16 or f32 is supported.
+/// @tparam T         - Type to decode. Only s16 and f32 are supported.
+/// @param memory     - Core memory for reading samples.
+/// @param out_buffer - Output mix buffer to receive the samples.
+/// @param req        - Information for how to decode.
+/// @return Number of samples decoded.
 template <typename T>
-static u32 DecodePcm(Core::Memory::Memory& memory, std::span<s16> out_buffer,
-                     const DecodeArg& req) {
+static u32 DecodePcm(Core::Memory::Memory& memory, std::span<s16> out_buffer, const DecodeArg& req) {
     constexpr s32 min{(std::numeric_limits<s16>::min)()};
     constexpr s32 max{(std::numeric_limits<s16>::max)()};
 
@@ -94,16 +89,12 @@ static u32 DecodePcm(Core::Memory::Memory& memory, std::span<s16> out_buffer,
     return samples_to_decode;
 }
 
-/**
- * Decode ADPCM data.
- *
- * @param memory     - Core memory for reading samples.
- * @param out_buffer - Output mix buffer to receive the samples.
- * @param req        - Information for how to decode.
- * @return Number of samples decoded.
- */
-static u32 DecodeAdpcm(Core::Memory::Memory& memory, std::span<s16> out_buffer,
-                       const DecodeArg& req) {
+/// @brief Decode ADPCM data.
+/// @param memory     - Core memory for reading samples.
+/// @param out_buffer - Output mix buffer to receive the samples.
+/// @param req        - Information for how to decode.
+/// @return Number of samples decoded.
+static u32 DecodeAdpcm(Core::Memory::Memory& memory, std::span<s16> out_buffer, const DecodeArg& req) {
     constexpr u32 SamplesPerFrame{14};
     constexpr u32 NibblesPerFrame{16};
 
@@ -115,8 +106,7 @@ static u32 DecodeAdpcm(Core::Memory::Memory& memory, std::span<s16> out_buffer,
         return 0;
     }
 
-    auto end{(req.end_offset % SamplesPerFrame) +
-             NibblesPerFrame * (req.end_offset / SamplesPerFrame)};
+    auto end{(req.end_offset % SamplesPerFrame) + NibblesPerFrame * (req.end_offset / SamplesPerFrame)};
     if (req.end_offset % SamplesPerFrame) {
         end += 3;
     } else {
@@ -133,52 +123,49 @@ static u32 DecodeAdpcm(Core::Memory::Memory& memory, std::span<s16> out_buffer,
         return 0;
     }
 
-    auto samples_to_read{samples_to_process};
-    auto samples_remaining_in_frame{start_pos % SamplesPerFrame};
-    auto position_in_frame{(start_pos / SamplesPerFrame) * NibblesPerFrame +
-                           samples_remaining_in_frame};
-
+    auto samples_to_read = samples_to_process;
+    auto samples_remaining_in_frame = start_pos % SamplesPerFrame;
+    auto position_in_frame = (start_pos / SamplesPerFrame) * NibblesPerFrame + samples_remaining_in_frame;
     if (samples_remaining_in_frame) {
         position_in_frame += 2;
     }
 
     const auto size{(std::max)((samples_to_process / 8U) * SamplesPerFrame, 8U)};
-    Core::Memory::CpuGuestMemory<u8, Core::Memory::GuestMemoryFlags::UnsafeRead> wavebuffer(
-        memory, req.buffer + position_in_frame / 2, size);
+    Core::Memory::CpuGuestMemory<u8, Core::Memory::GuestMemoryFlags::UnsafeRead> wavebuffer(memory, req.buffer + position_in_frame / 2, size);
 
-    auto context{req.adpcm_context};
-    auto header{context->header};
-    u8 coeff_index{static_cast<u8>((header >> 4U) & 0xFU)};
-    u8 scale{static_cast<u8>(header & 0xFU)};
-    s32 coeff0{req.coefficients[coeff_index * 2 + 0]};
-    s32 coeff1{req.coefficients[coeff_index * 2 + 1]};
+    auto context = req.adpcm_context;
+    auto header = context->header;
+    u8 scale = u8(header & 0xfU);
+    u8 coeff_index = u8((header >> 4U) & 0x7u);
+    s32 coeff0 = req.coefficients[coeff_index * 2 + 0];
+    s32 coeff1 = req.coefficients[coeff_index * 2 + 1];
 
-    auto yn0{context->yn0};
-    auto yn1{context->yn1};
-
-    static constexpr std::array<s32, 16> Steps{
-        0, 1, 2, 3, 4, 5, 6, 7, -8, -7, -6, -5, -4, -3, -2, -1,
+    auto yn0 = context->yn0;
+    auto yn1 = context->yn1;
+    auto const get_step = [](u32 index) {
+        // Emulates the following table
+        // 0, 1, 2, 3, 4, 5, 6, 7, -8, -7, -6, -5, -4, -3, -2, -1,
+        constexpr u64 steps_table = 0x1234567876543210ull;
+        constexpr u64 steps_sign = 0b1111111100000000ull;
+        auto const r = s32((steps_table >> (index * 4)) & 0xf);
+        return ((steps_sign >> index) & 1) == 0 ? -r : r;
     };
-
-    const auto decode_sample = [&](const s32 code) -> s16 {
+    auto const decode_sample = [&](const s32 code) -> s16 {
         const auto xn = code * (1 << scale);
         const auto prediction = coeff0 * yn0 + coeff1 * yn1;
         const auto sample = ((xn << 11) + 0x400 + prediction) >> 11;
         const auto saturated = std::clamp<s32>(sample, -0x8000, 0x7FFF);
         yn1 = yn0;
-        yn0 = static_cast<s16>(saturated);
-        return yn0;
+        return yn0 = s16(saturated);
     };
 
-    u32 read_index{0};
-    u32 write_index{0};
-
-    while (samples_to_read > 0) {
+    u32 read_index = 0;
+    for (u32 write_index = 0; samples_to_read > 0 && write_index < out_buffer.size(); ) {
         // Are we at a new frame?
         if ((position_in_frame % NibblesPerFrame) == 0) {
             header = wavebuffer[read_index++];
-            coeff_index = (header >> 4) & 0xF;
-            scale = header & 0xF;
+            scale = header & 0xFu;
+            coeff_index = (header >> 4) & 0x7u;
             coeff0 = req.coefficients[coeff_index * 2 + 0];
             coeff1 = req.coefficients[coeff_index * 2 + 1];
             position_in_frame += 2;
@@ -187,14 +174,12 @@ static u32 DecodeAdpcm(Core::Memory::Memory& memory, std::span<s16> out_buffer,
             if (samples_to_read >= SamplesPerFrame) {
                 // Can grab all samples until the next header
                 for (u32 i = 0; i < SamplesPerFrame / 2; i++) {
-                    auto code0{Steps[(wavebuffer[read_index] >> 4) & 0xF]};
-                    auto code1{Steps[wavebuffer[read_index] & 0xF]};
-                    read_index++;
-
+                    auto code0 = get_step((wavebuffer[read_index + i] >> 4) & 0xF);
+                    auto code1 = get_step(wavebuffer[read_index + i] & 0xF);
                     out_buffer[write_index++] = decode_sample(code0);
                     out_buffer[write_index++] = decode_sample(code1);
                 }
-
+                read_index += SamplesPerFrame / 2;
                 position_in_frame += SamplesPerFrame;
                 samples_to_read -= SamplesPerFrame;
                 continue;
@@ -202,15 +187,14 @@ static u32 DecodeAdpcm(Core::Memory::Memory& memory, std::span<s16> out_buffer,
         }
 
         // Decode a single sample
-        auto code{wavebuffer[read_index]};
+        auto code = wavebuffer[read_index];
         if (position_in_frame & 1) {
             code &= 0xF;
             read_index++;
         } else {
             code >>= 4;
         }
-
-        out_buffer[write_index++] = decode_sample(Steps[code]);
+        out_buffer[write_index++] = decode_sample(get_step(code));
 
         position_in_frame++;
         samples_to_read--;
@@ -219,27 +203,21 @@ static u32 DecodeAdpcm(Core::Memory::Memory& memory, std::span<s16> out_buffer,
     context->header = header;
     context->yn0 = yn0;
     context->yn1 = yn1;
-
     return samples_to_process;
 }
 
-/**
- * Decode implementation.
- * Decode wavebuffers according to the given args.
- *
- * @param memory - Core memory to read data from.
- * @param args   - The wavebuffer data, and information for how to decode it.
- */
+/// @brief Decode implementation.
+/// Decode wavebuffers according to the given args.
+///
+/// @param memory - Core memory to read data from.
+/// @param args   - The wavebuffer data, and information for how to decode it.
 void DecodeFromWaveBuffers(Core::Memory::Memory& memory, const DecodeFromWaveBuffersArgs& args) {
-    static constexpr auto EndWaveBuffer = [](auto& voice_state, auto& wavebuffer, auto& index,
-                                             auto& played_samples, auto& consumed) -> void {
+    constexpr auto EndWaveBuffer = [](auto& voice_state, auto& wavebuffer, auto& index, auto& played_samples, auto& consumed) -> void {
         voice_state.wave_buffer_valid[index] = false;
         voice_state.loop_count = 0;
-
         if (wavebuffer.stream_ended) {
             played_samples = 0;
         }
-
         index = (index + 1) % MaxWaveBuffers;
         consumed++;
     };
@@ -255,8 +233,9 @@ void DecodeFromWaveBuffers(Core::Memory::Memory& memory, const DecodeFromWaveBuf
         return;
     }
 
-    auto pitch{PitchBySrcQuality[static_cast<u32>(args.src_quality)]};
-    if (static_cast<u32>(pitch + size_required.to_int_floor()) > TempBufferSize) {
+    // 0 -> 4, 1 -> 8, 2 -> 4
+    auto pitch = u32((0x040804ul >> (u32(args.src_quality) * 8)) & 0xfful);
+    if (u32(pitch + size_required.to_int_floor()) > TempBufferSize) {
         return;
     }
 
@@ -272,7 +251,7 @@ void DecodeFromWaveBuffers(Core::Memory::Memory& memory, const DecodeFromWaveBuf
     bool is_buffer_starved{false};
     u32 offset{voice_state.offset};
 
-    auto output_buffer{args.output};
+    auto output_buffer = args.output;
     std::array<s16, TempBufferSize> temp_buffer{};
 
     while (remaining_sample_count > 0) {
@@ -294,8 +273,8 @@ void DecodeFromWaveBuffers(Core::Memory::Memory& memory, const DecodeFromWaveBuf
             if (wavebuffer_index >= MaxWaveBuffers) {
                 LOG_ERROR(Service_Audio, "Invalid wavebuffer index! {}", wavebuffer_index);
                 wavebuffer_index = 0;
-                voice_state.wave_buffer_valid.fill(false);
                 wavebuffers_consumed = MaxWaveBuffers;
+                voice_state.wave_buffer_valid.fill(false);
             }
 
             if (!voice_state.wave_buffer_valid[wavebuffer_index]) {
@@ -303,12 +282,9 @@ void DecodeFromWaveBuffers(Core::Memory::Memory& memory, const DecodeFromWaveBuf
                 break;
             }
 
-            auto& wavebuffer{args.wave_buffers[wavebuffer_index]};
-
-            if (offset == 0 && args.sample_format == SampleFormat::Adpcm &&
-                wavebuffer.context != 0) {
-                memory.ReadBlockUnsafe(wavebuffer.context, &voice_state.adpcm_context,
-                                       wavebuffer.context_size);
+            auto& wavebuffer = args.wave_buffers[wavebuffer_index];
+            if (offset == 0 && args.sample_format == SampleFormat::Adpcm && wavebuffer.context != 0) {
+                memory.ReadBlockUnsafe(wavebuffer.context, &voice_state.adpcm_context, wavebuffer.context_size);
             }
 
             auto start_offset{wavebuffer.start_offset};
@@ -351,9 +327,7 @@ void DecodeFromWaveBuffers(Core::Memory::Memory& memory, const DecodeFromWaveBuf
             case SampleFormat::Adpcm: {
                 decode_arg.adpcm_context = &voice_state.adpcm_context;
                 memory.ReadBlockUnsafe(args.data_address, &decode_arg.coefficients, args.data_size);
-                samples_decoded = DecodeAdpcm(
-                    memory, {&temp_buffer[temp_buffer_pos], TempBufferSize - temp_buffer_pos},
-                    decode_arg);
+                samples_decoded = DecodeAdpcm( memory, {&temp_buffer[temp_buffer_pos], TempBufferSize - temp_buffer_pos}, decode_arg);
             } break;
 
             default:

src/audio_core/renderer/command/resample/resample.cpp

@@ -1,3 +1,6 @@
+// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project
+// SPDX-License-Identifier: GPL-3.0-or-later
+
 // SPDX-FileCopyrightText: Copyright 2022 yuzu Emulator Project
 // SPDX-License-Identifier: GPL-2.0-or-later
 
@@ -5,21 +8,13 @@
 
 namespace AudioCore::Renderer {
 
-static void ResampleLowQuality(std::span<s32> output, std::span<const s16> input,
-                               const Common::FixedPoint<49, 15>& sample_rate_ratio,
-                               Common::FixedPoint<49, 15>& fraction, const u32 samples_to_write) {
-    if (sample_rate_ratio == 1.0f) {
-        for (u32 i = 0; i < samples_to_write; i++) {
-            output[i] = input[i];
-        }
-    } else {
-        u32 read_index{0};
-        for (u32 i = 0; i < samples_to_write; i++) {
-            output[i] = input[read_index + (fraction >= 0.5f)];
-            fraction += sample_rate_ratio;
-            read_index += static_cast<u32>(fraction.to_int_floor());
-            fraction.clear_int();
-        }
+static void ResampleLowQuality(std::span<s32> output, std::span<const s16> input, const Common::FixedPoint<49, 15>& sample_rate_ratio, Common::FixedPoint<49, 15>& fraction, const u32 samples_to_write) {
+    u32 read_index{0};
+    for (u32 i = 0; i < samples_to_write; i++) {
+        output[i] = input[read_index + (fraction >= 0.5f)];
+        fraction += sample_rate_ratio;
+        read_index += u32(fraction.to_int_floor());
+        fraction.clear_int();
     }
 }
 
@@ -295,7 +290,7 @@ static void ResampleNormalQuality(std::span<s32> output, std::span<const s16> in
     auto lut{get_lut()};
     u32 read_index{0};
     for (u32 i = 0; i < samples_to_write; i++) {
-        const auto lut_index{(fraction.get_frac() >> 8) * 4};
+        const auto lut_index = ((fraction.get_frac() >> 8) << 2) & 511;
         const Common::FixedPoint<56, 8> sample0{input[read_index + 0] * lut[lut_index + 0]};
         const Common::FixedPoint<56, 8> sample1{input[read_index + 1] * lut[lut_index + 1]};
         const Common::FixedPoint<56, 8> sample2{input[read_index + 2] * lut[lut_index + 2]};
@@ -845,7 +840,7 @@ static void ResampleHighQuality(std::span<s32> output, std::span<const s16> inpu
     auto lut{get_lut()};
     u32 read_index{0};
     for (u32 i = 0; i < samples_to_write; i++) {
-        const auto lut_index{(fraction.get_frac() >> 8) * 8};
+        const auto lut_index = ((fraction.get_frac() >> 8) << 3) & 1023;
         const Common::FixedPoint<56, 8> sample0{input[read_index + 0] * lut[lut_index + 0]};
         const Common::FixedPoint<56, 8> sample1{input[read_index + 1] * lut[lut_index + 1]};
         const Common::FixedPoint<56, 8> sample2{input[read_index + 2] * lut[lut_index + 2]};

src/common/CMakeLists.txt

@@ -121,6 +121,8 @@ add_library(
     swap.h
     thread.cpp
     thread.h
+    adpf.cpp
+    adpf.h
     thread_queue_list.h
     thread_worker.h
     threadsafe_queue.h
@@ -218,7 +220,7 @@ endif()
 if(CXX_CLANG)
     target_compile_options(common PRIVATE
         $<$<COMPILE_LANGUAGE:C,CXX>:-fsized-deallocation>
-        $<$<COMPILE_LANGUAGE:C,CXX>:-Werror=unreachable-code-aggressive>)
+        $<$<COMPILE_LANGUAGE:C,CXX>:-Wunreachable-code-aggressive>)
     target_compile_definitions(
         common
         PRIVATE

src/common/adpf.cpp

@@ -0,0 +1,317 @@
+// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project
+// SPDX-License-Identifier: GPL-3.0-or-later
+
+#include "common/adpf.h"
+
+#ifdef __ANDROID__
+
+#include <algorithm>
+#include <array>
+#include <atomic>
+#include <cstdint>
+#include <mutex>
+#include <vector>
+
+#include <dlfcn.h>
+#include <unistd.h>
+
+#include "common/logging.h"
+
+namespace Common::ADPF {
+
+namespace {
+
+constexpr std::chrono::nanoseconds DEFAULT_TARGET = std::chrono::nanoseconds{16'666'667};
+
+struct AHintManager;
+struct AHintSession;
+
+using PFN_GetManager = AHintManager* (*)();
+using PFN_CreateSession = AHintSession* (*)(AHintManager*, const s32*, size_t, s64);
+using PFN_CloseSession = void (*)(AHintSession*);
+using PFN_UpdateTarget = int (*)(AHintSession*, s64);
+using PFN_ReportActual = int (*)(AHintSession*, s64);
+using PFN_SetThreads = int (*)(AHintSession*, const pid_t*, size_t);
+using PFN_SetPowerEfficiency = int (*)(AHintSession*, bool);
+
+struct Api {
+    PFN_GetManager get_manager = nullptr;
+    PFN_CreateSession create_session = nullptr;
+    PFN_CloseSession close_session = nullptr;
+    PFN_UpdateTarget update_target = nullptr;
+    PFN_ReportActual report_actual = nullptr;
+    PFN_SetThreads set_threads = nullptr;
+    PFN_SetPowerEfficiency set_power_efficiency = nullptr;
+    AHintManager* manager = nullptr;
+    bool usable = false;
+};
+
+const Api& Resolve() {
+    static const Api api = [] {
+        Api resolved;
+        void* library = dlopen("libandroid.so", RTLD_NOW);
+        if (library == nullptr) {
+            LOG_INFO(Common, "libandroid.so unavailable, ADPF is disabled");
+            return resolved;
+        }
+        const auto load = [library](const char* name) { return dlsym(library, name); };
+
+        resolved.get_manager = reinterpret_cast<PFN_GetManager>(load("APerformanceHint_getManager"));
+        resolved.create_session =
+            reinterpret_cast<PFN_CreateSession>(load("APerformanceHint_createSession"));
+        resolved.close_session =
+            reinterpret_cast<PFN_CloseSession>(load("APerformanceHint_closeSession"));
+        resolved.update_target =
+            reinterpret_cast<PFN_UpdateTarget>(load("APerformanceHint_updateTargetWorkDuration"));
+        resolved.report_actual =
+            reinterpret_cast<PFN_ReportActual>(load("APerformanceHint_reportActualWorkDuration"));
+        resolved.set_threads =
+            reinterpret_cast<PFN_SetThreads>(load("APerformanceHint_setThreads"));
+        resolved.set_power_efficiency = reinterpret_cast<PFN_SetPowerEfficiency>(
+            load("APerformanceHint_setPreferPowerEfficiency"));
+
+        if (resolved.get_manager == nullptr || resolved.create_session == nullptr ||
+            resolved.close_session == nullptr || resolved.update_target == nullptr ||
+            resolved.report_actual == nullptr) {
+            LOG_INFO(Common, "Performance hint API not exported, ADPF is disabled");
+            return resolved;
+        }
+
+        resolved.manager = resolved.get_manager();
+        if (resolved.manager == nullptr) {
+            LOG_INFO(Common, "Device does not provide a performance hint manager");
+            return resolved;
+        }
+
+        resolved.usable = true;
+        LOG_INFO(Common, "ADPF available, setThreads {}, power efficiency {}",
+                 resolved.set_threads != nullptr ? "yes" : "no",
+                 resolved.set_power_efficiency != nullptr ? "yes" : "no");
+        return resolved;
+    }();
+    return api;
+}
+
+struct SessionState {
+    AHintSession* handle = nullptr;
+    std::vector<pid_t> threads;
+    bool unsupported = false;
+};
+
+std::mutex g_mutex;
+std::array<SessionState, 2> g_sessions;
+
+constexpr s64 MAX_REPORTED_TARGETS = 4;
+
+std::atomic<s64> g_target_ns{DEFAULT_TARGET.count()};
+thread_local std::chrono::steady_clock::time_point t_last_frame{};
+
+SessionState& StateOf(Session session) {
+    return g_sessions[static_cast<size_t>(session)];
+}
+
+bool IsBackgroundUsable(const Api& api) {
+    return api.set_power_efficiency != nullptr;
+}
+
+void CloseLocked(SessionState& state) {
+    if (state.handle != nullptr) {
+        Resolve().close_session(state.handle);
+        state.handle = nullptr;
+    }
+}
+
+AHintSession* CreateSessionFor(Session session, const std::vector<pid_t>& threads) {
+    const Api& api = Resolve();
+    const s64 target = session == Session::Render ? g_target_ns.load(std::memory_order_relaxed) : 0;
+
+    std::vector<s32> ids;
+    ids.reserve(threads.size());
+    for (const pid_t tid : threads) {
+        ids.push_back(static_cast<s32>(tid));
+    }
+
+    AHintSession* handle = api.create_session(api.manager, ids.data(), ids.size(), target);
+    if (handle == nullptr && target == 0) {
+        handle = api.create_session(api.manager, ids.data(), ids.size(), DEFAULT_TARGET.count());
+    }
+    if (handle == nullptr) {
+        return nullptr;
+    }
+    if (session == Session::Background && api.set_power_efficiency != nullptr) {
+        api.set_power_efficiency(handle, true);
+    }
+    return handle;
+}
+
+bool SyncLocked(Session session, SessionState& state) {
+    if (state.threads.empty()) {
+        CloseLocked(state);
+        return false;
+    }
+
+    const Api& api = Resolve();
+    if (state.handle != nullptr && api.set_threads != nullptr) {
+        std::vector<pid_t> ids = state.threads;
+        if (api.set_threads(state.handle, ids.data(), ids.size()) == 0) {
+            return true;
+        }
+    }
+
+    AHintSession* const replacement = CreateSessionFor(session, state.threads);
+    if (replacement == nullptr) {
+        if (state.handle == nullptr) {
+            state.unsupported = true;
+        }
+        LOG_WARNING(Common, "Could not open a performance hint session for {} threads, falling back",
+                    state.threads.size());
+        return false;
+    }
+    CloseLocked(state);
+    state.handle = replacement;
+    return true;
+}
+
+} // Anonymous namespace
+
+bool IsSessionSupported(Session session) {
+    const Api& api = Resolve();
+    if (!api.usable) {
+        return false;
+    }
+    if (session == Session::Background && !IsBackgroundUsable(api)) {
+        return false;
+    }
+    std::scoped_lock lock{g_mutex};
+    return !StateOf(session).unsupported;
+}
+
+bool AddCurrentThread(Session session) {
+    if (!IsSessionSupported(session)) {
+        return false;
+    }
+
+    const pid_t tid = gettid();
+    std::scoped_lock lock{g_mutex};
+
+    for (size_t i = 0; i < g_sessions.size(); ++i) {
+        SessionState& state = g_sessions[i];
+        if (static_cast<size_t>(session) == i) {
+            continue;
+        }
+        const auto it = std::find(state.threads.begin(), state.threads.end(), tid);
+        if (it != state.threads.end()) {
+            state.threads.erase(it);
+            SyncLocked(static_cast<Session>(i), state);
+        }
+    }
+
+    SessionState& state = StateOf(session);
+    const bool added =
+        std::find(state.threads.begin(), state.threads.end(), tid) == state.threads.end();
+    if (added) {
+        state.threads.push_back(tid);
+    }
+    if (!SyncLocked(session, state)) {
+        if (added) {
+            std::erase(state.threads, tid);
+        }
+        return false;
+    }
+    return true;
+}
+
+void RemoveCurrentThread() {
+    if (!Resolve().usable) {
+        return;
+    }
+    const pid_t tid = gettid();
+    std::scoped_lock lock{g_mutex};
+    for (size_t i = 0; i < g_sessions.size(); ++i) {
+        SessionState& state = g_sessions[i];
+        if (std::erase(state.threads, tid) != 0) {
+            SyncLocked(static_cast<Session>(i), state);
+        }
+    }
+}
+
+void SetTargetWorkDuration(std::chrono::nanoseconds target) {
+    const Api& api = Resolve();
+    if (!api.usable || target.count() <= 0) {
+        return;
+    }
+    if (g_target_ns.exchange(target.count(), std::memory_order_relaxed) == target.count()) {
+        return;
+    }
+    std::scoped_lock lock{g_mutex};
+    SessionState& state = StateOf(Session::Render);
+    if (state.handle != nullptr) {
+        api.update_target(state.handle, target.count());
+    }
+}
+
+void ReportFrameInterval() {
+    const Api& api = Resolve();
+    if (!api.usable) {
+        return;
+    }
+
+    const auto now = std::chrono::steady_clock::now();
+    const auto previous = t_last_frame;
+    t_last_frame = now;
+    if (previous.time_since_epoch().count() == 0) {
+        return;
+    }
+
+    s64 actual = std::chrono::duration_cast<std::chrono::nanoseconds>(now - previous).count();
+    if (actual <= 0) {
+        return;
+    }
+
+    const s64 ceiling = g_target_ns.load(std::memory_order_relaxed) * MAX_REPORTED_TARGETS;
+    actual = (std::min)(actual, ceiling);
+
+    std::scoped_lock lock{g_mutex};
+    SessionState& state = StateOf(Session::Render);
+    if (state.handle != nullptr) {
+        api.report_actual(state.handle, actual);
+    }
+}
+
+void Shutdown() {
+    if (!Resolve().usable) {
+        return;
+    }
+    std::scoped_lock lock{g_mutex};
+    for (SessionState& state : g_sessions) {
+        CloseLocked(state);
+        state.threads.clear();
+        state.unsupported = false;
+    }
+}
+
+} // namespace Common::ADPF
+
+#else
+
+namespace Common::ADPF {
+
+bool IsSessionSupported(Session) {
+    return false;
+}
+
+bool AddCurrentThread(Session) {
+    return false;
+}
+
+void RemoveCurrentThread() {}
+
+void SetTargetWorkDuration(std::chrono::nanoseconds) {}
+
+void ReportFrameInterval() {}
+
+void Shutdown() {}
+
+} // namespace Common::ADPF
+
+#endif

src/common/adpf.h

@@ -0,0 +1,26 @@
+// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project
+// SPDX-License-Identifier: GPL-3.0-or-later
+
+#pragma once
+
+#include <chrono>
+
+namespace Common::ADPF {
+
+enum class Session {
+    Render,
+    Background,
+};
+
+bool IsSessionSupported(Session session);
+
+bool AddCurrentThread(Session session);
+void RemoveCurrentThread();
+
+void SetTargetWorkDuration(std::chrono::nanoseconds target);
+
+void ReportFrameInterval();
+
+void Shutdown();
+
+} // namespace Common::ADPF

src/common/settings.h

@@ -260,10 +260,10 @@ struct Values {
                                                     Category::Cpu};
     SwitchableSetting<CpuAccuracy, true> cpu_accuracy{linkage, CpuAccuracy::Auto,
                                                       "cpu_accuracy", Category::Cpu};
-    SwitchableSetting<CpuClock> fast_cpu_time{linkage,
-                                              CpuClock::Off,
+    SwitchableSetting<CpuClock> cpu_clock{linkage,
+                                              CpuClock::Normal,
                                               "fast_cpu_time",
-                                              Category::Cpu,
+                                              Category::System,
                                               Specialization::Default,
                                               true,
                                               true};
@@ -540,13 +540,13 @@ struct Values {
 #endif
 
     // Renderer Hacks //
-    SwitchableSetting<GpuOverclock> fast_gpu_time{linkage,
-                                                  GpuOverclock::Medium,
-                                                  "fast_gpu_time",
-                                                  Category::RendererHacks,
-                                                  Specialization::Default,
-                                                        true,
-                                                        true};
+    SwitchableSetting<GpuClock> gpu_clock{linkage,
+                                          GpuClock::Boost,
+                                          "fast_gpu_time",
+                                          Category::System,
+                                          Specialization::Default,
+                                          true,
+                                          true};
 
     SwitchableSetting<bool> skip_cpu_inner_invalidation{linkage,
                                                         false,
@@ -702,7 +702,15 @@ struct Values {
 
     // Controls
     InputSetting<std::array<PlayerInput, 10>> players;
-
+    Setting<bool> disable_wgi_xinput{
+        linkage, false, "disable_wgi_xinput", Category::Controls, Specialization::Default,
+// Only read/write disable_wgi_xinput on Windows platforms
+#ifdef _WIN32
+        true
+#else
+        false
+#endif
+    };
     Setting<bool> enable_raw_input{
         linkage, false, "enable_raw_input", Category::Controls, Specialization::Default,
 // Only read/write enable_raw_input on Windows platforms

src/common/settings_enums.h

@@ -140,7 +140,7 @@ ENUM(DmaAccuracy, Default, Unsafe, Safe);
 ENUM(GpuFenceBehavior, Default, Immediate, Balanced, Accurate, Strict);
 ENUM(CpuBackend, Dynarmic, Nce);
 ENUM(CpuAccuracy, Auto, Accurate, Unsafe, Paranoid, Debugging);
-ENUM(CpuClock, Off, Boost, Fast)
+ENUM(CpuClock, Normal, Boost, Overclock)
 ENUM(MemoryLayout, Memory_4Gb, Memory_6Gb, Memory_8Gb, Memory_10Gb, Memory_12Gb);
 ENUM(ConfirmStop, Ask_Always, Ask_Based_On_Game, Ask_Never);
 ENUM(FullscreenMode, Borderless, Exclusive);
@@ -152,7 +152,7 @@ ENUM(AspectRatio, R16_9, R4_3, R21_9, R16_10, Stretch);
 ENUM(ConsoleMode, Handheld, Docked);
 ENUM(AppletMode, HLE, LLE);
 ENUM(SpirvOptimizeMode, Never, OnLoad, Always);
-ENUM(GpuOverclock, Normal, Medium, High)
+ENUM(GpuClock, Normal, Boost, Overclock)
 ENUM(GpuUnswizzleSize, VerySmall, Small, Normal, Large, VeryLarge)
 ENUM(GpuUnswizzle, VeryLow, Low, Normal, Medium, High)
 ENUM(GpuUnswizzleChunk, VeryLow, Low, Normal, Medium, High)

src/common/thread.cpp

@@ -1,5 +1,6 @@
 // SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project
 // SPDX-License-Identifier: GPL-3.0-or-later
+
 // SPDX-FileCopyrightText: 2013 Dolphin Emulator Project
 // SPDX-FileCopyrightText: 2014 Citra Emulator Project
 // SPDX-License-Identifier: GPL-2.0-or-later
@@ -9,6 +10,7 @@
 #include <string>
 #include <thread>
 
+#include "common/adpf.h"
 #include "common/error.h"
 #include "common/logging.h"
 #include "common/assert.h"
@@ -39,6 +41,402 @@
 #include <unistd.h>
 #endif
 
+#ifdef __linux__
+#include <sys/resource.h>
+#include <algorithm>
+
+namespace {
+constexpr int NICE_AUDIO = -16;
+constexpr int NICE_URGENT_DISPLAY = -8;
+constexpr int NICE_DISPLAY = -4;
+constexpr int NICE_DEFAULT = 0;
+constexpr int NICE_BACKGROUND = 10;
+
+int LowestAllowedNice() {
+    static const int lowest = [] {
+        rlimit limit{};
+        if (getrlimit(RLIMIT_NICE, &limit) != 0) {
+            return 0;
+        }
+        if (limit.rlim_cur >= 40) {
+            return -20;
+        }
+        return 20 - static_cast<int>(limit.rlim_cur);
+    }();
+    return lowest;
+}
+
+int NiceValueForPriority(Common::ThreadPriority priority) {
+    const int wanted = [priority] {
+        switch (priority) {
+        case Common::ThreadPriority::Low: return NICE_BACKGROUND;
+        case Common::ThreadPriority::Normal: return NICE_DEFAULT;
+        case Common::ThreadPriority::High: return NICE_DISPLAY;
+        case Common::ThreadPriority::VeryHigh: return NICE_URGENT_DISPLAY;
+        case Common::ThreadPriority::Critical: return NICE_AUDIO;
+        default: return NICE_DEFAULT;
+        }
+    }();
+    return (std::max)(wanted, (std::min)(NICE_DEFAULT, LowestAllowedNice()));
+}
+} // Anonymous namespace
+#endif
+
+#ifdef __ANDROID__
+#include <sys/utsname.h>
+#include <atomic>
+#include <cerrno>
+#include <cstdio>
+#include <cstdlib>
+#include <cstring>
+#include <fstream>
+#include <mutex>
+#include <vector>
+
+namespace {
+constexpr size_t ANDROID_MINIMUM_PERFORMANCE_CORES = 4;
+
+// A core counts as a performance core while it is within this much of the fastest one.
+constexpr s64 ANDROID_PERFORMANCE_CAPACITY_PERCENT = 50;
+
+constexpr std::chrono::nanoseconds ANDROID_POLICY_POLL_INTERVAL = std::chrono::milliseconds{500};
+
+enum class CoreGroup {
+    Unrestricted,
+    Performance,
+    Efficiency,
+};
+
+struct ThreadPolicy {
+    pid_t tid;
+    CoreGroup group;
+    s32 nice_value;
+    bool has_nice;
+};
+
+struct CoreInfo {
+    s64 weight;
+    u64 midr;
+    s32 cpu;
+};
+
+struct CpuTopologyState {
+    std::mutex topology_mutex;
+    cpu_set_t allowed{};
+    cpu_set_t performance{};
+    cpu_set_t efficiency{};
+    bool separated = false;
+    bool initialized = false;
+
+    pid_t canary_tid = 0;
+    cpu_set_t canary_mask{};
+    bool canary_valid = false;
+
+    std::atomic<s64> next_poll_ns{0};
+
+    std::mutex policy_mutex;
+    std::vector<ThreadPolicy> policies;
+};
+
+CpuTopologyState& State() {
+    static CpuTopologyState* const state = new CpuTopologyState();
+    return *state;
+}
+
+struct PolicyRegistration {
+    ~PolicyRegistration() {
+        const pid_t tid = gettid();
+        ::Common::ADPF::RemoveCurrentThread();
+        CpuTopologyState& state = State();
+        std::scoped_lock lock{state.policy_mutex};
+        std::erase_if(state.policies,
+                      [tid](const ThreadPolicy& policy) { return policy.tid == tid; });
+    }
+};
+
+thread_local PolicyRegistration t_policy_registration;
+
+s32 PossibleCpuCount() {
+    std::ifstream file("/sys/devices/system/cpu/possible");
+    std::string list;
+    if (file && std::getline(file, list) && !list.empty()) {
+        s64 highest = -1;
+        const char* cursor = list.c_str();
+        while (*cursor != '\0') {
+            char* end = nullptr;
+            const s64 value = std::strtol(cursor, &end, 10);
+            if (end == cursor) {
+                break;
+            }
+            highest = (std::max)(highest, value);
+            cursor = end;
+            while (*cursor == '-' || *cursor == ',') {
+                ++cursor;
+            }
+        }
+        if (highest >= 0) {
+            return static_cast<s32>((std::min<s64>)(highest + 1, CPU_SETSIZE));
+        }
+    }
+    const s64 configured = sysconf(_SC_NPROCESSORS_CONF);
+    if (configured > 0) {
+        return static_cast<s32>((std::min<s64>)(configured, CPU_SETSIZE));
+    }
+    return static_cast<s32>((std::min<s64>)(std::thread::hardware_concurrency(), CPU_SETSIZE));
+}
+
+s64 ReadCpuScalar(s32 cpu, const char* node) {
+    s64 value = 0;
+    std::ifstream file("/sys/devices/system/cpu/cpu" + std::to_string(cpu) + "/" + node);
+    if (!file || !(file >> value) || value <= 0) {
+        return 0;
+    }
+    return value;
+}
+
+u64 ReadCpuMidr(s32 cpu) {
+    u64 midr = 0;
+    std::ifstream file("/sys/devices/system/cpu/cpu" + std::to_string(cpu) +
+                       "/regs/identification/midr_el1");
+    if (!file || !(file >> std::hex >> midr)) {
+        return 0;
+    }
+    return midr;
+}
+
+std::vector<CoreInfo> CollectCores(const cpu_set_t& allowed, s32 total, const char* node,
+                                   bool require_all) {
+    std::vector<CoreInfo> cores;
+    for (s32 cpu = 0; cpu < total; ++cpu) {
+        if (!CPU_ISSET(cpu, &allowed)) {
+            continue;
+        }
+        const s64 weight = ReadCpuScalar(cpu, node);
+        if (weight <= 0) {
+            if (require_all) {
+                return {};
+            }
+            LOG_WARNING(Common, "Could not read {} for CPU {}, treating it as an efficiency core",
+                        node, cpu);
+            continue;
+        }
+        cores.push_back(CoreInfo{weight, ReadCpuMidr(cpu), cpu});
+    }
+    return cores;
+}
+
+bool WeightsAreUniform(const std::vector<CoreInfo>& cores) {
+    return std::all_of(cores.begin(), cores.end(),
+                       [&](const CoreInfo& core) { return core.weight == cores.front().weight; });
+}
+
+bool MidrsAreDistinct(const std::vector<CoreInfo>& cores) {
+    return std::none_of(cores.begin(), cores.end(),
+                        [](const CoreInfo& core) { return core.midr == 0; }) &&
+           std::any_of(cores.begin(), cores.end(),
+                       [&](const CoreInfo& core) { return core.midr != cores.front().midr; });
+}
+
+void ComputeTopologyLocked(CpuTopologyState& state) {
+    state.initialized = true;
+    state.separated = false;
+    CPU_ZERO(&state.allowed);
+    CPU_ZERO(&state.performance);
+    CPU_ZERO(&state.efficiency);
+
+    if (sched_getaffinity(getpid(), sizeof(state.allowed), &state.allowed) != 0) {
+        LOG_WARNING(Common, "Could not query process CPU affinity: {}",
+                    ::Common::GetLastErrorMsg());
+        return;
+    }
+
+    const s32 total = PossibleCpuCount();
+    auto cores = CollectCores(state.allowed, total, "cpu_capacity", true);
+    if (cores.empty() || (WeightsAreUniform(cores) && MidrsAreDistinct(cores))) {
+        auto by_frequency = CollectCores(state.allowed, total, "cpufreq/cpuinfo_max_freq", false);
+        if (!by_frequency.empty()) {
+            cores = std::move(by_frequency);
+        }
+    }
+    if (cores.empty()) {
+        LOG_WARNING(Common, "Could not determine CPU topology, thread placement is disabled");
+        return;
+    }
+
+    if (WeightsAreUniform(cores)) {
+        if (MidrsAreDistinct(cores)) {
+            LOG_WARNING(Common, "CPU clusters differ but rank identically, thread placement is "
+                                "disabled");
+        } else {
+            LOG_INFO(Common, "CPU cores are symmetric, thread placement is disabled");
+        }
+        return;
+    }
+
+    std::sort(cores.begin(), cores.end(), [](const CoreInfo& lhs, const CoreInfo& rhs) {
+        if (lhs.weight != rhs.weight) {
+            return lhs.weight > rhs.weight;
+        }
+        return lhs.cpu < rhs.cpu;
+    });
+
+    const s64 fastest = cores.front().weight;
+    size_t taken = 0;
+    for (const auto& core : cores) {
+        const bool fast_enough =
+            core.weight * 100 >= fastest * ANDROID_PERFORMANCE_CAPACITY_PERCENT;
+        if (!fast_enough && taken >= ANDROID_MINIMUM_PERFORMANCE_CORES) {
+            break;
+        }
+        CPU_SET(core.cpu, &state.performance);
+        ++taken;
+    }
+    if (taken == 0) {
+        return;
+    }
+
+    for (s32 cpu = 0; cpu < total; ++cpu) {
+        if (CPU_ISSET(cpu, &state.allowed) && !CPU_ISSET(cpu, &state.performance)) {
+            CPU_SET(cpu, &state.efficiency);
+        }
+    }
+
+    state.separated = CPU_COUNT(&state.efficiency) > 0;
+    LOG_INFO(Common, "CPU topology: {} performance cores, {} efficiency cores, separation {}",
+             CPU_COUNT(&state.performance), CPU_COUNT(&state.efficiency),
+             state.separated ? "enabled" : "unavailable");
+}
+
+void EnsureTopologyLocked(CpuTopologyState& state) {
+    if (!state.initialized) {
+        ComputeTopologyLocked(state);
+    }
+}
+
+void RefreshTopologyLocked(CpuTopologyState& state) {
+    if (!state.initialized) {
+        ComputeTopologyLocked(state);
+        return;
+    }
+    cpu_set_t current;
+    CPU_ZERO(&current);
+    if (sched_getaffinity(getpid(), sizeof(current), &current) != 0) {
+        return;
+    }
+    if (std::memcmp(&current, &state.allowed, sizeof(current)) != 0) {
+        ComputeTopologyLocked(state);
+    }
+}
+
+bool ApplyCoreGroupLocked(CpuTopologyState& state, pid_t tid, CoreGroup group,
+                          bool* gone = nullptr) {
+    const bool restrict_group = group != CoreGroup::Unrestricted && state.separated;
+    const cpu_set_t* mask = &state.allowed;
+    if (restrict_group) {
+        mask = group == CoreGroup::Performance ? &state.performance : &state.efficiency;
+    }
+    if (CPU_COUNT(mask) == 0) {
+        return false;
+    }
+    if (sched_setaffinity(tid, sizeof(*mask), mask) != 0) {
+        if (gone != nullptr && errno == ESRCH) {
+            *gone = true;
+            return false;
+        }
+        LOG_WARNING(Common, "Could not restrict thread {} to its core group: {}", tid,
+                    ::Common::GetLastErrorMsg());
+        return false;
+    }
+    return true;
+}
+
+bool KernelPreservesRequestedAffinity() {
+    utsname info{};
+    if (uname(&info) != 0) {
+        return false;
+    }
+    s32 major = 0;
+    s32 minor = 0;
+    if (std::sscanf(info.release, "%d.%d", &major, &minor) != 2) {
+        return false;
+    }
+    return major > 6 || (major == 6 && minor >= 2);
+}
+
+void SnapshotCanaryLocked(CpuTopologyState& state) {
+    state.canary_valid = false;
+    if (!state.separated) {
+        return;
+    }
+    for (const auto& policy : state.policies) {
+        if (policy.group == CoreGroup::Unrestricted) {
+            continue;
+        }
+        cpu_set_t mask;
+        CPU_ZERO(&mask);
+        if (sched_getaffinity(policy.tid, sizeof(mask), &mask) != 0) {
+            continue;
+        }
+        state.canary_tid = policy.tid;
+        state.canary_mask = mask;
+        state.canary_valid = true;
+        return;
+    }
+}
+
+bool DueForPoll(CpuTopologyState& state) {
+    const auto now = std::chrono::steady_clock::now().time_since_epoch();
+    const s64 now_ns = std::chrono::duration_cast<std::chrono::nanoseconds>(now).count();
+    s64 next = state.next_poll_ns.load(std::memory_order_relaxed);
+    if (now_ns < next) {
+        return false;
+    }
+    return state.next_poll_ns.compare_exchange_strong(
+        next, now_ns + ANDROID_POLICY_POLL_INTERVAL.count(), std::memory_order_relaxed);
+}
+
+ThreadPolicy& AcquirePolicyLocked(CpuTopologyState& state, pid_t tid) {
+    for (auto& policy : state.policies) {
+        if (policy.tid == tid) {
+            return policy;
+        }
+    }
+    return state.policies.emplace_back(ThreadPolicy{tid, CoreGroup::Unrestricted, 0, false});
+}
+
+void SetCurrentThreadCoreGroup(CoreGroup group) {
+    const pid_t tid = gettid();
+    (void)&t_policy_registration;
+
+    CoreGroup effective = group;
+    if (tid == getpid() && group != CoreGroup::Unrestricted) {
+        LOG_WARNING(Common, "Refusing to place the main thread: the CPU topology is read from it");
+        effective = CoreGroup::Unrestricted;
+    }
+
+    CpuTopologyState& state = State();
+    std::scoped_lock topology_lock{state.topology_mutex};
+    EnsureTopologyLocked(state);
+    ApplyCoreGroupLocked(state, tid, effective);
+
+    std::scoped_lock policy_lock{state.policy_mutex};
+    AcquirePolicyLocked(state, tid).group = effective;
+    if (!state.canary_valid) {
+        SnapshotCanaryLocked(state);
+    }
+}
+
+void RememberCurrentThreadNice(pid_t tid, s32 nice_value) {
+    (void)&t_policy_registration;
+    CpuTopologyState& state = State();
+    std::scoped_lock lock{state.policy_mutex};
+    ThreadPolicy& policy = AcquirePolicyLocked(state, tid);
+    policy.nice_value = nice_value;
+    policy.has_nice = true;
+}
+} // Anonymous namespace
+#endif
+
 #include "common/cpu_features.h"
 #ifdef ARCHITECTURE_x86_64
 #ifdef _MSC_VER
@@ -48,7 +446,6 @@
 #endif
 #include "common/x64/rdtsc.h"
 #endif
-#include "core/core_timing.h"
 
 namespace Common {
 
@@ -78,21 +475,31 @@ void SetCurrentThreadPriority(ThreadPriority new_priority) {
         }
     }();
     set_thread_priority(find_thread(NULL), priority);
-#else
-    pthread_t this_thread = pthread_self();
-    const auto scheduling_type = SCHED_OTHER;
-    s32 max_prio = sched_get_priority_max(scheduling_type);
-    s32 min_prio = sched_get_priority_min(scheduling_type);
-    u32 level = (std::max)(u32(new_priority) + 1, 4U);
-
-    struct sched_param params;
-    if (max_prio > min_prio) {
-        params.sched_priority = min_prio + ((max_prio - min_prio) * level) / 4;
-    } else {
-        params.sched_priority = min_prio - ((min_prio - max_prio) * level) / 4;
+#elif defined(__ANDROID__)
+    const int nice_value = NiceValueForPriority(new_priority);
+    const pid_t tid = gettid();
+    if (setpriority(PRIO_PROCESS, static_cast<id_t>(tid), nice_value) != 0) {
+        LOG_WARNING(Common, "Could not set thread nice value to {}: {}", nice_value,
+                    GetLastErrorMsg());
+        return;
+    }
+    RememberCurrentThreadNice(tid, nice_value);
+#elif defined(__linux__)
+    const int nice_value = NiceValueForPriority(new_priority);
+    if (setpriority(PRIO_PROCESS, 0, nice_value) != 0) {
+        LOG_DEBUG(Common, "Could not set thread nice value to {}: {}", nice_value,
+                  GetLastErrorMsg());
+    }
+#else
+    const s32 max_prio = sched_get_priority_max(SCHED_OTHER);
+    const s32 min_prio = sched_get_priority_min(SCHED_OTHER);
+    if (max_prio > min_prio) {
+        const u32 level = (std::min)(static_cast<u32>(new_priority), 4U);
+        sched_param params{};
+        params.sched_priority =
+            min_prio + static_cast<s32>(static_cast<u32>(max_prio - min_prio) * level) / 4;
+        pthread_setschedparam(pthread_self(), SCHED_OTHER, &params);
     }
-
-    pthread_setschedparam(this_thread, scheduling_type, &params);
 #endif
 }
 
@@ -132,29 +539,94 @@ void SetCurrentThreadName(const char* name) {
 #endif
 }
 
-void PinCurrentThreadToPerformanceCore(size_t core_id) {
-    ASSERT(core_id < 4);
-    // If we set a flag for a CPU that doesn't exist, the thread may not be allowed to
-    // run in ANY processor!
-    auto const total_cores = std::thread::hardware_concurrency();
-    if (core_id < total_cores) {
+void SetCurrentThreadToPerformanceCores() {
 #if defined(__ANDROID__)
-        cpu_set_t set;
-        CPU_ZERO(&set);
-        CPU_SET(core_id, &set);
-        sched_setaffinity(pthread_self(), sizeof(set), &set);
-#elif defined(__linux__) || defined(__FreeBSD__)
-        cpu_set_t set;
-        CPU_ZERO(&set);
-        CPU_SET(core_id, &set);
-        pthread_setaffinity_np(pthread_self(), sizeof(set), &set);
-#elif defined(_WIN32)
-        DWORD set = 1UL << core_id;
-        SetThreadAffinityMask(GetCurrentThread(), set);
-#else
-        // No pin functionality implemented
-#endif
+    if (ADPF::AddCurrentThread(ADPF::Session::Render)) {
+        SetCurrentThreadCoreGroup(CoreGroup::Unrestricted);
+        return;
     }
+    SetCurrentThreadCoreGroup(CoreGroup::Performance);
+#endif
+}
+
+void SetCurrentThreadToEfficiencyCores() {
+#if defined(__ANDROID__)
+    if (ADPF::AddCurrentThread(ADPF::Session::Background)) {
+        SetCurrentThreadCoreGroup(CoreGroup::Unrestricted);
+        return;
+    }
+    SetCurrentThreadCoreGroup(CoreGroup::Efficiency);
+#endif
+}
+
+void SetCurrentThreadToBackgroundWork() {
+#if defined(__ANDROID__)
+    ADPF::AddCurrentThread(ADPF::Session::Background);
+    SetCurrentThreadCoreGroup(CoreGroup::Unrestricted);
+#endif
+}
+
+void SetCurrentThreadToAllCores() {
+#if defined(__ANDROID__)
+    ADPF::RemoveCurrentThread();
+    SetCurrentThreadCoreGroup(CoreGroup::Unrestricted);
+#endif
+}
+
+void RefreshThreadPolicies() {
+#if defined(__ANDROID__)
+    CpuTopologyState& state = State();
+    std::scoped_lock topology_lock{state.topology_mutex};
+    RefreshTopologyLocked(state);
+
+    std::scoped_lock policy_lock{state.policy_mutex};
+    std::erase_if(state.policies, [&state](const ThreadPolicy& policy) {
+        bool gone = false;
+        if (policy.has_nice &&
+            setpriority(PRIO_PROCESS, static_cast<id_t>(policy.tid), policy.nice_value) != 0 &&
+            errno == ESRCH) {
+            gone = true;
+        }
+        if (!gone) {
+            ApplyCoreGroupLocked(state, policy.tid, policy.group, &gone);
+        }
+        return gone;
+    });
+    SnapshotCanaryLocked(state);
+#endif
+}
+
+void PollThreadPolicies() {
+#if defined(__ANDROID__)
+    static const bool needed = !KernelPreservesRequestedAffinity();
+    if (!needed) {
+        return;
+    }
+
+    CpuTopologyState& state = State();
+    if (!DueForPoll(state)) {
+        return;
+    }
+
+    pid_t tid;
+    cpu_set_t expected;
+    {
+        std::scoped_lock lock{state.topology_mutex};
+        if (!state.canary_valid) {
+            return;
+        }
+        tid = state.canary_tid;
+        expected = state.canary_mask;
+    }
+
+    cpu_set_t current;
+    CPU_ZERO(&current);
+    if (sched_getaffinity(tid, sizeof(current), &current) == 0 &&
+        std::memcmp(&current, &expected, sizeof(current)) == 0) {
+        return;
+    }
+    RefreshThreadPolicies();
+#endif
 }
 
 #ifdef ARCHITECTURE_x86_64

src/common/thread.h

@@ -99,8 +99,20 @@ enum class ThreadPriority : u32 {
     Critical = 4,
 };
 
+enum class ThreadPlacement : u32 {
+    Default = 0,
+    Background = 1,
+    Efficiency = 2,
+};
+
 void SetCurrentThreadPriority(ThreadPriority new_priority);
 void SetCurrentThreadName(const char* name);
-void PinCurrentThreadToPerformanceCore(size_t core_id);
+void SetCurrentThreadToPerformanceCores();
+void SetCurrentThreadToEfficiencyCores();
+void SetCurrentThreadToBackgroundWork();
+void SetCurrentThreadToAllCores();
+
+void RefreshThreadPolicies();
+void PollThreadPolicies();
 
 } // namespace Common

src/common/thread_worker.h

@@ -1,4 +1,4 @@
-// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project
+// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project
 // SPDX-License-Identifier: GPL-3.0-or-later
 
 // SPDX-FileCopyrightText: Copyright 2020 yuzu Emulator Project
@@ -37,10 +37,25 @@ class StatefulThreadWorker {
     using StateMaker = std::conditional_t<with_state, std::function<StateType()>, DummyCallable>;
 
 public:
-    explicit StatefulThreadWorker(size_t num_workers, std::string name, StateMaker func = {})
+    explicit StatefulThreadWorker(size_t num_workers, std::string name, StateMaker func = {},
+                                  ThreadPlacement placement = ThreadPlacement::Default)
         : workers_queued{num_workers}, thread_name{std::move(name)} {
-        const auto lambda = [this, func](std::stop_token stop_token) {
+        const auto lambda = [this, func, placement](std::stop_token stop_token) {
             Common::SetCurrentThreadName(thread_name.c_str());
+            if (placement != ThreadPlacement::Default) {
+                Common::SetCurrentThreadPriority(ThreadPriority::Low);
+            }
+            switch (placement) {
+            case ThreadPlacement::Efficiency:
+                Common::SetCurrentThreadToEfficiencyCores();
+                break;
+            case ThreadPlacement::Background:
+                Common::SetCurrentThreadToBackgroundWork();
+                break;
+            default:
+                Common::SetCurrentThreadToAllCores();
+                break;
+            }
             {
                 [[maybe_unused]] std::conditional_t<with_state, StateType, int> state{func()};
                 while (!stop_token.stop_requested()) {

src/common/uuid.cpp

@@ -208,4 +208,12 @@ UUID UUID::MakeRandomRFC4122V4() {
     return uuid;
 }
 
+UUID UUID::MakeRFC4122V5(std::span<u8, 20> sha1) {
+    UUID uuid{};
+    std::memcpy(&uuid.uuid, sha1.data(), sizeof(UUID));
+    uuid.uuid[8] = 0x80 | (uuid.uuid[8] & 0x3F);
+    uuid.uuid[6] = 0x50 | (uuid.uuid[6] & 0xF);
+    return uuid;
+}
+
 } // namespace Common

src/common/uuid.h

@@ -1,3 +1,6 @@
+// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project
+// SPDX-License-Identifier: GPL-3.0-or-later
+
 // SPDX-FileCopyrightText: Copyright 2022 yuzu Emulator Project
 // SPDX-License-Identifier: GPL-2.0-or-later
 
@@ -5,6 +8,7 @@
 
 #include <array>
 #include <functional>
+#include <span>
 #include <string>
 
 #include "common/common_types.h"
@@ -86,28 +90,20 @@ struct UUID {
         };
     }
 
-    /**
-     * Creates a random UUID.
-     *
-     * @returns A random UUID.
-     */
-    static UUID MakeRandom();
+    /// @brief Creates a random UUID.
+    /// @returns A random UUID.
+    [[nodiscard]] static UUID MakeRandom();
 
-    /**
-     * Creates a random UUID with a seed.
-     *
-     * @param seed A seed to initialize the Mersenne-Twister RNG
-     *
-     * @returns A random UUID.
-     */
-    static UUID MakeRandomWithSeed(u32 seed);
+    /// @brief Creates a random UUID with a seed.
+    /// @param seed A seed to initialize the Mersenne-Twister RNG
+    /// @returns A random UUID.
+    [[nodiscard]] static UUID MakeRandomWithSeed(u32 seed);
 
-    /**
-     * Creates a random UUID. The generated UUID is RFC 4122 Version 4 compliant.
-     *
-     * @returns A random UUID that is RFC 4122 Version 4 compliant.
-     */
-    static UUID MakeRandomRFC4122V4();
+    /// @brief Creates a random UUID. The generated UUID is RFC 4122 Version 4 compliant.
+    /// @returns A random UUID that is RFC 4122 Version 4 compliant.
+    [[nodiscard]] static UUID MakeRandomRFC4122V4();
+
+    [[nodiscard]] static UUID MakeRFC4122V5(std::span<u8, 20> sha1);
 
     friend constexpr bool operator==(const UUID& lhs, const UUID& rhs) = default;
 };

src/core/CMakeLists.txt

@@ -1173,7 +1173,7 @@ add_library(core STATIC
 
 if (ENABLE_WIFI_SCAN)
     target_sources(core PRIVATE internal_network/wifi_scanner.cpp)
-    if (PLATFORM_LINUX)
+    if (LINUX)
         target_link_libraries(core PRIVATE iw)
     endif()
 else()
@@ -1199,7 +1199,7 @@ if (MSVC)
     )
 else()
     target_compile_options(core PRIVATE
-        $<$<COMPILE_LANGUAGE:C,CXX>:-Werror=conversion>
+        $<$<COMPILE_LANGUAGE:C,CXX>:-Wconversion>
         $<$<COMPILE_LANGUAGE:C,CXX>:-Wno-sign-conversion>
         $<$<COMPILE_LANGUAGE:C,CXX>:-Wno-cast-function-type>
         $<$<CXX_COMPILER_ID:Clang>:-fsized-deallocation>)
@@ -1251,7 +1251,7 @@ if (HAS_NCE)
     target_link_libraries(core PRIVATE merry::oaknut)
 endif()
 
-if (ARCHITECTURE_x86_64 OR ARCHITECTURE_arm64 OR ARCHITECTURE_riscv64 OR ARCHITECTURE_loongarch64)
+if (ARCHITECTURE_x86_64 OR ARCHITECTURE_arm64 OR ARCHITECTURE_riscv64 OR ARCHITECTURE_powerpc64 OR ARCHITECTURE_powerpc64)
     target_sources(core PRIVATE
         arm/dynarmic/arm_dynarmic.h
         arm/dynarmic/arm_dynarmic_64.cpp

src/core/core.cpp

@@ -10,6 +10,7 @@
 #include "audio_core/audio_core.h"
 #include "common/fs/fs.h"
 #include "common/logging.h"
+#include "common/adpf.h"
 #include "common/settings.h"
 #include "common/settings_enums.h"
 #include "common/string_util.h"
@@ -385,6 +386,7 @@ struct System::Impl {
 
     void ShutdownMainProcess() {
         SetShuttingDown(true);
+        Common::ADPF::Shutdown();
 
         // Reset per-game flags
         Settings::values.use_squashed_iterated_blend = false;

src/core/core_timing.cpp

@@ -23,6 +23,21 @@ namespace Core::Timing {
 
 constexpr s64 MAX_SLICE_LENGTH = 10000;
 
+constexpr u32 CPU_CLOCK_BASE_MHZ = 1020;
+constexpr u32 CPU_CLOCK_BOOST_MHZ = 1734;
+constexpr u32 CPU_CLOCK_OVERCLOCK_MHZ = 2040;
+
+constexpr u32 CpuClockTargetMhz(Settings::CpuClock clock) {
+    switch (clock) {
+    case Settings::CpuClock::Boost:
+        return CPU_CLOCK_BOOST_MHZ;
+    case Settings::CpuClock::Overclock:
+        return CPU_CLOCK_OVERCLOCK_MHZ;
+    default:
+        return CPU_CLOCK_BASE_MHZ;
+    }
+}
+
 std::shared_ptr<EventType> CreateEvent(std::string name, TimedCallback&& callback) {
     return std::make_shared<EventType>(std::move(callback), std::move(name));
 }
@@ -58,7 +73,8 @@ void CoreTiming::Initialize(std::function<void()>&& on_thread_init_) {
     if (is_multicore) {
         timer_thread = std::jthread([this](std::stop_token stop_token) {
             Common::SetCurrentThreadName("HostTiming");
-            Common::SetCurrentThreadPriority(Common::ThreadPriority::High);
+            Common::SetCurrentThreadPriority(Common::ThreadPriority::VeryHigh);
+            Common::SetCurrentThreadToPerformanceCores();
             on_thread_init();
             has_started = true;
 
@@ -209,8 +225,9 @@ void CoreTiming::ResetTicks() {
 
 u64 CoreTiming::GetClockTicks() const {
     u64 fres = is_multicore ? Common::g_wall_clock.GetCNTPCT() : Common::WallClock::CPUTickToCNTPCT(cpu_ticks);
-    if (auto const overclock = Settings::values.fast_cpu_time.GetValue(); overclock != Settings::CpuClock::Off) {
-        fres = u64(f64(fres) * (1.7 + 0.3 * u32(overclock)));
+    if (const u32 target = CpuClockTargetMhz(Settings::values.cpu_clock.GetValue());
+        target != CPU_CLOCK_BASE_MHZ) {
+        fres = fres * target / CPU_CLOCK_BASE_MHZ;
     }
     if (::Settings::values.sync_core_speed.GetValue()) {
         auto const ticks = f64(fres);

src/core/cpu_manager.cpp

@@ -174,12 +174,7 @@ void CpuManager::RunThread(std::stop_token token, std::size_t core) {
     std::string name = is_multicore ? ("CPUCore_" + std::to_string(core)) : std::string{"CPUThread"};
     Common::SetCurrentThreadName(name.c_str());
     Common::SetCurrentThreadPriority(Common::ThreadPriority::Critical);
-#ifdef __ANDROID__
-    // Aimed specifically for Snapdragon 8 Elite devices
-    // This kills performance on desktop, but boosts perf for UMA devices
-    // like the S8E. Mediatek and Mali likely won't suffer.
-    Common::PinCurrentThreadToPerformanceCore(core);
-#endif
+    Common::SetCurrentThreadToPerformanceCores();
     auto& data = core_data[core];
     data.host_context = Common::Fiber::ThreadToFiber();
 

src/core/file_sys/control_metadata.h

@@ -274,23 +274,22 @@ public:
     explicit NACP(VirtualFile file);
     ~NACP();
 
-    const LanguageEntry& GetLanguageEntry() const;
-    std::string GetApplicationName() const;
-    std::string GetDeveloperName() const;
-    u64 GetTitleId() const;
-    u64 GetDLCBaseTitleId() const;
-    std::string GetVersionString() const;
-    u64 GetDefaultNormalSaveSize() const;
-    u64 GetDefaultJournalSaveSize() const;
-    u32 GetSupportedLanguages() const;
-    std::vector<std::string> GetApplicationNames() const;
-    std::vector<u8> GetRawBytes() const;
-    bool GetUserAccountSwitchLock() const;
-    u64 GetDeviceSaveDataSize() const;
-    u32 GetParentalControlFlag() const;
-    const std::array<u8, 0x20>& GetRatingAge() const;
+    [[nodiscard]] const LanguageEntry& GetLanguageEntry() const;
+    [[nodiscard]] std::string GetApplicationName() const;
+    [[nodiscard]] std::string GetDeveloperName() const;
+    [[nodiscard]] u64 GetTitleId() const;
+    [[nodiscard]] u64 GetDLCBaseTitleId() const;
+    [[nodiscard]] std::string GetVersionString() const;
+    [[nodiscard]] u64 GetDefaultNormalSaveSize() const;
+    [[nodiscard]] u64 GetDefaultJournalSaveSize() const;
+    [[nodiscard]] u32 GetSupportedLanguages() const;
+    [[nodiscard]] std::vector<std::string> GetApplicationNames() const;
+    [[nodiscard]] std::vector<u8> GetRawBytes() const;
+    [[nodiscard]] bool GetUserAccountSwitchLock() const;
+    [[nodiscard]] u64 GetDeviceSaveDataSize() const;
+    [[nodiscard]] u32 GetParentalControlFlag() const;
+    [[nodiscard]] const std::array<u8, 0x20>& GetRatingAge() const;
 
-private:
     RawNACP raw{};
     std::vector<LanguageEntry> language_entries;
 };

src/core/file_sys/patch_manager.cpp

@@ -1156,4 +1156,14 @@ PatchManager::Metadata PatchManager::ParseControlNCA(const NCA& nca) const {
 
     return {std::move(nacp), icon_file};
 }
+
+[[nodiscard]] PatchManager::Metadata PatchManager::GetMetadataFromBaseOrUpdate(Core::System& system, u64 application_id) noexcept {
+    const FileSys::PatchManager pm{application_id, system.GetFileSystemController(), system.GetContentProvider()};
+    auto metadata = pm.GetControlMetadata();
+    if (metadata.first != nullptr)
+        return metadata;
+    const FileSys::PatchManager pm_update{FileSys::GetUpdateTitleID(application_id), system.GetFileSystemController(), system.GetContentProvider()};
+    return pm_update.GetControlMetadata();
+}
+
 } // namespace FileSys

src/core/file_sys/patch_manager.h

@@ -105,6 +105,9 @@ public:
     // Version of GetControlMetadata that takes an arbitrary NCA
     [[nodiscard]] Metadata ParseControlNCA(const NCA& nca) const;
 
+    /// @brief Gets NACP metadata (accounting for any patches or updates)
+    [[nodiscard]] static PatchManager::Metadata GetMetadataFromBaseOrUpdate(Core::System& system, u64 application_id) noexcept;
+
 private:
     [[nodiscard]] std::vector<VirtualFile> CollectPatches(const std::vector<VirtualDir>& patch_dirs,
                                                           const std::string& build_id) const;

src/core/hle/kernel/svc/svc_synchronization.cpp

@@ -28,7 +28,7 @@ Result CloseHandle(Core::System& system, Handle handle) {
 
 /// Clears the signaled state of an event or process.
 Result ResetSignal(Core::System& system, Handle handle) {
-    LOG_DEBUG(Kernel_SVC, "called handle {:#08x}", handle);
+    LOG_TRACE(Kernel_SVC, "called handle {:#08x}", handle);
 
     // Get the current handle table.
     const auto& handle_table = GetCurrentProcess(system.Kernel()).GetHandleTable();

src/core/hle/service/am/service/application_functions.cpp

@@ -4,6 +4,8 @@
 // SPDX-FileCopyrightText: Copyright 2024 yuzu Emulator Project
 // SPDX-License-Identifier: GPL-2.0-or-later
 
+#include <openssl/evp.h>
+
 #include "common/settings.h"
 #include "common/uuid.h"
 #include "core/file_sys/control_metadata.h"
@@ -154,20 +156,7 @@ Result IApplicationFunctions::GetDesiredLanguage(Out<u64> out_language_code) {
     // Default to 0 (all languages supported)
     u32 supported_languages = 0;
 
-    const auto res = [this] {
-        const FileSys::PatchManager pm{m_applet->program_id, system.GetFileSystemController(),
-                                       system.GetContentProvider()};
-        auto metadata = pm.GetControlMetadata();
-        if (metadata.first != nullptr) {
-            return metadata;
-        }
-
-        const FileSys::PatchManager pm_update{FileSys::GetUpdateTitleID(m_applet->program_id),
-                                              system.GetFileSystemController(),
-                                              system.GetContentProvider()};
-        return pm_update.GetControlMetadata();
-    }();
-
+    const auto res = FileSys::PatchManager::GetMetadataFromBaseOrUpdate(system, m_applet->program_id);
     if (res.first != nullptr) {
         supported_languages = res.first->GetSupportedLanguages();
     }
@@ -205,20 +194,7 @@ Result IApplicationFunctions::SetTerminateResult(Result terminate_result) {
 Result IApplicationFunctions::GetDisplayVersion(Out<DisplayVersion> out_display_version) {
     LOG_DEBUG(Service_AM, "called");
 
-    const auto res = [this] {
-        const FileSys::PatchManager pm{m_applet->program_id, system.GetFileSystemController(),
-                                       system.GetContentProvider()};
-        auto metadata = pm.GetControlMetadata();
-        if (metadata.first != nullptr) {
-            return metadata;
-        }
-
-        const FileSys::PatchManager pm_update{FileSys::GetUpdateTitleID(m_applet->program_id),
-                                              system.GetFileSystemController(),
-                                              system.GetContentProvider()};
-        return pm_update.GetControlMetadata();
-    }();
-
+    const auto res = FileSys::PatchManager::GetMetadataFromBaseOrUpdate(system, m_applet->program_id);
     if (res.first != nullptr) {
         const auto& version = res.first->GetVersionString();
         std::memcpy(out_display_version->string.data(), version.data(),
@@ -347,8 +323,21 @@ Result IApplicationFunctions::NotifyRunning(Out<bool> out_became_running) {
 }
 
 Result IApplicationFunctions::GetPseudoDeviceId(Out<Common::UUID> out_pseudo_device_id) {
-    LOG_WARNING(Service_AM, "(STUBBED) called");
-    *out_pseudo_device_id = {};
+    LOG_WARNING(Service_AM, "(stubbed)");
+
+    // This should be hashed with the device specific hash
+    // for now this will do
+    const auto res = FileSys::PatchManager::GetMetadataFromBaseOrUpdate(system, m_applet->program_id);
+    u8 hash[EVP_MAX_MD_SIZE];
+    unsigned int hash_len = 0;
+    auto const seed = res.first->raw.seed_for_pseudo_device_id;
+    EVP_MD_CTX *ctx = EVP_MD_CTX_new();
+    auto const algorithm = EVP_sha1();
+    EVP_DigestInit_ex(ctx, algorithm, nullptr);
+    EVP_DigestUpdate(ctx, &seed, sizeof(seed));
+    EVP_DigestFinal_ex(ctx, hash, &hash_len);
+    EVP_MD_CTX_free(ctx);
+    *out_pseudo_device_id = Common::UUID::MakeRFC4122V5(std::span<u8, 20>{hash, std::size(hash)});
     R_SUCCEED();
 }
 

src/core/hle/service/am/service/library_applet_self_accessor.cpp

@@ -252,19 +252,7 @@ Result ILibraryAppletSelfAccessor::GetMainAppletApplicationDesiredLanguage(
     // Default to 0 (all languages supported)
     u32 supported_languages = 0;
 
-    const auto res = [this, identity] {
-        const FileSys::PatchManager pm{identity.application_id, system.GetFileSystemController(),
-                                       system.GetContentProvider()};
-        auto metadata = pm.GetControlMetadata();
-        if (metadata.first != nullptr) {
-            return metadata;
-        }
-
-        const FileSys::PatchManager pm_update{FileSys::GetUpdateTitleID(identity.application_id),
-                                              system.GetFileSystemController(),
-                                              system.GetContentProvider()};
-        return pm_update.GetControlMetadata();
-    }();
+    const auto res = FileSys::PatchManager::GetMetadataFromBaseOrUpdate(system, identity.application_id);
 
     if (res.first != nullptr) {
         supported_languages = res.first->GetSupportedLanguages();

src/core/hle/service/nvdrv/devices/nvdisp_disp0.cpp

@@ -6,6 +6,7 @@
 
 #include <boost/container/small_vector.hpp>
 
+#include "common/adpf.h"
 #include "common/assert.h"
 #include "common/logging.h"
 #include "core/core.h"
@@ -86,11 +87,16 @@ void nvdisp_disp0::Composite(std::span<const Nvnflinger::HwcLayer> sorted_layers
     }
 
     system.GPU().RequestComposite(std::move(output_layers), std::move(output_fences));
+    Common::ADPF::ReportFrameInterval();
     system.SpeedLimiter().DoSpeedLimiting(system.CoreTiming().GetGlobalTimeUs());
     system.GetPerfStats().EndSystemFrame();
     system.GetPerfStats().BeginSystemFrame();
 }
 
+void nvdisp_disp0::WaitForComposite() {
+    system.GPU().WaitForComposite();
+}
+
 Kernel::KEvent* nvdisp_disp0::QueryEvent(u32 event_id) {
     LOG_CRITICAL(Service_NVDRV, "Unknown DISP Event {}", event_id);
     return nullptr;

src/core/hle/service/nvdrv/devices/nvdisp_disp0.h

@@ -1,3 +1,6 @@
+// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project
+// SPDX-License-Identifier: GPL-3.0-or-later
+
 // SPDX-FileCopyrightText: Copyright 2018 yuzu Emulator Project
 // SPDX-License-Identifier: GPL-2.0-or-later
 
@@ -37,6 +40,8 @@ public:
     /// Performs a screen flip, compositing each buffer.
     void Composite(std::span<const Nvnflinger::HwcLayer> sorted_layers);
 
+    void WaitForComposite();
+
     Kernel::KEvent* QueryEvent(u32 event_id) override;
 
 private:

src/core/hle/service/nvnflinger/hardware_composer.cpp

@@ -1,4 +1,4 @@
-// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project
+// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project
 // SPDX-License-Identifier: GPL-3.0-or-later
 
 // SPDX-FileCopyrightText: Copyright 2024 yuzu Emulator Project
@@ -57,18 +57,8 @@ u32 HardwareComposer::ComposeLocked(f32* out_speed_scale, Display& display,
     // Set default speed limit to 100%.
     *out_speed_scale = 1.0f;
 
-    // If no layers are available, skip the logic.
-    bool any_visible = false;
-    for (auto& layer : display.stack.layers) {
-        if (layer->visible) {
-            any_visible = true;
-            break;
-        }
-    }
-    if (!any_visible) {
-        *out_speed_scale = 1.0f;
-        return 1;
-    }
+    nvdisp.WaitForComposite();
+    this->ReleaseFramebuffersLocked(display);
 
     // Determine the number of vsync periods to wait before composing again.
     std::optional<s32> swap_interval{};
@@ -158,55 +148,30 @@ u32 HardwareComposer::ComposeLocked(f32* out_speed_scale, Display& display,
         nvdisp.Composite(composition_stack);
     }
 
-    // Batch framebuffer releases, instead of one-into-one.
-    std::vector<std::pair<Layer*, Framebuffer*>> to_release;
-    for (auto& [layer_id, framebuffer] : m_framebuffers) {
-        if (!framebuffer.is_acquired)
-            continue;
-
-        auto layer = display.stack.FindLayer(layer_id);
-        if (!layer)
-            continue;
-
-        // Overlay layers always release after every compose
-        // Non-overlay layers release based on their swap interval
-        if (layer->is_overlay || framebuffer.release_frame_number <= m_frame_number) {
-            to_release.emplace_back(layer.get(), &framebuffer);
-        }
-    }
-    for (auto& [layer, framebuffer] : to_release) {
-        layer->buffer_item_consumer->ReleaseBuffer(framebuffer->item, android::Fence::NoFence());
-        framebuffer->is_acquired = false;
-    }
-
     // Advance by 1 frame (60 FPS compositing)
     m_frame_number += 1;
 
-    // Release any necessary framebuffers (non-overlay layers only, as overlays are already released above).
+    return 1;
+}
+
+void HardwareComposer::ReleaseFramebuffersLocked(Display& display) {
     for (auto& [layer_id, framebuffer] : m_framebuffers) {
         if (!framebuffer.is_acquired) {
-            // Already released.
             continue;
         }
 
-        if (framebuffer.release_frame_number > m_frame_number) {
+        const auto layer = display.stack.FindLayer(layer_id);
+        if (!layer) {
             continue;
         }
 
-        if (const auto layer = display.stack.FindLayer(layer_id); layer != nullptr) {
-            // Skip overlay layers as they were already released above
-            if (layer->is_overlay) {
-                continue;
-            }
-
-            // TODO: support release fence
-            // This is needed to prevent screen tearing
-            layer->buffer_item_consumer->ReleaseBuffer(framebuffer.item, android::Fence::NoFence());
-            framebuffer.is_acquired = false;
+        if (!layer->is_overlay && framebuffer.release_frame_number > m_frame_number) {
+            continue;
         }
+
+        layer->buffer_item_consumer->ReleaseBuffer(framebuffer.item, android::Fence::NoFence());
+        framebuffer.is_acquired = false;
     }
-
-    return 1;
 }
 
 void HardwareComposer::RemoveLayerLocked(Display& display, ConsumerId consumer_id) {

src/core/hle/service/nvnflinger/hardware_composer.h

@@ -1,4 +1,4 @@
-// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project
+// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project
 // SPDX-License-Identifier: GPL-3.0-or-later
 
 // SPDX-FileCopyrightText: Copyright 2024 yuzu Emulator Project
@@ -52,6 +52,7 @@ private:
 private:
     bool TryAcquireFramebufferLocked(Layer& layer, Framebuffer& framebuffer);
     CacheStatus CacheFramebufferLocked(Layer& layer, ConsumerId consumer_id);
+    void ReleaseFramebuffersLocked(Display& display);
 };
 
 } // namespace Service::Nvnflinger

src/core/hle/service/pctl/parental_control_service.h

@@ -1,4 +1,4 @@
-// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project
+// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project
 // SPDX-License-Identifier: GPL-3.0-or-later
 
 // SPDX-FileCopyrightText: Copyright 2024 yuzu Emulator
@@ -84,7 +84,7 @@ private:
     RestrictionSettings restriction_settings{};
     std::array<char, 8> pin_code{};
     Capability capability{};
-    // TODO: this is RAW as fuck
+    // TODO: this is raw
     PlayTimerSettings raw_play_timer_settings{};
 
     KernelHelpers::ServiceContext service_context;

src/core/hle/service/set/system_settings_server.cpp

@@ -1020,7 +1020,7 @@ Result ISystemSettingsServer::GetBatteryLot(Out<BatteryLot> out_battery_lot) {
         c.lot_number[1] = 'H';
         c.lot_number[2] = 'A';
         c.lot_number[3] = 'C';
-        // TODO: I have no fucking idea what the letters mean
+        // TODO: what do the letters mean?
         c.lot_number[4] = 'H';
         c.lot_number[5] = 'Z';
         c.lot_number[6] = 'Z';

src/core/hle/service/vi/conductor.cpp

@@ -4,7 +4,11 @@
 // SPDX-FileCopyrightText: Copyright 2024 yuzu Emulator Project
 // SPDX-License-Identifier: GPL-2.0-or-later
 
+#include <algorithm>
+
+#include "common/adpf.h"
 #include "common/settings.h"
+#include "common/thread.h"
 #include "core/core.h"
 #include "core/core_timing.h"
 #include "core/hle/service/vi/conductor.h"
@@ -14,6 +18,8 @@
 
 constexpr auto FrameNs = std::chrono::nanoseconds{1000000000 / 60};
 
+constexpr s64 UNLOCKED_TARGET_DIVISOR = 4;
+
 namespace Service::VI {
 
 Conductor::Conductor(Core::System& system, Container& container, DisplayList& displays)
@@ -68,6 +74,9 @@ void Conductor::UnlinkVsyncEvent(u64 display_id, Event* event) {
 }
 
 void Conductor::ProcessVsync() {
+    Common::PollThreadPolicies();
+    Common::ADPF::SetTargetWorkDuration(std::chrono::nanoseconds{this->GetFramePeriodNs()});
+
     for (auto& [display_id, manager] : m_vsync_managers) {
         m_container.ComposeOnDisplay(&m_swap_interval, &m_compose_speed_scale, display_id);
         manager.SignalVsync(m_system.Kernel());
@@ -76,6 +85,8 @@ void Conductor::ProcessVsync() {
 
 void Conductor::VsyncThread(std::stop_token token) {
     Common::SetCurrentThreadName("VSyncThread");
+    Common::SetCurrentThreadPriority(Common::ThreadPriority::VeryHigh);
+    Common::SetCurrentThreadToPerformanceCores();
 
     while (!token.stop_requested()) {
         m_signal.Wait();
@@ -114,4 +125,25 @@ s64 Conductor::GetNextTicks() const {
     return static_cast<s64>(speed_scale * (1000000000.f / effective_fps));
 }
 
+s64 Conductor::GetFramePeriodNs() const {
+    const auto& settings = Settings::values;
+    f32 speed_scale = 1.f;
+    bool unlocked = false;
+    if (settings.use_multi_core.GetValue()) {
+        if (settings.use_speed_limit.GetValue()) {
+            speed_scale = 100.f / Settings::SpeedLimit();
+        } else {
+            unlocked = true;
+        }
+    }
+    speed_scale /= m_compose_speed_scale;
+
+    const f32 effective_fps = 60.f / static_cast<f32>(m_swap_interval);
+    s64 period = static_cast<s64>(speed_scale * (1000000000.f / effective_fps));
+    if (unlocked) {
+        period /= UNLOCKED_TARGET_DIVISOR;
+    }
+    return std::clamp<s64>(period, 1'000'000, 100'000'000);
+}
+
 } // namespace Service::VI

src/core/hle/service/vi/conductor.h

@@ -44,6 +44,7 @@ private:
     void ProcessVsync();
     void VsyncThread(std::stop_token token);
     s64 GetNextTicks() const;
+    s64 GetFramePeriodNs() const;
 
 private:
     Core::System& m_system;

src/core/internal_network/network.cpp

@@ -531,7 +531,8 @@ int TranslateTypeToNative(Type type) {
     NETWORK_PROTOCOL_TRANSLATE_ELEM(MPLS) \
     NETWORK_PROTOCOL_TRANSLATE_ELEM(PFSYNC)
 #elif defined(__linux__)
-// Other platforms get fucked
+// Other platforms may not support some niche protocols.
+// This is usually not an issue
 #define NETWORK_PROTOCOL_TRANSLATE_LIST \
     NETWORK_PROTOCOL_TRANSLATE_ELEM(IP) \
     /*NETWORK_PROTOCOL_TRANSLATE_ELEM(HOPOPTS)*/ \

src/dynarmic/CMakeLists.txt

@@ -25,7 +25,7 @@ endif()
 # Dynarmic project options
 option(DYNARMIC_ENABLE_CPU_FEATURE_DETECTION "Turning this off causes dynarmic to assume the host CPU doesn't support anything later than SSE3" ON)
 
-if (PLATFORM_OPENBSD OR PLATFORM_DRAGONFLY OR PLATFORM_NETBSD)
+if (OPENBSD OR DRAGONFLY OR NETBSD)
     set(REQUIRE_WX ON)
 else()
     set(REQUIRE_WX OFF)

src/dynarmic/src/dynarmic/CMakeLists.txt

@@ -74,6 +74,7 @@ add_library(dynarmic STATIC
     interface/halt_reason.h
     interface/exclusive_monitor.h
     interface/optimization_flags.h
+    interface/halt_reason.h
     ir/acc_type.h
     ir/basic_block.cpp
     ir/basic_block.h
@@ -139,10 +140,8 @@ if ("x86_64" IN_LIST ARCHITECTURE)
     # Newer versions of xbyak (>= 7.25.0) have stricter checks that currently
     # fail in dynarmic
     target_compile_definitions(dynarmic PRIVATE XBYAK_STRICT_CHECK_MEM_REG_SIZE=0)
-
     target_compile_definitions(dynarmic PRIVATE XBYAK_OLD_DISP_CHECK=1)
     target_link_libraries(dynarmic PRIVATE xbyak::xbyak)
-
     target_architecture_specific_sources(dynarmic "x86_64"
         backend/x64/abi.cpp
         backend/x64/abi.h
@@ -294,6 +293,35 @@ if ("riscv64" IN_LIST ARCHITECTURE)
     )
     message(WARNING "TODO: Incomplete frontend for this host architecture")
 endif()
+if ("powerpc64" IN_LIST ARCHITECTURE)
+    target_link_libraries(dynarmic PRIVATE powah)
+    target_sources(dynarmic PRIVATE
+        backend/ppc64/abi.h
+        backend/ppc64/emit_context.h
+        backend/ppc64/emit_ppc64_a32.cpp
+        backend/ppc64/emit_ppc64_a64.cpp
+        backend/ppc64/emit_ppc64_misc.cpp
+        backend/ppc64/emit_ppc64_data_processing.cpp
+        backend/ppc64/emit_ppc64_floating_point.cpp
+        backend/ppc64/emit_ppc64_vector.cpp
+        backend/ppc64/emit_ppc64.cpp
+        backend/ppc64/emit_ppc64.h
+        backend/ppc64/exclusive_monitor.cpp
+        backend/ppc64/reg_alloc.cpp
+        backend/ppc64/reg_alloc.h
+        backend/ppc64/stack_layout.h
+        backend/ppc64/hostloc.h
+        common/spin_lock_ppc64.cpp
+        common/spin_lock_ppc64.h
+        # A32
+        backend/ppc64/a32_core.h
+        backend/ppc64/a32_interface.cpp
+        # A64
+        backend/ppc64/a64_core.h
+        backend/ppc64/a64_interface.cpp
+        backend/ppc64/code_block.h
+    )
+endif()
 
 if ("loongarch64" IN_LIST ARCHITECTURE)
     target_link_libraries(dynarmic PRIVATE lagoon::lagoon)
@@ -363,7 +391,7 @@ elseif (APPLE)
             backend/exception_handler_macos_mig.c
         )
     endif()
-elseif (UNIX AND NOT PLATFORM_HAIKU)
+elseif (UNIX AND NOT HAIKUOS)
     # Haiku lacks <ucontext.h>
     if (CMAKE_SYSTEM_NAME STREQUAL "Linux")
         target_link_libraries(dynarmic PRIVATE rt)

src/dynarmic/src/dynarmic/backend/exception_handler.h

@@ -17,7 +17,7 @@
 #if defined(ARCHITECTURE_x86_64)
 namespace Dynarmic::Backend::X64 {
 class BlockOfCode;
-}  // namespace Dynarmic::Backend::X64
+}
 #elif defined(ARCHITECTURE_arm64)
 namespace oaknut {
 class CodeBlock;
@@ -30,6 +30,10 @@ class CodeBlock;
 namespace Dynarmic::Backend::LoongArch64 {
 class CodeBlock;
 }  // namespace Dynarmic::Backend::LoongArch64
+#elif defined(ARCHITECTURE_powerpc64)
+namespace Dynarmic::Backend::PPC64 {
+class CodeBlock;
+}
 #else
 #    error "Invalid architecture"
 #endif
@@ -53,6 +57,9 @@ struct FakeCall {
 struct FakeCall {
     u64 call_pc;
 };
+#elif defined(ARCHITECTURE_powerpc64)
+struct FakeCall {
+};
 #else
 #    error "Invalid architecture"
 #endif
@@ -70,6 +77,8 @@ public:
     void Register(RV64::CodeBlock& mem, std::size_t mem_size);
 #elif defined(ARCHITECTURE_loongarch64)
     void Register(LoongArch64::CodeBlock& mem, std::size_t mem_size);
+#elif defined(ARCHITECTURE_powerpc64)
+    void Register(PPC64::CodeBlock& mem, std::size_t mem_size);
 #else
 #    error "Invalid architecture"
 #endif

src/dynarmic/src/dynarmic/backend/exception_handler_generic.cpp

@@ -17,24 +17,21 @@ ExceptionHandler::ExceptionHandler() = default;
 ExceptionHandler::~ExceptionHandler() = default;
 
 #if defined(ARCHITECTURE_x86_64)
-void ExceptionHandler::Register(X64::BlockOfCode&) {
-    // Do nothing
-}
+void ExceptionHandler::Register(X64::BlockOfCode&)
 #elif defined(ARCHITECTURE_arm64)
-void ExceptionHandler::Register(oaknut::CodeBlock&, std::size_t) {
-    // Do nothing
-}
+void ExceptionHandler::Register(oaknut::CodeBlock&, std::size_t)
 #elif defined(ARCHITECTURE_riscv64)
-void ExceptionHandler::Register(RV64::CodeBlock&, std::size_t) {
-    // Do nothing
-}
+void ExceptionHandler::Register(RV64::CodeBlock&, std::size_t)
 #elif defined(ARCHITECTURE_loongarch64)
-void ExceptionHandler::Register(LoongArch64::CodeBlock&, std::size_t) {
-    // Do nothing
-}
+void ExceptionHandler::Register(LoongArch64::CodeBlock&, std::size_t)
+#elif defined(ARCHITECTURE_powerpc64)
+void ExceptionHandler::Register(PPC64::CodeBlock&, std::size_t)
 #else
 #    error "Invalid architecture"
 #endif
+{
+    // Do nothing
+}
 
 bool ExceptionHandler::SupportsFastmem() const noexcept {
     return false;

src/dynarmic/src/dynarmic/backend/exception_handler_posix.cpp

@@ -11,6 +11,7 @@
 #include <algorithm>
 #include <bit>
 #include <cstring>
+#include <algorithm>
 #include <functional>
 #include <memory>
 #include <mutex>
@@ -34,6 +35,8 @@
 #    include "dynarmic/backend/riscv64/code_block.h"
 #elif defined(ARCHITECTURE_loongarch64)
 #    include "dynarmic/backend/loongarch64/code_block.h"
+#elif defined(ARCHITECTURE_powerpc64)
+#    include "dynarmic/backend/ppc64/code_block.h"
 #else
 #    error "Invalid architecture"
 #endif
@@ -168,7 +171,7 @@ void SigHandler::SigAction(int sig, siginfo_t* info, void* raw_context) {
     }
     fmt::print(stderr, "Unhandled {} at pc {:#018x}\n", sig == SIGSEGV ? "SIGSEGV" : "SIGBUS", CTX_PC);
 #else
-#    error "Invalid architecture"
+    UNREACHABLE();
 #endif
 
     struct sigaction* retry_sa = sig == SIGSEGV ? &sig_handler->old_sa_segv : &sig_handler->old_sa_bus;
@@ -230,6 +233,10 @@ void ExceptionHandler::Register(RV64::CodeBlock& mem, std::size_t size) {
 void ExceptionHandler::Register(LoongArch64::CodeBlock& mem, std::size_t size) {
     impl = std::make_unique<Impl>(std::bit_cast<u64>(mem.ptr<u64>()), size);
 }
+#elif defined(ARCHITECTURE_powerpc64)
+void ExceptionHandler::Register(PPC64::CodeBlock& mem, std::size_t size) {
+    impl = std::make_unique<Impl>(std::bit_cast<u64>(mem.ptr<u64>()), size);
+}
 #else
 #    error "Invalid architecture"
 #endif

src/dynarmic/src/dynarmic/backend/ppc64/a32_core.h

@@ -0,0 +1,32 @@
+// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project
+// SPDX-License-Identifier: GPL-3.0-or-later
+
+#pragma once
+
+#include <powah_emit.hpp>
+#include <ankerl/unordered_dense.h>
+#include "dynarmic/backend/ppc64/code_block.h"
+#include "dynarmic/backend/ppc64/emit_ppc64.h"
+#include "dynarmic/frontend/A32/a32_location_descriptor.h"
+#include "dynarmic/interface/A32/a32.h"
+#include "dynarmic/interface/A32/config.h"
+#include "dynarmic/ir/terminal.h"
+#include "dynarmic/ir/basic_block.h"
+
+namespace Dynarmic::Backend::PPC64 {
+
+struct A32JitState {
+    std::array<u32, 16> regs{};
+    alignas(16) std::array<u32, 64> ext_regs{};
+    u32 upper_location_descriptor;
+    u32 exclusive_state = 0;
+    u32 cpsr_nzcv = 0;
+    u32 fpscr = 0;
+    u32 check_bit = 0;
+
+    IR::LocationDescriptor GetLocationDescriptor() const {
+        return IR::LocationDescriptor{regs[15] | (u64(upper_location_descriptor) << 32)};
+    }
+};
+
+}  // namespace Dynarmic::Backend::RV64

src/dynarmic/src/dynarmic/backend/ppc64/a32_interface.cpp

@@ -0,0 +1,250 @@
+// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project
+// SPDX-License-Identifier: GPL-3.0-or-later
+
+#include <memory>
+#include <mutex>
+
+#include <boost/icl/interval_set.hpp>
+
+#include "common/assert.h"
+#include "common/common_types.h"
+#include "dynarmic/frontend/A32/a32_location_descriptor.h"
+#include "dynarmic/frontend/A32/translate/a32_translate.h"
+#include "dynarmic/frontend/A32/FPSCR.h"
+#include "dynarmic/interface/A32/config.h"
+#include "dynarmic/backend/ppc64/a32_core.h"
+#include "dynarmic/common/atomic.h"
+#include "dynarmic/ir/opt_passes.h"
+#include "dynarmic/interface/A32/a32.h"
+
+namespace Dynarmic::A32 {
+
+using namespace Dynarmic::Backend::PPC64;
+using CodePtr = std::uint32_t*;
+
+struct A32AddressSpace final {
+    explicit A32AddressSpace(const A32::UserConfig& conf)
+        : conf(conf)
+        , cb(conf.code_cache_size)
+        , as(cb.ptr<u8*>(), conf.code_cache_size) {
+
+    }
+
+    CodePtr GetOrEmit(IR::LocationDescriptor desc) {
+        if (auto const it = block_entries.find(desc.Value()); it != block_entries.end())
+            return it->second;
+
+        ir_block.Reset(A32::LocationDescriptor{desc});
+        A32::Translate(ir_block, A32::LocationDescriptor{desc}, conf.callbacks, {conf.arch_version, conf.define_unpredictable_behaviour, conf.hook_hint_instructions});
+        Optimization::Optimize(ir_block, conf, {});
+        const EmittedBlockInfo block_info = Emit(std::move(ir_block));
+
+        block_infos.insert_or_assign(desc.Value(), block_info);
+        block_entries.insert_or_assign(desc.Value(), block_info.entry_point);
+        return block_info.entry_point;
+    }
+
+    void ClearCache() {
+        block_entries.clear();
+        block_infos.clear();
+    }
+
+    EmittedBlockInfo Emit(IR::Block block) {
+        EmittedBlockInfo block_info = EmitPPC64(as, std::move(block), {
+            .enable_cycle_counting = conf.enable_cycle_counting,
+            .always_little_endian = conf.always_little_endian,
+            .a64_variant = false
+        });
+        Link(block_info);
+        return block_info;
+    }
+
+    void Link(EmittedBlockInfo& block_info) {
+        //UNREACHABLE();
+    }
+
+    IR::Block ir_block = {LocationDescriptor(0, PSR(0), FPSCR(0), false)};
+    const A32::UserConfig conf;
+    CodeBlock cb;
+    powah::Context as;
+    ankerl::unordered_dense::map<u64, CodePtr> block_entries;
+    ankerl::unordered_dense::map<u64, EmittedBlockInfo> block_infos;
+};
+
+struct A32Core final {
+    static HaltReason Run(A32AddressSpace& process, A32JitState& thread_ctx, volatile u32* halt_reason) {
+        auto const loc = thread_ctx.GetLocationDescriptor();
+        auto const entry = process.GetOrEmit(loc);
+        using CodeFn = HaltReason (*)(A32AddressSpace*, A32JitState*, volatile u32*, void*);
+        return (CodeFn(entry))(&process, &thread_ctx, halt_reason, reinterpret_cast<void*>(&A32Core::Run));
+    }
+};
+
+struct Jit::Impl final {
+    Impl(Jit* jit_interface, A32::UserConfig conf)
+        : conf(conf)
+        , current_address_space(conf)
+        , jit_interface(jit_interface) {}
+
+    HaltReason Run() {
+        ASSERT(!is_executing);
+        is_executing = false;
+        HaltReason hr = A32Core::Run(current_address_space, jit_state, &halt_reason);
+        is_executing = true;
+        RequestCacheInvalidation();
+        return hr;
+    }
+
+    HaltReason Step() {
+        // HaltReason hr = A32Core::Step(current_address_space, jit_state, &halt_reason);
+        // RequestCacheInvalidation();
+        return HaltReason{};
+    }
+
+    void ClearCache() {
+        std::unique_lock lock{invalidation_mutex};
+        invalidate_entire_cache = true;
+        HaltExecution(HaltReason::CacheInvalidation);
+    }
+
+    void InvalidateCacheRange(u32 start_address, size_t length) {
+        std::unique_lock lock{invalidation_mutex};
+        invalid_cache_ranges.add(boost::icl::discrete_interval<u32>::closed(start_address, u32(start_address + length - 1)));
+        HaltExecution(HaltReason::CacheInvalidation);
+    }
+
+    void Reset() {
+        jit_state = {};
+    }
+
+    void HaltExecution(HaltReason hr) {
+        Atomic::Or(&halt_reason, ~u32(hr));
+    }
+
+    void ClearHalt(HaltReason hr) {
+        Atomic::And(&halt_reason, ~u32(hr));
+    }
+
+    std::array<u32, 16>& Regs() {
+        return jit_state.regs;
+    }
+
+    const std::array<u32, 16>& Regs() const {
+        return jit_state.regs;
+    }
+
+    std::array<u32, 64>& ExtRegs() {
+        return jit_state.ext_regs;
+    }
+
+    const std::array<u32, 64>& ExtRegs() const {
+        return jit_state.ext_regs;
+    }
+
+    u32 Cpsr() const {
+        return jit_state.cpsr_nzcv;
+    }
+
+    void SetCpsr(u32 value) {
+        jit_state.cpsr_nzcv = value;
+    }
+
+    u32 Fpscr() const {
+        return jit_state.fpscr;
+    }
+
+    void SetFpscr(u32 value) {
+        jit_state.fpscr = value;
+    }
+
+    void ClearExclusiveState() {
+        jit_state.exclusive_state = false;
+    }
+
+private:
+    void RequestCacheInvalidation() {
+        // UNREACHABLE();
+        invalidate_entire_cache = false;
+        invalid_cache_ranges.clear();
+    }
+
+    A32::UserConfig conf;
+    A32JitState jit_state{};
+    A32AddressSpace current_address_space;
+    Jit* jit_interface;
+    volatile u32 halt_reason = 0;
+    bool is_executing = false;
+
+    boost::icl::interval_set<u32> invalid_cache_ranges;
+    bool invalidate_entire_cache = false;
+    std::mutex invalidation_mutex;
+};
+
+Jit::Jit(UserConfig conf) : impl(std::make_unique<Impl>(this, conf)) {}
+Jit::~Jit() = default;
+
+HaltReason Jit::Run() {
+    return impl->Run();
+}
+
+HaltReason Jit::Step() {
+    return impl->Step();
+}
+
+void Jit::ClearCache() {
+    impl->ClearCache();
+}
+
+void Jit::InvalidateCacheRange(u32 start_address, std::size_t length) {
+    impl->InvalidateCacheRange(start_address, length);
+}
+
+void Jit::Reset() {
+    impl->Reset();
+}
+
+void Jit::HaltExecution(HaltReason hr) {
+    impl->HaltExecution(hr);
+}
+
+void Jit::ClearHalt(HaltReason hr) {
+    impl->ClearHalt(hr);
+}
+
+std::array<u32, 16>& Jit::Regs() {
+    return impl->Regs();
+}
+
+const std::array<u32, 16>& Jit::Regs() const {
+    return impl->Regs();
+}
+
+std::array<u32, 64>& Jit::ExtRegs() {
+    return impl->ExtRegs();
+}
+
+const std::array<u32, 64>& Jit::ExtRegs() const {
+    return impl->ExtRegs();
+}
+
+u32 Jit::Cpsr() const {
+    return impl->Cpsr();
+}
+
+void Jit::SetCpsr(u32 value) {
+    impl->SetCpsr(value);
+}
+
+u32 Jit::Fpscr() const {
+    return impl->Fpscr();
+}
+
+void Jit::SetFpscr(u32 value) {
+    impl->SetFpscr(value);
+}
+
+void Jit::ClearExclusiveState() {
+    impl->ClearExclusiveState();
+}
+
+}  // namespace Dynarmic::A32

src/dynarmic/src/dynarmic/backend/ppc64/a64_core.h

@@ -0,0 +1,40 @@
+// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project
+// SPDX-License-Identifier: GPL-3.0-or-later
+
+#pragma once
+
+
+#include <powah_emit.hpp>
+#include <ankerl/unordered_dense.h>
+#include "dynarmic/backend/ppc64/code_block.h"
+#include "dynarmic/backend/ppc64/emit_ppc64.h"
+#include "dynarmic/frontend/A64/a64_location_descriptor.h"
+#include "dynarmic/interface/A64/a64.h"
+#include "dynarmic/interface/A64/config.h"
+#include "dynarmic/ir/terminal.h"
+#include "dynarmic/ir/basic_block.h"
+
+namespace Dynarmic::Backend::PPC64 {
+
+struct A64JitState {
+    using ProgramCounterType = u32;
+    std::array<u64, 31> regs{};
+    u64 pc = 0;
+    alignas(16) std::array<u64, 64> vec{};
+    u64 sp = 0;
+    u32 upper_location_descriptor = 0;
+    u32 exclusive_state = 0;
+    u32 pstate = 0;
+    u32 fpcr = 0;
+    u32 fpsr = 0;
+    volatile u32 halt_reason = 0;
+    u32 check_bit = 0;
+
+    IR::LocationDescriptor GetLocationDescriptor() const {
+        const u64 fpcr_u64 = u64(fpcr & A64::LocationDescriptor::fpcr_mask) << A64::LocationDescriptor::fpcr_shift;
+        const u64 pc_u64 = pc & A64::LocationDescriptor::pc_mask;
+        return IR::LocationDescriptor{pc_u64 | fpcr_u64};
+    }
+};
+
+}  // namespace Dynarmic::Backend::RV64

src/dynarmic/src/dynarmic/backend/ppc64/a64_interface.cpp

@@ -0,0 +1,366 @@
+// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project
+// SPDX-License-Identifier: GPL-3.0-or-later
+
+#include <memory>
+#include <mutex>
+#include <cstddef>
+
+#include <boost/icl/interval_set.hpp>
+#include "common/assert.h"
+#include "common/common_types.h"
+
+#include "dynarmic/frontend/A64/a64_location_descriptor.h"
+#include "dynarmic/frontend/A64/translate/a64_translate.h"
+#include "dynarmic/interface/A64/config.h"
+#include "dynarmic/backend/ppc64/a64_core.h"
+#include "dynarmic/common/atomic.h"
+#include "dynarmic/ir/opt_passes.h"
+#include "dynarmic/interface/A64/a64.h"
+
+namespace Dynarmic::A64 {
+
+using namespace Dynarmic::Backend::PPC64;
+using CodePtr = std::uint32_t*;
+
+struct A64AddressSpace final {
+    explicit A64AddressSpace(const A64::UserConfig& conf)
+        : conf(conf)
+        , cb(conf.code_cache_size)
+        , as(cb.ptr<u8*>(), conf.code_cache_size)
+    {
+
+    }
+
+    CodePtr GetOrEmit(IR::LocationDescriptor desc) {
+        if (auto const it = block_entries.find(desc.Value()); it != block_entries.end())
+            return it->second;
+        auto const get_code = [this](u64 vaddr) {
+            return conf.callbacks->MemoryReadCode(vaddr);
+        };
+        ir_block.Reset(A64::LocationDescriptor{desc});
+        A64::Translate(ir_block, A64::LocationDescriptor{desc}, get_code, {conf.define_unpredictable_behaviour, conf.wall_clock_cntpct});
+        Optimization::Optimize(ir_block, conf, {});
+        fmt::print("IR:\n{}\n", IR::DumpBlock(ir_block));
+        const EmittedBlockInfo block_info = Emit(std::move(ir_block));
+        block_infos.insert_or_assign(desc.Value(), block_info);
+        block_entries.insert_or_assign(desc.Value(), block_info.entry_point);
+        return block_info.entry_point;
+    }
+
+    void ClearCache() {
+        block_entries.clear();
+        block_infos.clear();
+    }
+
+    EmittedBlockInfo Emit(IR::Block block) {
+        EmittedBlockInfo block_info = EmitPPC64(as, std::move(block), {
+            .enable_cycle_counting = conf.enable_cycle_counting,
+            .always_little_endian = true,
+            .a64_variant = true
+        });
+        Link(block_info);
+        return block_info;
+    }
+
+    void Link(EmittedBlockInfo& block_info) {
+        // TODO(lizzie): Block linking
+        // UNREACHABLE();
+    }
+
+    IR::Block ir_block = {LocationDescriptor(0, FP::FPCR(0), false)};
+    const A64::UserConfig conf;
+    CodeBlock cb;
+    powah::Context as;
+    ankerl::unordered_dense::map<u64, CodePtr> block_entries;
+    ankerl::unordered_dense::map<u64, EmittedBlockInfo> block_infos;
+};
+
+struct A64Core final {
+    using CodeFn = HaltReason (*)(A64AddressSpace*, A64JitState*, volatile u32*, void *fn);
+    static HaltReason Run(A64AddressSpace& process, A64JitState& thread_ctx, volatile u32* halt_reason) {
+        HaltReason hr{};
+        do {
+            const auto loc = thread_ctx.GetLocationDescriptor();
+            const auto entry = process.GetOrEmit(loc);
+            hr = (CodeFn(entry))(&process, &thread_ctx, halt_reason, (void*)&A64Core::Run);
+        } while (hr == HaltReason(0));
+        return hr;
+    }
+};
+
+struct Jit::Impl final {
+    Impl(Jit* jit_interface, A64::UserConfig conf)
+        : conf(conf)
+        , current_address_space(conf)
+        , jit_interface(jit_interface) {}
+
+    HaltReason Run() {
+        ASSERT(!is_executing);
+        is_executing = true;
+        HaltReason hr = A64Core::Run(current_address_space, jit_state, &halt_reason);
+        is_executing = false;
+        RequestCacheInvalidation();
+        return hr;
+    }
+
+    HaltReason Step() {
+        // HaltReason hr = A64Core::Step(current_address_space, jit_state, &halt_reason);
+        // RequestCacheInvalidation();
+        return HaltReason{};
+    }
+
+    void ClearCache() {
+        std::unique_lock lock{invalidation_mutex};
+        invalidate_entire_cache = true;
+        HaltExecution(HaltReason::CacheInvalidation);
+    }
+
+    void InvalidateCacheRange(u64 start_address, size_t length) {
+        std::unique_lock lock{invalidation_mutex};
+        const auto end_address = u64(start_address + length - 1);
+        invalid_cache_ranges.add(boost::icl::discrete_interval<u64>::closed(start_address, end_address));
+        HaltExecution(HaltReason::CacheInvalidation);
+    }
+
+    void Reset() {
+        ASSERT(!is_executing);
+        jit_state = {};
+    }
+
+    void HaltExecution(HaltReason hr) {
+        Atomic::Or(&jit_state.halt_reason, u32(hr));
+    }
+
+    void ClearHalt(HaltReason hr) {
+        Atomic::And(&jit_state.halt_reason, ~u32(hr));
+    }
+
+    u64 GetSP() const {
+        return jit_state.sp;
+    }
+
+    void SetSP(u64 value) {
+        jit_state.sp = value;
+    }
+
+    u64 GetPC() const {
+        return jit_state.pc;
+    }
+
+    void SetPC(u64 value) {
+        jit_state.pc = value;
+    }
+
+    u64 GetRegister(size_t index) const {
+        return index == 31 ? GetSP() : jit_state.regs.at(index);
+    }
+
+    void SetRegister(size_t index, u64 value) {
+        if (index == 31)
+            return SetSP(value);
+        jit_state.regs.at(index) = value;
+    }
+
+    std::array<u64, 31> GetRegisters() const {
+        return jit_state.regs;
+    }
+
+    void SetRegisters(const std::array<u64, 31>& value) {
+        jit_state.regs = value;
+    }
+
+    Vector GetVector(size_t index) const {
+        return {jit_state.vec.at(index * 2), jit_state.vec.at(index * 2 + 1)};
+    }
+
+    void SetVector(size_t index, Vector value) {
+        jit_state.vec.at(index * 2) = value[0];
+        jit_state.vec.at(index * 2 + 1) = value[1];
+    }
+
+    std::array<Vector, 32> GetVectors() const {
+        std::array<Vector, 32> ret;
+        static_assert(sizeof(ret) == sizeof(jit_state.vec));
+        std::memcpy(ret.data(), jit_state.vec.data(), sizeof(jit_state.vec));
+        return ret;
+    }
+
+    void SetVectors(const std::array<Vector, 32>& value) {
+        static_assert(sizeof(value) == sizeof(jit_state.vec));
+        std::memcpy(jit_state.vec.data(), value.data(), sizeof(jit_state.vec));
+    }
+
+    u32 GetFpcr() const {
+        return jit_state.fpcr;
+    }
+
+    void SetFpcr(u32 value) {
+        jit_state.fpcr = value;
+    }
+
+    u32 GetFpsr() const {
+        return jit_state.fpsr;
+    }
+
+    void SetFpsr(u32 value) {
+        jit_state.fpsr = value;
+    }
+
+    u32 GetPstate() const {
+        return jit_state.pstate;
+    }
+
+    void SetPstate(u32 value) {
+        jit_state.pstate = value;
+    }
+
+    void ClearExclusiveState() {
+        jit_state.exclusive_state = 0;
+    }
+
+    bool IsExecuting() const {
+        return is_executing;
+    }
+
+    std::string Disassemble() const {
+        // const size_t size = reinterpret_cast<const char*>(block_of_code.getCurr()) - reinterpret_cast<const char*>(block_of_code.GetCodeBegin());
+        // auto const* p = reinterpret_cast<const char*>(block_of_code.GetCodeBegin());
+        // return Common::DisassemblePPC64(p, p + size);
+        return {};
+    }
+
+private:
+    void RequestCacheInvalidation() {
+        // UNREACHABLE();
+        invalidate_entire_cache = false;
+        invalid_cache_ranges.clear();
+    }
+
+    A64::UserConfig conf;
+    A64JitState jit_state{};
+    A64AddressSpace current_address_space;
+    Jit* jit_interface;
+    volatile u32 halt_reason = 0;
+    bool is_executing = false;
+
+    boost::icl::interval_set<u64> invalid_cache_ranges;
+    bool invalidate_entire_cache = false;
+    std::mutex invalidation_mutex;
+};
+
+Jit::Jit(UserConfig conf) : impl(std::make_unique<Jit::Impl>(this, conf)) {}
+Jit::~Jit() = default;
+
+HaltReason Jit::Run() {
+    return impl->Run();
+}
+
+HaltReason Jit::Step() {
+    return impl->Step();
+}
+
+void Jit::ClearCache() {
+    impl->ClearCache();
+}
+
+void Jit::InvalidateCacheRange(u64 start_address, size_t length) {
+    impl->InvalidateCacheRange(start_address, length);
+}
+
+void Jit::Reset() {
+    impl->Reset();
+}
+
+void Jit::HaltExecution(HaltReason hr) {
+    impl->HaltExecution(hr);
+}
+
+void Jit::ClearHalt(HaltReason hr) {
+    impl->ClearHalt(hr);
+}
+
+u64 Jit::GetSP() const {
+    return impl->GetSP();
+}
+
+void Jit::SetSP(u64 value) {
+    impl->SetSP(value);
+}
+
+u64 Jit::GetPC() const {
+    return impl->GetPC();
+}
+
+void Jit::SetPC(u64 value) {
+    impl->SetPC(value);
+}
+
+u64 Jit::GetRegister(size_t index) const {
+    return impl->GetRegister(index);
+}
+
+void Jit::SetRegister(size_t index, u64 value) {
+    impl->SetRegister(index, value);
+}
+
+std::array<u64, 31> Jit::GetRegisters() const {
+    return impl->GetRegisters();
+}
+
+void Jit::SetRegisters(const std::array<u64, 31>& value) {
+    impl->SetRegisters(value);
+}
+
+Vector Jit::GetVector(size_t index) const {
+    return impl->GetVector(index);
+}
+
+void Jit::SetVector(size_t index, Vector value) {
+    impl->SetVector(index, value);
+}
+
+std::array<Vector, 32> Jit::GetVectors() const {
+    return impl->GetVectors();
+}
+
+void Jit::SetVectors(const std::array<Vector, 32>& value) {
+    impl->SetVectors(value);
+}
+
+u32 Jit::GetFpcr() const {
+    return impl->GetFpcr();
+}
+
+void Jit::SetFpcr(u32 value) {
+    impl->SetFpcr(value);
+}
+
+u32 Jit::GetFpsr() const {
+    return impl->GetFpsr();
+}
+
+void Jit::SetFpsr(u32 value) {
+    impl->SetFpsr(value);
+}
+
+u32 Jit::GetPstate() const {
+    return impl->GetPstate();
+}
+
+void Jit::SetPstate(u32 value) {
+    impl->SetPstate(value);
+}
+
+void Jit::ClearExclusiveState() {
+    impl->ClearExclusiveState();
+}
+
+bool Jit::IsExecuting() const {
+    return impl->IsExecuting();
+}
+
+std::string Jit::Disassemble() const {
+    return impl->Disassemble();
+}
+
+}  // namespace Dynarmic::A64

src/dynarmic/src/dynarmic/backend/ppc64/abi.h

@@ -0,0 +1,77 @@
+// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project
+// SPDX-License-Identifier: GPL-3.0-or-later
+
+#pragma once
+
+#include <powah_emit.hpp>
+#include "common/common_types.h"
+
+namespace Dynarmic::Backend::PPC64 {
+
+/*
+https://refspecs.linuxfoundation.org/ELF/ppc64/PPC-elf64abi.html#REG
+
+r0        Volatile register used in function prologs
+r1        Stack frame pointer
+r2        TOC pointer
+r3        Volatile parameter and return value register
+r4-r10    Volatile registers used for function parameters
+r11       Volatile register used in calls by pointer and as an environment pointer for languages which require one
+r12       Volatile register used for exception handling and glink code
+r13       Reserved for use as system thread ID
+r14-r31   Nonvolatile registers used for local variables
+
+f0        Volatile scratch register
+f1-f4     Volatile floating point parameter and return value registers
+f5-f13    Volatile floating point parameter registers
+f14-f31   Nonvolatile registers
+
+LR        Link register (volatile)
+CTR       Loop counter register (volatile)
+XER       Fixed point exception register (volatile)
+FPSCR     Floating point status and control register (volatile)
+
+CR0-CR1   Volatile condition code register fields
+CR2-CR4   Nonvolatile condition code register fields
+CR5-CR7   Volatile condition code register fields
+
+v0-v1     Volatile scratch registers
+v2-v13    Volatile vector parameters registers
+v14-v19   Volatile scratch registers
+v20-v31   Non-volatile registers
+vrsave    Non-volatile 32-bit register
+*/
+
+// Jit fn signature => (AXXAddressSpace& process, AXXJitState& thread_ctx, volatile u32* halt_reason)
+constexpr powah::GPR RPROCESS = powah::R3;
+constexpr powah::GPR RJIT = powah::R4;
+constexpr powah::GPR RHALTREASON = powah::R5;
+constexpr powah::GPR RTOCPTR = powah::R6;
+// temporals
+constexpr powah::GPR RNZCV = powah::R7;
+
+constexpr powah::GPR ABI_PARAM1 = powah::R3;
+constexpr powah::GPR ABI_PARAM2 = powah::R4;
+constexpr powah::GPR ABI_PARAM3 = powah::R5;
+constexpr powah::GPR ABI_PARAM4 = powah::R6;
+
+// See https://refspecs.linuxfoundation.org/ELF/ppc64/PPC-elf64abi.html#REG
+constexpr std::initializer_list<u32> GPR_ORDER{
+    // r13 is thread-id
+    14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31 //non-volatile
+};
+
+constexpr std::initializer_list<powah::GPR> ABI_CALLEER_SAVED{
+    powah::R3, powah::R4, powah::R5, powah::R6,
+    powah::R7, powah::R8, powah::R9, powah::R10,
+    powah::R11, powah::R12
+};
+constexpr std::initializer_list<powah::GPR> ABI_CALLEE_SAVED{
+    powah::R14, powah::R15, powah::R16, powah::R17,
+    powah::R18, powah::R19, powah::R20, powah::R21,
+    powah::R22, powah::R23, powah::R24, powah::R25,
+    powah::R26, powah::R27, powah::R28, powah::R29,
+    powah::R30, powah::R31
+};
+
+}  // namespace Dynarmic::Backend::RV64

src/dynarmic/src/dynarmic/backend/ppc64/code_block.h

@@ -0,0 +1,37 @@
+// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project
+// SPDX-License-Identifier: GPL-3.0-or-later
+
+#pragma once
+
+#include <cstdint>
+#include <cstdio>
+#include <new>
+#include <sys/mman.h>
+
+#include "common/common_types.h"
+#include "common/assert.h"
+
+namespace Dynarmic::Backend::PPC64 {
+
+class CodeBlock {
+public:
+    explicit CodeBlock(size_t size_) noexcept : size{size_} {
+        block = (u8*)mmap(nullptr, size, PROT_WRITE | PROT_READ | PROT_EXEC, MAP_ANONYMOUS | MAP_PRIVATE, -1, 0);
+        //printf("block = %p, size= %zx\n", block, size);
+        ASSERT(block != nullptr);
+    }
+    ~CodeBlock() noexcept {
+        if (block != nullptr)
+            munmap(block, size);
+    }
+    template<typename T>
+    T ptr() const noexcept {
+        static_assert(std::is_pointer_v<T> || std::is_same_v<T, uintptr_t> || std::is_same_v<T, intptr_t>);
+        return reinterpret_cast<T>(block);
+    }
+protected:
+    void* block = nullptr;
+    size_t size = 0;
+};
+
+}  // namespace Dynarmic::Backend::RV64

src/dynarmic/src/dynarmic/backend/ppc64/emit_context.h

@@ -0,0 +1,27 @@
+// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project
+// SPDX-License-Identifier: GPL-3.0-or-later
+
+#pragma once
+
+#include <powah_emit.hpp>
+#include "dynarmic/backend/ppc64/emit_ppc64.h"
+#include "dynarmic/backend/ppc64/reg_alloc.h"
+
+namespace Dynarmic::IR {
+class Block;
+}  // namespace Dynarmic::IR
+
+namespace Dynarmic::Backend::PPC64 {
+
+struct EmitConfig;
+
+struct EmitContext {
+    IR::Block& block;
+    RegAlloc& reg_alloc;
+    const EmitConfig& emit_conf;
+    EmittedBlockInfo& ebi;
+    // label used when returning :)
+    powah::Label l_return;
+};
+
+}  // namespace Dynarmic::Backend::RV64

src/dynarmic/src/dynarmic/backend/ppc64/emit_ppc64.cpp

@@ -0,0 +1,305 @@
+// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project
+// SPDX-License-Identifier: GPL-3.0-or-later
+
+#include <bit>
+#include <cstdint>
+
+#include <powah_emit.hpp>
+#include <fmt/ostream.h>
+
+#include "dynarmic/backend/ppc64/emit_ppc64.h"
+#include "dynarmic/backend/ppc64/a32_core.h"
+#include "dynarmic/backend/ppc64/a64_core.h"
+#include "dynarmic/backend/ppc64/abi.h"
+#include "dynarmic/backend/ppc64/a32_core.h"
+#include "dynarmic/backend/ppc64/a64_core.h"
+#include "dynarmic/backend/ppc64/abi.h"
+#include "dynarmic/backend/ppc64/emit_context.h"
+#include "dynarmic/backend/ppc64/reg_alloc.h"
+#include "dynarmic/backend/ppc64/stack_layout.h"
+#include "dynarmic/ir/basic_block.h"
+#include "dynarmic/ir/microinstruction.h"
+#include "dynarmic/ir/opcodes.h"
+#include "stack_layout.h"
+
+namespace Dynarmic::Backend::PPC64 {
+
+template<>
+void EmitIR<IR::Opcode::Void>(powah::Context&, EmitContext&, IR::Inst*) {}
+
+template<>
+void EmitIR<IR::Opcode::Identity>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const result = ctx.reg_alloc.ScratchGpr();
+    auto const source = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    code.MR(result, source);
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
+template<>
+void EmitIR<IR::Opcode::Breakpoint>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::CallHostFunction>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::PushRSB>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::GetCarryFromOp>(powah::Context&, EmitContext& ctx, IR::Inst* inst) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::GetOverflowFromOp>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::GetGEFromOp>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::GetNZCVFromOp>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    if (ctx.reg_alloc.IsValueLive(inst)) {
+        ASSERT(false && "unimp value live");
+        return;
+    }
+
+    // All logical operations whom set (RC) are going to compute as the following:
+    // 1. Rt <- logical_op (Ra, Rb)
+    // 2. Compare as Signed(Rt) against 0
+    // Basically, it's equivalent to say:
+    //
+    // add r0, r1, r2   -> add. r0, r1, r2
+    // cmpli r0, 0
+    //
+    // CR0:
+    // 0 - 0x08 - N/LT, result is negative
+    // 1 - 0x04 - P/GT, result is positive
+    // 2 - 0x02 - Z/EQ, result is zero
+    // 3 - 0x01 - S/SO, summary overflow (carry?)
+    // XER:
+    // 32 - SO
+    // 33 - Overflow
+    // 34 - Carry
+    // NZCV -> (CR0.0, CR0.2, XER.34, XER.33)
+    if (false) {
+        //code.MFSPR(powah::GPR{1}, tmp4, powah::R0); // From XER
+        /*uint64_t nzcv(uint64_t cr0, uint64_t xer) {
+            return ((xer >> 33) & 1)
+                | (((xer >> 34) & 1) << 1)
+                | (((cr0 >> (32 + 2)) & 1) << 2)
+                | (((cr0 >> (32 + 0)) & 1) << 3);
+        }*/
+        // auto const tmp9 = ctx.reg_alloc.ScratchGpr();
+        // auto const tmp10 = ctx.reg_alloc.ScratchGpr();
+        // code.SRDI(tmp9, tmp3, 34);
+        // code.RLDICL(tmp10, tmp4, 31, 63);
+        // code.SRDI(tmp3, tmp3, 32);
+        // code.RLDIC(tmp9, tmp9, 2, 61);
+        // code.OR(tmp9, tmp9, tmp10);
+        // code.RLDIC(tmp3, tmp3, 3, 60);
+        // code.SRDI(tmp4, tmp4, 34);
+        // code.OR(tmp3, tmp9, tmp3);
+        // code.RLDIC(tmp4, tmp4, 1, 62);
+        // code.OR(tmp3, tmp3, tmp4);
+    } else {
+        // MFCR Fills RT 32:63, RT 0:31 left blank
+        auto const tmp3 = ctx.reg_alloc.ScratchGpr();
+        code.MR(tmp3, PPC64::RNZCV);
+        ctx.reg_alloc.DefineValue(inst, tmp3);
+    }
+}
+
+template<>
+void EmitIR<IR::Opcode::GetNZFromOp>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::GetUpperFromOp>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::GetLowerFromOp>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::GetCFlagFromNZCV>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::NZCVFromPackedFlags>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+namespace {
+
+void EmitLeafTerminal(powah::Context& code, EmitContext& ctx, IR::Term::LeafTerminal const& terminal, IR::LocationDescriptor initial_location, bool is_single_step);
+void EmitTerminal(powah::Context& code, EmitContext& ctx, IR::Term::Terminal const& terminal, IR::LocationDescriptor initial_location, bool is_single_step);
+
+void EmitTerminal(powah::Context& code, EmitContext& ctx, IR::Term::ReturnToDispatch, IR::LocationDescriptor, bool) {
+    ASSERT(false && "unimp");
+}
+
+// r3 -> process
+// r4 -> thread_ctx
+// r5 -> halt_reason
+// r6 -> test_thunk
+void EmitTerminal(powah::Context& code, EmitContext& ctx, IR::Term::LinkBlock terminal, IR::LocationDescriptor initial_location, bool) {
+    if (ctx.emit_conf.a64_variant) {
+        auto const tmp = ctx.reg_alloc.ScratchGpr();
+        code.LI(tmp, terminal.next.Value());
+        code.STD(tmp, PPC64::RJIT, offsetof(A64JitState, pc));
+        code.B(ctx.l_return);
+    } else {
+        auto const tmp = ctx.reg_alloc.ScratchGpr();
+        code.LI(tmp, terminal.next.Value());
+        code.STW(tmp, PPC64::RJIT, offsetof(A32JitState, regs) + sizeof(u32) * 15);
+        ASSERT(false && "unimp");
+    }
+}
+
+void EmitTerminal(powah::Context& code, EmitContext& ctx, IR::Term::LinkBlockFast terminal, IR::LocationDescriptor initial_location, bool is_single_step) {
+    EmitTerminal(code, ctx, IR::Term::LinkBlock{terminal.next}, initial_location, is_single_step);
+}
+
+void EmitTerminal(powah::Context& code, EmitContext& ctx, IR::Term::PopRSBHint, IR::LocationDescriptor, bool) {
+    ASSERT(false && "unimp");
+}
+
+void EmitTerminal(powah::Context& code, EmitContext& ctx, IR::Term::FastDispatchHint, IR::LocationDescriptor, bool) {
+    ASSERT(false && "unimp");
+}
+
+void EmitTerminal(powah::Context& code, EmitContext& ctx, IR::Term::If terminal, IR::LocationDescriptor initial_location, bool is_single_step) {
+    ASSERT(false && "unimp");
+}
+
+void EmitTerminal(powah::Context& code, EmitContext& ctx, IR::Term::CheckBit terminal, IR::LocationDescriptor initial_location, bool is_single_step) {
+    powah::Label const l_else = code.DefineLabel();
+    powah::Label const l_end = code.DefineLabel();
+    auto const tmp = ctx.reg_alloc.ScratchGpr();
+    code.LWZ(tmp, PPC64::RJIT, offsetof(A64JitState, check_bit));
+    code.CMPLDI(tmp, 0);
+    code.BEQ(powah::CR0, l_else);
+    // CheckBit == 1
+    EmitLeafTerminal(code, ctx, terminal.then_, initial_location, is_single_step);
+    code.B(l_end);
+    // CheckBit == 0
+    code.LABEL(l_else);
+    EmitLeafTerminal(code, ctx, terminal.else_, initial_location, is_single_step);
+    code.LABEL(l_end);
+}
+
+void EmitTerminal(powah::Context& code, EmitContext& ctx, IR::Term::CheckHalt terminal, IR::LocationDescriptor initial_location, bool is_single_step) {
+    ASSERT(false && "unimp");
+}
+
+void EmitLeafTerminal(powah::Context& code, EmitContext& ctx, IR::Term::LeafTerminal const& terminal, IR::LocationDescriptor initial_location, bool is_single_step) {
+    if (auto const x = std::get_if<IR::Term::ReturnToDispatch>(&terminal))
+        return EmitTerminal(code, ctx, *x, initial_location, is_single_step);
+    if (auto const x = std::get_if<IR::Term::LinkBlock>(&terminal))
+        return EmitTerminal(code, ctx, *x, initial_location, is_single_step);
+    if (auto const x = std::get_if<IR::Term::LinkBlockFast>(&terminal))
+        return EmitTerminal(code, ctx, *x, initial_location, is_single_step);
+    if (auto const x = std::get_if<IR::Term::PopRSBHint>(&terminal))
+        return EmitTerminal(code, ctx, *x, initial_location, is_single_step);
+    if (auto const x = std::get_if<IR::Term::FastDispatchHint>(&terminal))
+        return EmitTerminal(code, ctx, *x, initial_location, is_single_step);
+    UNREACHABLE();
+}
+
+void EmitTerminal(powah::Context& code, EmitContext& ctx, IR::Term::Terminal const& terminal, IR::LocationDescriptor initial_location, bool is_single_step) {
+    if (auto const x = std::get_if<IR::Term::LeafTerminal>(&terminal))
+        return EmitLeafTerminal(code, ctx, *x, initial_location, is_single_step);
+    if (auto const x = std::get_if<IR::Term::If>(&terminal))
+        return EmitTerminal(code, ctx, *x, initial_location, is_single_step);
+    if (auto const x = std::get_if<IR::Term::CheckBit>(&terminal))
+        return EmitTerminal(code, ctx, *x, initial_location, is_single_step);
+    if (auto const x = std::get_if<IR::Term::CheckHalt>(&terminal))
+        return EmitTerminal(code, ctx, *x, initial_location, is_single_step);
+    UNREACHABLE();
+}
+}
+
+EmittedBlockInfo EmitPPC64(powah::Context& code, IR::Block block, const EmitConfig& emit_conf) {
+    EmittedBlockInfo ebi;
+    RegAlloc reg_alloc{code};
+    EmitContext ctx{block, reg_alloc, emit_conf, ebi, code.DefineLabel()};
+    size_t const stack_size = 112 + ABI_CALLEE_SAVED.size() * 8;
+    auto const start_offset = code.offset;
+    ebi.entry_point = &code.base[start_offset];
+    if (!block.instructions.empty()) {
+        code.MFLR(powah::R0);
+        code.STD(powah::R0, powah::R1, 16);
+        // Non-volatile saves
+        std::vector<powah::GPR> gp_regs{ABI_CALLEE_SAVED};
+        for (size_t i = 0; i < gp_regs.size(); ++i)
+            code.STD(gp_regs[i], powah::R1, -int32_t(gp_regs.size() - i) * 8);
+        code.STDU(powah::R1, powah::R1, uint32_t(-stack_size));
+        code.STD(powah::R2, powah::R1, 40);
+
+        for (auto iter = block.instructions.begin(); iter != block.instructions.end(); ++iter) {
+            IR::Inst* inst = &*iter;
+            switch (inst->GetOpcode()) {
+#define OPCODE(name, type, ...)                  \
+        case IR::Opcode::name:                       \
+            EmitIR<IR::Opcode::name>(code, ctx, inst); \
+            break;
+#define A32OPC(name, type, ...)                       \
+        case IR::Opcode::A32##name:                       \
+            EmitIR<IR::Opcode::A32##name>(code, ctx, inst); \
+            break;
+#define A64OPC(name, type, ...)                       \
+        case IR::Opcode::A64##name:                       \
+            EmitIR<IR::Opcode::A64##name>(code, ctx, inst); \
+            break;
+#include "dynarmic/ir/opcodes.inc"
+#undef OPCODE
+#undef A32OPC
+#undef A64OPC
+            default:
+                UNREACHABLE();
+            }
+        }
+
+        // auto const cycles_to_add = block.CycleCount();
+        EmitTerminal(code, ctx, ctx.block.GetTerminal(), ctx.block.Location(), false);
+        code.LABEL(ctx.l_return);
+        code.ADDI(powah::R1, powah::R1, stack_size);
+        for (size_t i = 0; i < gp_regs.size(); ++i)
+            code.LD(gp_regs[i], powah::R1, -int32_t(gp_regs.size() - i) * 8);
+        code.LD(powah::R0, powah::R1, 16);
+        code.MTLR(powah::R0);
+        code.LI(powah::R3, 0);
+    } else {
+        EmitTerminal(code, ctx, ctx.block.GetTerminal(), ctx.block.Location(), false);
+        code.LABEL(ctx.l_return);
+        code.LI(powah::R3, 67); //non-zero ret
+    }
+    code.BLR();
+    code.ApplyRelocs();
+
+    /*
+    llvm-objcopy -I binary -O elf64-powerpc --rename-section=.data=.text,code test.bin test.elf && llvm-objdump -d test.elf
+    */
+    static FILE* fp = fopen("test.bin", "wb");
+    fwrite(code.base, code.offset - start_offset, sizeof(uint32_t), fp);
+    fflush(fp);
+
+    ebi.size = code.offset - start_offset;
+    return ebi;
+}
+
+}  // namespace Dynarmic::Backend::RV64

src/dynarmic/src/dynarmic/backend/ppc64/emit_ppc64.h

@@ -0,0 +1,41 @@
+// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project
+// SPDX-License-Identifier: GPL-3.0-or-later
+
+#pragma once
+
+#include <vector>
+
+#include <powah_emit.hpp>
+#include "common/common_types.h"
+
+namespace biscuit {
+class Assembler;
+}  // namespace biscuit
+
+namespace Dynarmic::IR {
+class Block;
+class Inst;
+enum class Cond;
+enum class Opcode;
+}  // namespace Dynarmic::IR
+
+namespace Dynarmic::Backend::PPC64 {
+
+struct EmittedBlockInfo {
+    std::uint32_t* entry_point;
+    size_t size;
+};
+
+struct EmitConfig {
+    bool enable_cycle_counting;
+    bool always_little_endian;
+    bool a64_variant;
+};
+
+struct EmitContext;
+
+EmittedBlockInfo EmitPPC64(powah::Context& code, IR::Block block, const EmitConfig& emit_conf);
+template<IR::Opcode op>
+void EmitIR(powah::Context& code, EmitContext& ctx, IR::Inst* inst);
+
+}  // namespace Dynarmic::Backend::RV64

src/dynarmic/src/dynarmic/backend/ppc64/emit_ppc64_a32.cpp

@@ -0,0 +1,318 @@
+// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project
+// SPDX-License-Identifier: GPL-3.0-or-later
+
+#include <powah_emit.hpp>
+#include <fmt/ostream.h>
+
+#include "dynarmic/frontend/A32/a32_types.h"
+#include "dynarmic/backend/ppc64/a32_core.h"
+#include "dynarmic/backend/ppc64/abi.h"
+#include "dynarmic/backend/ppc64/emit_context.h"
+#include "dynarmic/backend/ppc64/emit_ppc64.h"
+#include "dynarmic/backend/ppc64/reg_alloc.h"
+#include "dynarmic/ir/basic_block.h"
+#include "dynarmic/ir/microinstruction.h"
+#include "dynarmic/ir/opcodes.h"
+
+namespace Dynarmic::Backend::PPC64 {
+
+template<>
+void EmitIR<IR::Opcode::A32SetCheckBit>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A32GetRegister>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    if (inst->GetArg(0).GetType() == IR::Type::A32Reg) {
+        auto const result = ctx.reg_alloc.ScratchGpr();
+        code.ADDI(result, PPC64::RJIT, A32::RegNumber(inst->GetArg(0).GetA32RegRef()) * sizeof(u32));
+        code.LWZ(result, result, offsetof(A32JitState, regs));
+        ctx.reg_alloc.DefineValue(inst, result);
+    } else {
+        ASSERT(false && "unimp");
+    }
+}
+
+template<>
+void EmitIR<IR::Opcode::A32GetExtendedRegister32>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A32GetExtendedRegister64>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A32GetVector>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A32SetRegister>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const value = ctx.reg_alloc.UseGpr(inst->GetArg(1));
+    if (inst->GetArg(0).GetType() == IR::Type::A32Reg) {
+        auto const addr = ctx.reg_alloc.ScratchGpr();
+        code.ADDI(addr, PPC64::RJIT, A32::RegNumber(inst->GetArg(0).GetA32RegRef()) * sizeof(u32));
+        code.STW(value, addr, offsetof(A32JitState, regs));
+    } else {
+        ASSERT(false && "unimp");
+    }
+}
+
+template<>
+void EmitIR<IR::Opcode::A32SetExtendedRegister32>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A32SetExtendedRegister64>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A32SetVector>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A32GetCpsr>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A32SetCpsr>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A32SetCpsrNZCV>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A32SetCpsrNZCVRaw>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A32SetCpsrNZCVQ>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A32SetCpsrNZ>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A32SetCpsrNZC>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A32GetCFlag>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const result = ctx.reg_alloc.ScratchGpr();
+    code.LD(result, PPC64::RJIT, offsetof(A32JitState, cpsr_nzcv));
+    code.RLWINM(result, result, 31, 31, 31);
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
+template<>
+void EmitIR<IR::Opcode::A32OrQFlag>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A32GetGEFlags>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A32SetGEFlags>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A32SetGEFlagsCompressed>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A32BXWritePC>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A32UpdateUpperLocationDescriptor>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A32CallSupervisor>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A32ExceptionRaised>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A32DataSynchronizationBarrier>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A32DataMemoryBarrier>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A32InstructionSynchronizationBarrier>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A32GetFpscr>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A32SetFpscr>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A32GetFpscrNZCV>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A32SetFpscrNZCV>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+// Memory
+template<>
+void EmitIR<IR::Opcode::A32ClearExclusive>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A32ReadMemory8>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A32ReadMemory16>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A32ReadMemory32>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A32ReadMemory64>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A32ExclusiveReadMemory8>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A32ExclusiveReadMemory16>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A32ExclusiveReadMemory32>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A32ExclusiveReadMemory64>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A32WriteMemory8>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A32WriteMemory16>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A32WriteMemory32>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A32WriteMemory64>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A32ExclusiveWriteMemory8>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A32ExclusiveWriteMemory16>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A32ExclusiveWriteMemory32>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A32ExclusiveWriteMemory64>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+// Coprocesor
+template<>
+void EmitIR<IR::Opcode::A32CoprocInternalOperation>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A32CoprocSendOneWord>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A32CoprocSendTwoWords>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A32CoprocGetOneWord>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A32CoprocGetTwoWords>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A32CoprocLoadWords>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A32CoprocStoreWords>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+}  // namespace Dynarmic::Backend::RV64

src/dynarmic/src/dynarmic/backend/ppc64/emit_ppc64_a64.cpp

@@ -0,0 +1,341 @@
+// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project
+// SPDX-License-Identifier: GPL-3.0-or-later
+
+#include <powah_emit.hpp>
+#include <fmt/ostream.h>
+
+#include "dynarmic/frontend/A64/a64_types.h"
+#include "dynarmic/backend/ppc64/a64_core.h"
+#include "dynarmic/backend/ppc64/abi.h"
+#include "dynarmic/backend/ppc64/emit_context.h"
+#include "dynarmic/backend/ppc64/emit_ppc64.h"
+#include "dynarmic/backend/ppc64/reg_alloc.h"
+#include "dynarmic/ir/basic_block.h"
+#include "dynarmic/ir/microinstruction.h"
+#include "dynarmic/ir/opcodes.h"
+
+namespace Dynarmic::Backend::PPC64 {
+
+template<>
+void EmitIR<IR::Opcode::A64SetCheckBit>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const value = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    code.STW(value, PPC64::RJIT, offsetof(A64JitState, check_bit));
+}
+
+template<>
+void EmitIR<IR::Opcode::A64GetCFlag>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A64GetNZCVRaw>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A64SetNZCVRaw>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A64SetNZCV>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const value = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    code.STW(value, PPC64::RJIT, offsetof(A64JitState, pstate));
+}
+
+template<>
+void EmitIR<IR::Opcode::A64GetW>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    if (inst->GetArg(0).GetType() == IR::Type::A64Reg) {
+        auto const result = ctx.reg_alloc.ScratchGpr();
+        // Need to account for endianess here...
+        auto const offs = offsetof(A64JitState, regs)
+            + A64::RegNumber(inst->GetArg(0).GetA64RegRef()) * sizeof(u64);
+        code.LWZ(result, PPC64::RJIT, offs);
+        ctx.reg_alloc.DefineValue(inst, result);
+    } else {
+        ASSERT(false && "unimp");
+    }
+}
+
+template<>
+void EmitIR<IR::Opcode::A64GetX>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    if (inst->GetArg(0).GetType() == IR::Type::A64Reg) {
+        auto const result = ctx.reg_alloc.ScratchGpr();
+        auto const offs = offsetof(A64JitState, regs)
+            + A64::RegNumber(inst->GetArg(0).GetA64RegRef()) * sizeof(u64);
+        code.LD(result, PPC64::RJIT, offs);
+        ctx.reg_alloc.DefineValue(inst, result);
+    } else {
+        ASSERT(false && "unimp");
+    }
+}
+
+template<>
+void EmitIR<IR::Opcode::A64GetS>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A64GetD>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A64GetQ>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A64GetSP>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A64GetFPCR>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A64GetFPSR>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A64SetW>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const value = ctx.reg_alloc.UseGpr(inst->GetArg(1));
+    if (inst->GetArg(0).GetType() == IR::Type::A64Reg) {
+        auto const tmp = ctx.reg_alloc.ScratchGpr();
+        auto const offs = offsetof(A64JitState, regs)
+            + A64::RegNumber(inst->GetArg(0).GetA64RegRef()) * sizeof(u64);
+        code.RLDICL(tmp, value, 0, 32);
+        code.STD(tmp, PPC64::RJIT, offs);
+    } else {
+        ASSERT(false && "unimp");
+    }
+}
+
+template<>
+void EmitIR<IR::Opcode::A64SetX>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const value = ctx.reg_alloc.UseGpr(inst->GetArg(1));
+    if (inst->GetArg(0).GetType() == IR::Type::A64Reg) {
+        auto const offs = offsetof(A64JitState, regs)
+            + A64::RegNumber(inst->GetArg(0).GetA64RegRef()) * sizeof(u64);
+        code.STD(value, PPC64::RJIT, offs);
+    } else {
+        ASSERT(false && "unimp");
+    }
+}
+
+template<>
+void EmitIR<IR::Opcode::A64SetS>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A64SetD>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A64SetQ>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A64SetSP>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A64SetFPCR>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A64SetFPSR>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A64SetPC>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A64CallSupervisor>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A64ExceptionRaised>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A64DataCacheOperationRaised>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A64InstructionCacheOperationRaised>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A64DataSynchronizationBarrier>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A64DataMemoryBarrier>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A64InstructionSynchronizationBarrier>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A64GetCNTFRQ>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A64GetCNTPCT>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A64GetCTR>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A64GetDCZID>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A64GetTPIDR>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A64GetTPIDRRO>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A64SetTPIDR>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    ASSERT(false && "unimp");
+}
+
+// Memory
+template<>
+void EmitIR<IR::Opcode::A64ClearExclusive>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A64ReadMemory8>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A64ReadMemory16>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A64ReadMemory32>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A64ReadMemory64>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A64ReadMemory128>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A64ExclusiveReadMemory8>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A64ExclusiveReadMemory16>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A64ExclusiveReadMemory32>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A64ExclusiveReadMemory64>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A64ExclusiveReadMemory128>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A64WriteMemory8>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A64WriteMemory16>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A64WriteMemory32>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A64WriteMemory64>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A64WriteMemory128>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A64ExclusiveWriteMemory8>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A64ExclusiveWriteMemory16>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A64ExclusiveWriteMemory32>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A64ExclusiveWriteMemory64>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::A64ExclusiveWriteMemory128>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    ASSERT(false && "unimp");
+}
+
+
+}  // namespace Dynarmic::Backend::RV64

src/dynarmic/src/dynarmic/backend/ppc64/emit_ppc64_data_processing.cpp

@@ -0,0 +1,933 @@
+// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project
+// SPDX-License-Identifier: GPL-3.0-or-later
+
+#include <powah_emit.hpp>
+#include <fmt/ostream.h>
+
+#include "common/assert.h"
+#include "dynarmic/backend/ppc64/a32_core.h"
+#include "dynarmic/backend/ppc64/abi.h"
+#include "dynarmic/backend/ppc64/emit_context.h"
+#include "dynarmic/backend/ppc64/emit_ppc64.h"
+#include "dynarmic/backend/ppc64/reg_alloc.h"
+#include "dynarmic/ir/basic_block.h"
+#include "dynarmic/ir/microinstruction.h"
+#include "dynarmic/ir/opcodes.h"
+
+namespace Dynarmic::Backend::PPC64 {
+
+// uint64_t pack2x1(uint32_t lo, uint32_t hi) { return (uint64_t)lo | ((uint64_t)hi << 32); }
+template<>
+void EmitIR<IR::Opcode::Pack2x32To1x64>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const lo = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    auto const hi = ctx.reg_alloc.UseGpr(inst->GetArg(1));
+    auto const result = ctx.reg_alloc.ScratchGpr();
+    code.SLDI(result, hi, 32);
+    code.OR(result, result, lo);
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
+template<>
+void EmitIR<IR::Opcode::Pack2x64To1x128>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    ASSERT(false && "unimp");
+}
+
+// uint64_t lsw(uint64_t a) { return (uint32_t)a; }
+template<>
+void EmitIR<IR::Opcode::LeastSignificantWord>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const result = ctx.reg_alloc.ScratchGpr();
+    auto const source = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    code.RLDICL(result, source, 0, 32);
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
+// uint64_t f(uint64_t a) { return (uint16_t)a; }
+template<>
+void EmitIR<IR::Opcode::LeastSignificantHalf>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const result = ctx.reg_alloc.ScratchGpr();
+    auto const source = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    code.RLWINM(result, source, 0, 0xffff);
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
+// uint64_t f(uint64_t a) { return (uint8_t)a; }
+template<>
+void EmitIR<IR::Opcode::LeastSignificantByte>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const result = ctx.reg_alloc.ScratchGpr();
+    auto const source = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    code.RLWINM(result, source, 0, 0xff);
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
+// uint64_t msw(uint64_t a) { return a >> 32; }
+template<>
+void EmitIR<IR::Opcode::MostSignificantWord>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const result = ctx.reg_alloc.ScratchGpr();
+    auto const source = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    code.SRDI(result, source, 32);
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
+/*
+uint64_t f(uint64_t a) { return ((uint32_t)a) >> 31; }
+*/
+template<>
+void EmitIR<IR::Opcode::MostSignificantBit>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const result = ctx.reg_alloc.ScratchGpr();
+    auto const source = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    code.RLWINM(result, source, 1, 31, 31);
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
+/*
+uint64_t f(uint64_t a) { return (uint32_t)a == 0; }
+*/
+template<>
+void EmitIR<IR::Opcode::IsZero32>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const result = ctx.reg_alloc.ScratchGpr();
+    auto const source = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    code.CNTLZW(result, source);
+    code.SRWI(result, result, 5);
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
+/*
+uint64_t f(uint64_t a) { return a == 0; }
+*/
+template<>
+void EmitIR<IR::Opcode::IsZero64>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const result = ctx.reg_alloc.ScratchGpr();
+    auto const source = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    code.CNTLZD(result, source);
+    code.SRDI(result, result, 6);
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
+/*
+uint64_t f(uint64_t a) { return (a & 1) != 0; }
+*/
+template<>
+void EmitIR<IR::Opcode::TestBit>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const result = ctx.reg_alloc.ScratchGpr();
+    auto const source = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    if (inst->GetArg(1).IsImmediate()) {
+        auto const shift = inst->GetArg(1).GetImmediateAsU64();
+        if (shift > 0) {
+            code.RLDICL(result, source, (64 - shift - 1) & 0x3f, 63);
+        }
+    } else {
+        ASSERT(false && "unimp");
+    }
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
+/*
+struct jit {
+    uint64_t t;
+    uint64_t a;
+};
+uint64_t f(jit *p, uint64_t a, uint64_t b) {
+    bool n = (p->a & 0b1000) != 0;
+    bool z = (p->a & 0b0100) != 0;
+    bool c = (p->a & 0b0010) != 0;
+    bool v = (p->a & 0b0001) != 0;
+    return (p->a & 0b0001) == 0 ? a : b;
+}
+*/
+static powah::GPR EmitConditionalSelectX(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const nzcv = ctx.reg_alloc.ScratchGpr();
+    auto const then_ = ctx.reg_alloc.UseGpr(inst->GetArg(1));
+    auto const else_ = ctx.reg_alloc.UseGpr(inst->GetArg(2));
+    switch (inst->GetArg(0).GetCond()) {
+    case IR::Cond::EQ: // Z == 1
+        code.LD(nzcv, PPC64::RJIT, offsetof(A32JitState, cpsr_nzcv));
+        code.ANDI_(nzcv, nzcv, 4);
+        code.ISELGT(nzcv, then_, else_);
+        break;
+    case IR::Cond::NE: // Z == 0
+        code.LD(nzcv, PPC64::RJIT, offsetof(A32JitState, cpsr_nzcv));
+        code.ANDI_(nzcv, nzcv, 4);
+        code.ISELGT(nzcv, then_, else_);
+        break;
+    case IR::Cond::CS: // C == 1
+        code.LD(nzcv, PPC64::RJIT, offsetof(A32JitState, cpsr_nzcv));
+        code.ANDI_(nzcv, nzcv, 2);
+        code.ISELGT(nzcv, then_, else_);
+        break;
+    case IR::Cond::CC: // C == 0
+        code.LD(nzcv, PPC64::RJIT, offsetof(A32JitState, cpsr_nzcv));
+        code.ANDI_(nzcv, nzcv, 2);
+        code.ISELGT(nzcv, then_, else_);
+        break;
+    case IR::Cond::MI: // N == 1
+        code.LD(nzcv, PPC64::RJIT, offsetof(A32JitState, cpsr_nzcv));
+        code.ANDI_(nzcv, nzcv, 8);
+        code.ISELGT(nzcv, then_, else_);
+        break;
+    case IR::Cond::PL: // N == 0
+        code.LD(nzcv, PPC64::RJIT, offsetof(A32JitState, cpsr_nzcv));
+        code.ANDI_(nzcv, nzcv, 8);
+        code.ISELGT(nzcv, then_, else_);
+        break;
+    case IR::Cond::VS: // V == 1
+        code.LD(nzcv, PPC64::RJIT, offsetof(A32JitState, cpsr_nzcv));
+        code.ANDI_(nzcv, nzcv, 1);
+        code.ISELGT(nzcv, then_, else_);
+        break;
+    case IR::Cond::VC: // V == 0
+        code.LD(nzcv, PPC64::RJIT, offsetof(A32JitState, cpsr_nzcv));
+        code.ANDI_(nzcv, nzcv, 1);
+        code.ISELGT(nzcv, else_, then_);
+        break;
+    case IR::Cond::HI: // Z == 0 && C == 1
+        code.LD(nzcv, PPC64::RJIT, offsetof(A32JitState, cpsr_nzcv));
+        code.RLWINM(nzcv, nzcv, 0, 29, 30);
+        code.CMPLDI(nzcv, 2);
+        code.ISELEQ(nzcv, then_, else_);
+        break;
+    case IR::Cond::LS: // Z == 1 || C == 0
+        code.LD(nzcv, PPC64::RJIT, offsetof(A32JitState, cpsr_nzcv));
+        code.RLWINM(nzcv, nzcv, 0, 29, 30);
+        code.CMPLDI(nzcv, 2);
+        code.ISELEQ(nzcv, else_, then_);
+        break;
+    case IR::Cond::GE: { // N == V
+        auto const tmp = ctx.reg_alloc.ScratchGpr();
+        code.LWZ(nzcv, PPC64::RJIT, offsetof(A32JitState, cpsr_nzcv));
+        code.SRWI(tmp, nzcv, 3);
+        code.XOR(nzcv, tmp, nzcv);
+        code.ANDI_(nzcv, nzcv, 1);
+        code.ISELGT(nzcv, else_, then_);
+    } break;
+    case IR::Cond::LT: { // N != V
+        auto const tmp = ctx.reg_alloc.ScratchGpr();
+        code.LWZ(nzcv, PPC64::RJIT, offsetof(A32JitState, cpsr_nzcv));
+        code.SRWI(tmp, nzcv, 3);
+        code.XOR(nzcv, tmp, nzcv);
+        code.ANDI_(nzcv, nzcv, 1);
+        code.ISELGT(nzcv, then_, else_);
+    } break;
+    case IR::Cond::GT: { // Z == 0 && N == V
+        auto const tmp = ctx.reg_alloc.ScratchGpr();
+        powah::Label const l_ne = code.DefineLabel();
+        powah::Label const l_cc = code.DefineLabel();
+        powah::Label const l_fi = code.DefineLabel();
+        code.LD(nzcv, PPC64::RJIT, offsetof(A32JitState, cpsr_nzcv));
+        code.ANDI_(tmp, nzcv, 4);
+        code.BNE(powah::CR0, l_ne);
+        code.SRWI(tmp, nzcv, 3);
+        code.XOR(nzcv, tmp, nzcv);
+        code.ANDI_(nzcv, nzcv, 1);
+        code.CMPLDI(nzcv, 0);
+        code.BGT(powah::CR0, l_fi);
+        code.LABEL(l_ne);
+        code.MR(then_, else_);
+        code.LABEL(l_cc);
+        code.MR(nzcv, then_);
+        code.LABEL(l_fi);
+    } break;
+    case IR::Cond::LE: { // Z == 1 || N != V
+        auto const tmp = ctx.reg_alloc.ScratchGpr();
+        auto const tmp2 = ctx.reg_alloc.ScratchGpr();
+        powah::Label const l_ne = code.DefineLabel();
+        code.MR(tmp2, then_);
+        code.LD(nzcv, PPC64::RJIT, offsetof(A32JitState, cpsr_nzcv));
+        code.ANDI_(tmp, nzcv, 4);
+        code.BNE(powah::CR0, l_ne);
+        code.SRWI(tmp, nzcv, 3);
+        code.XOR(nzcv, tmp, nzcv);
+        code.ANDI_(nzcv, nzcv, 1);
+        code.ISELGT(tmp2, then_, else_);
+        code.LABEL(l_ne);
+        code.MR(nzcv, tmp2);
+    } break;
+    default:
+        ASSERT(false && "unimp");
+    }
+    return nzcv;
+}
+
+template<>
+void EmitIR<IR::Opcode::ConditionalSelect32>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const result = EmitConditionalSelectX(code, ctx, inst);
+    code.RLDICL(result, result, 0, 32);
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
+template<>
+void EmitIR<IR::Opcode::ConditionalSelect64>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const result = EmitConditionalSelectX(code, ctx, inst);
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
+template<>
+void EmitIR<IR::Opcode::ConditionalSelectNZCV>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const result = EmitConditionalSelectX(code, ctx, inst);
+    code.RLDICL(result, result, 0, 32);
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
+template<>
+void EmitIR<IR::Opcode::LogicalShiftLeft32>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const result = ctx.reg_alloc.ScratchGpr();
+    auto const source = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    auto const shift = ctx.reg_alloc.UseGpr(inst->GetArg(1));
+    code.SLW(result, source, shift);
+    code.RLDICL(result, result, 0, 32);
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
+template<>
+void EmitIR<IR::Opcode::LogicalShiftLeft64>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const result = ctx.reg_alloc.ScratchGpr();
+    auto const source = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    auto const shift = ctx.reg_alloc.UseGpr(inst->GetArg(1));
+    code.SLD(result, source, shift);
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
+template<>
+void EmitIR<IR::Opcode::LogicalShiftRight32>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const result = ctx.reg_alloc.ScratchGpr();
+    auto const source = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    auto const shift = ctx.reg_alloc.UseGpr(inst->GetArg(1));
+    code.SRW(result, source, shift);
+    code.RLDICL(result, result, 0, 32);
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
+/*
+uint64_t f(uint64_t a, uint64_t s) { return a >> s; }
+*/
+template<>
+void EmitIR<IR::Opcode::LogicalShiftRight64>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const result = ctx.reg_alloc.ScratchGpr();
+    auto const source = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    auto const shift = ctx.reg_alloc.UseGpr(inst->GetArg(1));
+    code.SRD(result, source, shift);
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
+template<>
+void EmitIR<IR::Opcode::ArithmeticShiftRight32>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const result = ctx.reg_alloc.ScratchGpr();
+    auto const source = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    auto const shift = ctx.reg_alloc.UseGpr(inst->GetArg(1));
+    code.SRAW(result, source, shift);
+    code.RLDICL(result, result, 0, 32);
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
+template<>
+void EmitIR<IR::Opcode::ArithmeticShiftRight64>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const result = ctx.reg_alloc.ScratchGpr();
+    auto const source = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    auto const shift = ctx.reg_alloc.UseGpr(inst->GetArg(1));
+    code.SRAD(result, source, shift);
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
+// __builtin_rotateright32
+template<>
+void EmitIR<IR::Opcode::BitRotateRight32>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const result = ctx.reg_alloc.ScratchGpr();
+    auto const src_a = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    auto const src_b = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    code.NEG(result, src_a, powah::R0);
+    code.ROTLW(result, result, src_b);
+    code.RLDICL(result, result, 0, 32);
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
+template<>
+void EmitIR<IR::Opcode::BitRotateRight64>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const result = ctx.reg_alloc.ScratchGpr();
+    auto const src_a = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    auto const src_b = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    code.NEG(result, src_a, powah::R0);
+    code.ROTLD(result, result, src_b);
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
+template<>
+void EmitIR<IR::Opcode::RotateRightExtended>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const result = ctx.reg_alloc.ScratchGpr();
+    auto const src_a = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    auto const src_b = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    code.NEG(result, src_a, powah::R0);
+    code.ROTLD(result, result, src_b);
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
+template<>
+void EmitIR<IR::Opcode::LogicalShiftLeftMasked32>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const result = ctx.reg_alloc.ScratchGpr();
+    auto const source = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    code.SLW(result, source, source);
+    code.RLDICL(result, result, 0, 32);
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
+template<>
+void EmitIR<IR::Opcode::LogicalShiftLeftMasked64>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const result = ctx.reg_alloc.ScratchGpr();
+    auto const source = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    code.SLD(result, source, source);
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
+template<>
+void EmitIR<IR::Opcode::LogicalShiftRightMasked32>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const result = ctx.reg_alloc.ScratchGpr();
+    auto const source = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    code.SRW(result, source, source);
+    code.RLDICL(result, result, 0, 32);
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
+template<>
+void EmitIR<IR::Opcode::LogicalShiftRightMasked64>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const result = ctx.reg_alloc.ScratchGpr();
+    auto const source = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    code.SRD(result, source, source);
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
+template<>
+void EmitIR<IR::Opcode::ArithmeticShiftRightMasked32>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const result = ctx.reg_alloc.ScratchGpr();
+    auto const source = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    code.SRAW(result, source, source);
+    code.RLDICL(result, result, 0, 32);
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
+template<>
+void EmitIR<IR::Opcode::ArithmeticShiftRightMasked64>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const result = ctx.reg_alloc.ScratchGpr();
+    auto const source = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    code.SRAD(result, source, source);
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
+template<>
+void EmitIR<IR::Opcode::RotateRightMasked32>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const result = ctx.reg_alloc.ScratchGpr();
+    auto const src_a = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    auto const src_b = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    code.NEG(result, src_a, powah::R0);
+    code.ROTLD(result, result, src_b);
+    code.RLDICL(result, result, 0, 32);
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
+template<>
+void EmitIR<IR::Opcode::RotateRightMasked64>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const result = ctx.reg_alloc.ScratchGpr();
+    auto const src_a = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    auto const src_b = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    code.NEG(result, src_a, powah::R0);
+    code.ROTLD(result, result, src_b);
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
+template<>
+void EmitIR<IR::Opcode::Add32>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const result = ctx.reg_alloc.ScratchGpr();
+    auto const src_a = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    auto const src_b = ctx.reg_alloc.UseGpr(inst->GetArg(1));
+    code.ADDC_(result, src_a, src_b);
+    code.RLDICL(result, result, 0, 32);
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
+/*
+struct jit {
+    uint32_t nzcv;
+};
+uint64_t addc(jit *p, uint64_t a, uint64_t b) {
+    long long unsigned int e;
+    uint64_t r = __builtin_addcll(a, b, p->nzcv & 0b0010, &e);
+    p->nzcv = (p->nzcv & 0b1101) | e;
+    return r;
+}
+*/
+template<>
+void EmitIR<IR::Opcode::Add64>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const result = ctx.reg_alloc.ScratchGpr();
+    auto const src_a = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    auto const src_b = ctx.reg_alloc.UseGpr(inst->GetArg(1));
+    code.ADDC_(result, src_a, src_b);
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
+template<>
+void EmitIR<IR::Opcode::Sub32>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const result = ctx.reg_alloc.ScratchGpr();
+    auto const src_a = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    auto const src_b = ctx.reg_alloc.UseGpr(inst->GetArg(1));
+    code.SUBFC_(result, src_b, src_a);
+    code.RLDICL(result, result, 0, 32);
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
+template<>
+void EmitIR<IR::Opcode::Sub64>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const result = ctx.reg_alloc.ScratchGpr();
+    auto const src_a = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    auto const src_b = ctx.reg_alloc.UseGpr(inst->GetArg(1));
+    code.SUBFC_(result, src_b, src_a);
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
+template<>
+void EmitIR<IR::Opcode::Mul32>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const result = ctx.reg_alloc.ScratchGpr();
+    auto const src_a = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    auto const src_b = ctx.reg_alloc.UseGpr(inst->GetArg(1));
+    code.MULLWO_(result, src_a, src_b);
+    code.RLDICL(result, result, 0, 32);
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
+template<>
+void EmitIR<IR::Opcode::Mul64>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const result = ctx.reg_alloc.ScratchGpr();
+    auto const src_a = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    auto const src_b = ctx.reg_alloc.UseGpr(inst->GetArg(1));
+    code.MULLDO_(result, src_a, src_b);
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
+template<>
+void EmitIR<IR::Opcode::SignedMultiplyHigh64>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const result = ctx.reg_alloc.ScratchGpr();
+    auto const src_a = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    auto const src_b = ctx.reg_alloc.UseGpr(inst->GetArg(1));
+    code.MULLDO_(result, src_a, src_b);
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
+template<>
+void EmitIR<IR::Opcode::UnsignedMultiplyHigh64>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const result = ctx.reg_alloc.ScratchGpr();
+    auto const src_a = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    auto const src_b = ctx.reg_alloc.UseGpr(inst->GetArg(1));
+    code.MULLDO_(result, src_a, src_b);
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
+template<>
+void EmitIR<IR::Opcode::UnsignedDiv32>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const result = ctx.reg_alloc.ScratchGpr();
+    auto const src_a = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    auto const src_b = ctx.reg_alloc.UseGpr(inst->GetArg(1));
+    code.DIVWU_(result, src_a, src_b);
+    code.RLDICL(result, result, 0, 32);
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
+template<>
+void EmitIR<IR::Opcode::UnsignedDiv64>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const result = ctx.reg_alloc.ScratchGpr();
+    auto const src_a = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    auto const src_b = ctx.reg_alloc.UseGpr(inst->GetArg(1));
+    code.DIVDU_(result, src_a, src_b);
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
+template<>
+void EmitIR<IR::Opcode::SignedDiv32>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const result = ctx.reg_alloc.ScratchGpr();
+    auto const src_a = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    auto const src_b = ctx.reg_alloc.UseGpr(inst->GetArg(1));
+    code.DIVW_(result, src_a, src_b);
+    code.EXTSW(result, result);
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
+template<>
+void EmitIR<IR::Opcode::SignedDiv64>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const result = ctx.reg_alloc.ScratchGpr();
+    auto const src_a = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    auto const src_b = ctx.reg_alloc.UseGpr(inst->GetArg(1));
+    code.DIVD_(result, src_a, src_b);
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
+template<>
+void EmitIR<IR::Opcode::And32>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const src_a = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    auto const src_b = ctx.reg_alloc.UseGpr(inst->GetArg(1));
+    auto const tmp3 = ctx.reg_alloc.ScratchGpr();
+    auto const tmp8 = ctx.reg_alloc.ScratchGpr();
+    auto const tmp9 = PPC64::RNZCV;
+    code.RLDICL(tmp3, src_a, 0, 32); // Truncate
+    code.AND(tmp3, tmp3, src_b);
+    code.CNTLZD(tmp9, tmp3);
+    code.RLWINM(tmp8, tmp3, 0, 0, 0);
+    code.SRDI(tmp9, tmp9, 6);
+    code.SLDI(tmp9, tmp9, 30);
+    code.OR(tmp9, tmp9, tmp8);
+    ctx.reg_alloc.DefineValue(inst, tmp3);
+}
+
+template<>
+void EmitIR<IR::Opcode::And64>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const src_a = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    auto const src_b = ctx.reg_alloc.UseGpr(inst->GetArg(1));
+    auto const tmp3 = ctx.reg_alloc.ScratchGpr();
+    auto const tmp10 = ctx.reg_alloc.ScratchGpr();
+    auto const tmp9 = PPC64::RNZCV;
+    code.AND(tmp3, src_a, src_b);
+    code.CNTLZD(tmp10, tmp3);
+    code.SRADI(tmp9, tmp3, 32);
+    code.SRDI(tmp10, tmp10, 6);
+    code.RLWINM(tmp9, tmp9, 0, 0, 0);
+    code.SLDI(tmp10, tmp10, 30);
+    code.OR(tmp9, tmp9, tmp10);
+    ctx.reg_alloc.DefineValue(inst, tmp3);
+}
+
+template<>
+void EmitIR<IR::Opcode::AndNot32>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const result = ctx.reg_alloc.ScratchGpr();
+    auto const src_a = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    auto const src_b = ctx.reg_alloc.UseGpr(inst->GetArg(1));
+    code.NAND_(result, src_a, src_b);
+    code.RLDICL(result, result, 0, 32);
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
+template<>
+void EmitIR<IR::Opcode::AndNot64>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const result = ctx.reg_alloc.ScratchGpr();
+    auto const src_a = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    auto const src_b = ctx.reg_alloc.UseGpr(inst->GetArg(1));
+    code.NAND_(result, src_a, src_b);
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
+template<>
+void EmitIR<IR::Opcode::Eor32>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const result = ctx.reg_alloc.ScratchGpr();
+    auto const src_a = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    auto const src_b = ctx.reg_alloc.UseGpr(inst->GetArg(1));
+    code.XOR_(result, src_a, src_b);
+    code.RLDICL(result, result, 0, 32);
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
+template<>
+void EmitIR<IR::Opcode::Eor64>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const result = ctx.reg_alloc.ScratchGpr();
+    auto const src_a = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    auto const src_b = ctx.reg_alloc.UseGpr(inst->GetArg(1));
+    code.XOR_(result, src_a, src_b);
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
+template<>
+void EmitIR<IR::Opcode::Or32>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const result = ctx.reg_alloc.ScratchGpr();
+    auto const src_a = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    auto const src_b = ctx.reg_alloc.UseGpr(inst->GetArg(1));
+    code.OR_(result, src_a, src_b);
+    code.RLDICL(result, result, 0, 32);
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
+template<>
+void EmitIR<IR::Opcode::Or64>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const result = ctx.reg_alloc.ScratchGpr();
+    auto const src_a = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    auto const src_b = ctx.reg_alloc.UseGpr(inst->GetArg(1));
+    code.OR_(result, src_a, src_b);
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
+// TODO(lizzie): NZVC support for NOT
+template<>
+void EmitIR<IR::Opcode::Not32>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const result = ctx.reg_alloc.ScratchGpr();
+    auto const source = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    code.NOT(result, source);
+    code.RLDICL(result, result, 0, 32);
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
+template<>
+void EmitIR<IR::Opcode::Not64>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const result = ctx.reg_alloc.ScratchGpr();
+    auto const source = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    code.NOT(result, source);
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
+template<>
+void EmitIR<IR::Opcode::SignExtendByteToWord>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const result = ctx.reg_alloc.ScratchGpr();
+    auto const source = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    code.EXTSB(result, source);
+    code.RLDICL(result, result, 0, 32);
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
+template<>
+void EmitIR<IR::Opcode::SignExtendHalfToWord>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const result = ctx.reg_alloc.ScratchGpr();
+    auto const source = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    code.EXTSH(result, source);
+    code.RLDICL(result, result, 0, 32);
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
+template<>
+void EmitIR<IR::Opcode::SignExtendByteToLong>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const result = ctx.reg_alloc.ScratchGpr();
+    auto const source = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    code.EXTSH(result, source);
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
+template<>
+void EmitIR<IR::Opcode::SignExtendHalfToLong>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const result = ctx.reg_alloc.ScratchGpr();
+    auto const source = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    code.EXTSB(result, source);
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
+template<>
+void EmitIR<IR::Opcode::SignExtendWordToLong>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const result = ctx.reg_alloc.ScratchGpr();
+    auto const source = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    code.EXTSW(result, source);
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
+template<>
+void EmitIR<IR::Opcode::ZeroExtendByteToWord>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const result = ctx.reg_alloc.ScratchGpr();
+    auto const source = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    code.RLWINM(result, source, 0, 0xff);
+    code.RLDICL(result, result, 0, 32);
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
+template<>
+void EmitIR<IR::Opcode::ZeroExtendHalfToWord>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const result = ctx.reg_alloc.ScratchGpr();
+    auto const source = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    code.RLWINM(result, source, 0, 0xffff);
+    code.RLDICL(result, result, 0, 32);
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
+template<>
+void EmitIR<IR::Opcode::ZeroExtendByteToLong>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const result = ctx.reg_alloc.ScratchGpr();
+    auto const source = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    code.RLWINM(result, source, 0, 0xff);
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
+template<>
+void EmitIR<IR::Opcode::ZeroExtendHalfToLong>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const result = ctx.reg_alloc.ScratchGpr();
+    auto const source = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    code.RLWINM(result, source, 0, 0xffff);
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
+template<>
+void EmitIR<IR::Opcode::ZeroExtendWordToLong>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const result = ctx.reg_alloc.ScratchGpr();
+    auto const source = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    code.RLDICL(result, source, 0, 32);
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
+template<>
+void EmitIR<IR::Opcode::ZeroExtendLongToQuad>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    ASSERT(false && "unimp");
+}
+
+// __builtin_bswap32
+template<>
+void EmitIR<IR::Opcode::ByteReverseWord>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const source = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    if (false) {
+        //code.BRW(result, source);
+        //code.RLDICL(result, result, 0, 32);
+    } else {
+        auto const result = ctx.reg_alloc.ScratchGpr();
+        code.ROTLWI(result, source, 24);
+        code.RLWIMI(result, source, 8, 8, 15);
+        code.RLWIMI(result, source, 8, 24, 31);
+        code.RLDICL(result, result, 0, 32);
+        ctx.reg_alloc.DefineValue(inst, result);
+    }
+}
+
+// __builtin_bswap64
+template<>
+void EmitIR<IR::Opcode::ByteReverseHalf>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const result = ctx.reg_alloc.ScratchGpr();
+    auto const source = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    if (false) {
+        //code.BRH(result, source);
+        code.RLWINM(result, source, 0, 0xff);
+    } else {
+        code.ROTLWI(result, source, 24);
+        code.RLWIMI(result, source, 8, 0, 23);
+        code.CLRLDI(result, result, 48);
+    }
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
+template<>
+void EmitIR<IR::Opcode::ByteReverseDual>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const source = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    if (false) {
+        //code.BRD(result, source);
+    } else {
+        auto const tmp10 = ctx.reg_alloc.ScratchGpr();
+        auto const tmp9 = ctx.reg_alloc.ScratchGpr();
+        auto const tmp3 = ctx.reg_alloc.ScratchGpr();
+        code.MR(tmp3, source);
+        code.ROTLWI(tmp10, tmp3, 24);
+        code.SRDI(tmp9, tmp3, 32);
+        code.RLWIMI(tmp10, tmp3, 8, 8, 15);
+        code.RLWIMI(tmp10, tmp3, 8, 24, 31);
+        code.ROTLWI(tmp3, tmp9, 24);
+        code.RLWIMI(tmp3, tmp9, 8, 8, 15);
+        code.RLWIMI(tmp3, tmp9, 8, 24, 31);
+        code.RLDIMI(tmp3, tmp10, 32, 0);
+        ctx.reg_alloc.DefineValue(inst, tmp3);
+    }
+}
+
+// __builtin_clz
+template<>
+void EmitIR<IR::Opcode::CountLeadingZeros32>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const result = ctx.reg_alloc.ScratchGpr();
+    auto const source = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    code.CNTLZW(result, source);
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
+// __builtin_clz
+template<>
+void EmitIR<IR::Opcode::CountLeadingZeros64>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const result = ctx.reg_alloc.ScratchGpr();
+    auto const source = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    code.CNTLZD(result, source);
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
+template<>
+void EmitIR<IR::Opcode::ExtractRegister32>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::ExtractRegister64>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::ReplicateBit32>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::ReplicateBit64>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::MaxSigned32>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const result = ctx.reg_alloc.ScratchGpr();
+    auto const src_a = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    auto const src_b = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    code.CMPD(powah::CR0, result, src_a);
+    code.ISELGT(result, result, src_b);
+    code.RLDICL(result, result, 0, 32);
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
+template<>
+void EmitIR<IR::Opcode::MaxSigned64>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const result = ctx.reg_alloc.ScratchGpr();
+    auto const src_a = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    auto const src_b = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    code.CMPD(powah::CR0, result, src_a);
+    code.ISELGT(result, result, src_b);
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
+template<>
+void EmitIR<IR::Opcode::MaxUnsigned32>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const result = ctx.reg_alloc.ScratchGpr();
+    auto const src_a = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    auto const src_b = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    code.CMPLW(result, src_a);
+    code.ISELGT(result, result, src_b);
+    code.RLDICL(result, result, 0, 32);
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
+template<>
+void EmitIR<IR::Opcode::MaxUnsigned64>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const result = ctx.reg_alloc.ScratchGpr();
+    auto const src_a = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    auto const src_b = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    code.CMPLD(result, src_a);
+    code.ISELGT(result, result, src_b);
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
+template<>
+void EmitIR<IR::Opcode::MinSigned32>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const result = ctx.reg_alloc.ScratchGpr();
+    auto const src_a = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    auto const src_b = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    code.CMPW(powah::CR0, result, src_a);
+    code.ISELGT(result, result, src_b);
+    code.RLDICL(result, result, 0, 32);
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
+template<>
+void EmitIR<IR::Opcode::MinSigned64>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const result = ctx.reg_alloc.ScratchGpr();
+    auto const src_a = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    auto const src_b = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    code.CMPD(powah::CR0, result, src_a);
+    code.ISELGT(result, result, src_b);
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
+template<>
+void EmitIR<IR::Opcode::MinUnsigned32>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const result = ctx.reg_alloc.ScratchGpr();
+    auto const src_a = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    auto const src_b = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    code.CMPLW(result, src_a);
+    code.ISELGT(result, result, src_b);
+    code.RLDICL(result, result, 0, 32);
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
+template<>
+void EmitIR<IR::Opcode::MinUnsigned64>(powah::Context& code, EmitContext& ctx, IR::Inst* inst) {
+    auto const result = ctx.reg_alloc.ScratchGpr();
+    auto const src_a = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    auto const src_b = ctx.reg_alloc.UseGpr(inst->GetArg(0));
+    code.CMPLD(result, src_a);
+    code.ISELGT(result, result, src_b);
+    ctx.reg_alloc.DefineValue(inst, result);
+}
+
+}  // namespace Dynarmic::Backend::RV64

src/dynarmic/src/dynarmic/backend/ppc64/emit_ppc64_floating_point.cpp

@@ -0,0 +1,458 @@
+// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project
+// SPDX-License-Identifier: GPL-3.0-or-later
+
+#include <powah_emit.hpp>
+#include <fmt/ostream.h>
+
+#include "dynarmic/backend/ppc64/a32_core.h"
+#include "dynarmic/backend/ppc64/abi.h"
+#include "dynarmic/backend/ppc64/emit_context.h"
+#include "dynarmic/backend/ppc64/emit_ppc64.h"
+#include "dynarmic/backend/ppc64/reg_alloc.h"
+#include "dynarmic/ir/basic_block.h"
+#include "dynarmic/ir/microinstruction.h"
+#include "dynarmic/ir/opcodes.h"
+
+namespace Dynarmic::Backend::PPC64 {
+
+template<>
+void EmitIR<IR::Opcode::FPAbs16>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPAbs32>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPAbs64>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPAdd32>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPAdd64>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPCompare32>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPCompare64>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPDiv32>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPDiv64>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPMax32>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPMax64>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPMaxNumeric32>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPMaxNumeric64>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPMin32>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPMin64>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPMinNumeric32>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPMinNumeric64>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPMul32>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPMul64>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPMulAdd16>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPMulAdd32>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPMulAdd64>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPMulSub16>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPMulSub32>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPMulSub64>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPMulX32>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPMulX64>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPNeg16>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPNeg32>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPNeg64>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPRecipEstimate16>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPRecipEstimate32>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPRecipEstimate64>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPRecipExponent16>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPRecipExponent32>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPRecipExponent64>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPRecipStepFused16>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPRecipStepFused32>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPRecipStepFused64>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPRoundInt16>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPRoundInt32>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPRoundInt64>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPRSqrtEstimate16>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPRSqrtEstimate32>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPRSqrtEstimate64>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPRSqrtStepFused16>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPRSqrtStepFused32>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPRSqrtStepFused64>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPSqrt32>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPSqrt64>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPSub32>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPSub64>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPHalfToDouble>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPHalfToSingle>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPSingleToDouble>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPSingleToHalf>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPDoubleToHalf>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPDoubleToSingle>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPDoubleToFixedS16>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPDoubleToFixedS32>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPDoubleToFixedS64>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPDoubleToFixedU16>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPDoubleToFixedU32>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPDoubleToFixedU64>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPHalfToFixedS16>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPHalfToFixedS32>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPHalfToFixedS64>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPHalfToFixedU16>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPHalfToFixedU32>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPHalfToFixedU64>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPSingleToFixedS16>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPSingleToFixedS32>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPSingleToFixedS64>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPSingleToFixedU16>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPSingleToFixedU32>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPSingleToFixedU64>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPFixedU16ToSingle>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPFixedS16ToSingle>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPFixedU16ToDouble>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPFixedS16ToDouble>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPFixedU32ToSingle>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPFixedS32ToSingle>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPFixedU32ToDouble>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPFixedS32ToDouble>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPFixedU64ToDouble>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPFixedU64ToSingle>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPFixedS64ToDouble>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+template<>
+void EmitIR<IR::Opcode::FPFixedS64ToSingle>(powah::Context&, EmitContext&, IR::Inst*) {
+    ASSERT(false && "unimp");
+}
+
+}  // namespace Dynarmic::Backend::RV64