[vulkan] Correction on unconditional/ harcoded makeview 2D array vs compute shader 3D views

This reverts commit a9c4c8aefd.

Reviewed-on: https://git.eden-emu.dev/eden-emu/eden/pulls/4157
Reviewed-by: CamilleLaVey <camillelavey99@gmail.com>
Reviewed-by: MaranBr <maranbr@eden-emu.dev>

src/shader_recompiler/backend/spirv/emit_spirv.cpp

@@ -332,9 +332,6 @@ void DefineEntryPoint(const IR::Program& program, EmitContext& ctx, Id main) {
 void SetupDenormControl(const Profile& profile, const IR::Program& program, EmitContext& ctx,
                         Id main_func) {
     const Info& info{program.info};
-    if (profile.has_broken_fp16_float_controls && info.uses_fp16) {
-        return;
-    }
     if (info.uses_fp32_denorms_flush && info.uses_fp32_denorms_preserve) {
         LOG_DEBUG(Shader_SPIRV, "Fp32 denorm flush and preserve on the same shader");
     } else if (info.uses_fp32_denorms_flush) {
@@ -435,7 +432,7 @@ void SetupCapabilities(const Profile& profile, const Info& info, EmitContext& ct
     }
     if ((info.uses_subgroup_vote || info.uses_subgroup_invocation_id ||
          info.uses_subgroup_shuffles) &&
-        profile.support_vote && profile.SupportsSubgroupStage(ctx.stage)) {
+        profile.support_vote) {
         ctx.AddCapability(spv::Capability::GroupNonUniformBallot);
         ctx.AddCapability(spv::Capability::GroupNonUniformShuffle);
         if (!profile.warp_size_potentially_larger_than_guest) {

src/shader_recompiler/backend/spirv/emit_spirv_atomic.cpp

@@ -1,6 +1,3 @@
-// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project
-// SPDX-License-Identifier: GPL-3.0-or-later
-
 // SPDX-FileCopyrightText: Copyright 2021 yuzu Emulator Project
 // SPDX-License-Identifier: GPL-2.0-or-later
 
@@ -18,7 +15,7 @@ Id SharedPointer(EmitContext& ctx, Id offset, u32 index_offset = 0) {
     if (index_offset > 0) {
         index = ctx.OpIAdd(ctx.U32[1], index, ctx.Const(index_offset));
     }
-    return ctx.uses_explicit_workgroup_layout
+    return ctx.profile.support_explicit_workgroup_layout
                ? ctx.OpAccessChain(ctx.shared_u32, ctx.shared_memory_u32, ctx.u32_zero_value, index)
                : ctx.OpAccessChain(ctx.shared_u32, ctx.shared_memory_u32, index);
 }
@@ -158,7 +155,7 @@ Id EmitSharedAtomicExchange32(EmitContext& ctx, Id offset, Id value) {
 }
 
 Id EmitSharedAtomicExchange64(EmitContext& ctx, Id offset, Id value) {
-    if (ctx.profile.support_shared_int64_atomics && ctx.uses_explicit_workgroup_layout) {
+    if (ctx.profile.support_int64_atomics && ctx.profile.support_explicit_workgroup_layout) {
         const Id shift_id{ctx.Const(3U)};
         const Id index{ctx.OpShiftRightArithmetic(ctx.U32[1], offset, shift_id)};
         const Id pointer{

src/shader_recompiler/backend/spirv/emit_spirv_memory.cpp

@@ -1,6 +1,3 @@
-// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project
-// SPDX-License-Identifier: GPL-3.0-or-later
-
 // SPDX-FileCopyrightText: Copyright 2021 yuzu Emulator Project
 // SPDX-License-Identifier: GPL-2.0-or-later
 

src/shader_recompiler/backend/spirv/emit_spirv_shared_memory.cpp

@@ -1,6 +1,3 @@
-// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project
-// SPDX-License-Identifier: GPL-3.0-or-later
-
 // SPDX-FileCopyrightText: Copyright 2021 yuzu Emulator Project
 // SPDX-License-Identifier: GPL-2.0-or-later
 
@@ -31,7 +28,7 @@ std::pair<Id, Id> ExtractArgs(EmitContext& ctx, Id offset, u32 mask, u32 count)
 } // Anonymous namespace
 
 Id EmitLoadSharedU8(EmitContext& ctx, Id offset) {
-    if (ctx.uses_explicit_workgroup_layout) {
+    if (ctx.profile.support_explicit_workgroup_layout) {
         const Id pointer{
             ctx.OpAccessChain(ctx.shared_u8, ctx.shared_memory_u8, ctx.u32_zero_value, offset)};
         return ctx.OpUConvert(ctx.U32[1], ctx.OpLoad(ctx.U8, pointer));
@@ -42,7 +39,7 @@ Id EmitLoadSharedU8(EmitContext& ctx, Id offset) {
 }
 
 Id EmitLoadSharedS8(EmitContext& ctx, Id offset) {
-    if (ctx.uses_explicit_workgroup_layout) {
+    if (ctx.profile.support_explicit_workgroup_layout) {
         const Id pointer{
             ctx.OpAccessChain(ctx.shared_u8, ctx.shared_memory_u8, ctx.u32_zero_value, offset)};
         return ctx.OpSConvert(ctx.U32[1], ctx.OpLoad(ctx.U8, pointer));
@@ -53,7 +50,7 @@ Id EmitLoadSharedS8(EmitContext& ctx, Id offset) {
 }
 
 Id EmitLoadSharedU16(EmitContext& ctx, Id offset) {
-    if (ctx.uses_explicit_workgroup_layout) {
+    if (ctx.profile.support_explicit_workgroup_layout) {
         const Id pointer{Pointer(ctx, ctx.shared_u16, ctx.shared_memory_u16, offset, 1)};
         return ctx.OpUConvert(ctx.U32[1], ctx.OpLoad(ctx.U16, pointer));
     } else {
@@ -63,7 +60,7 @@ Id EmitLoadSharedU16(EmitContext& ctx, Id offset) {
 }
 
 Id EmitLoadSharedS16(EmitContext& ctx, Id offset) {
-    if (ctx.uses_explicit_workgroup_layout) {
+    if (ctx.profile.support_explicit_workgroup_layout) {
         const Id pointer{Pointer(ctx, ctx.shared_u16, ctx.shared_memory_u16, offset, 1)};
         return ctx.OpSConvert(ctx.U32[1], ctx.OpLoad(ctx.U16, pointer));
     } else {
@@ -73,7 +70,7 @@ Id EmitLoadSharedS16(EmitContext& ctx, Id offset) {
 }
 
 Id EmitLoadSharedU32(EmitContext& ctx, Id offset) {
-    if (ctx.uses_explicit_workgroup_layout) {
+    if (ctx.profile.support_explicit_workgroup_layout) {
         const Id pointer{Pointer(ctx, ctx.shared_u32, ctx.shared_memory_u32, offset, 2)};
         return ctx.OpLoad(ctx.U32[1], pointer);
     } else {
@@ -82,7 +79,7 @@ Id EmitLoadSharedU32(EmitContext& ctx, Id offset) {
 }
 
 Id EmitLoadSharedU64(EmitContext& ctx, Id offset) {
-    if (ctx.uses_explicit_workgroup_layout) {
+    if (ctx.profile.support_explicit_workgroup_layout) {
         const Id pointer{Pointer(ctx, ctx.shared_u32x2, ctx.shared_memory_u32x2, offset, 3)};
         return ctx.OpLoad(ctx.U32[2], pointer);
     } else {
@@ -97,7 +94,7 @@ Id EmitLoadSharedU64(EmitContext& ctx, Id offset) {
 }
 
 Id EmitLoadSharedU128(EmitContext& ctx, Id offset) {
-    if (ctx.uses_explicit_workgroup_layout) {
+    if (ctx.profile.support_explicit_workgroup_layout) {
         const Id pointer{Pointer(ctx, ctx.shared_u32x4, ctx.shared_memory_u32x4, offset, 4)};
         return ctx.OpLoad(ctx.U32[4], pointer);
     }
@@ -113,7 +110,7 @@ Id EmitLoadSharedU128(EmitContext& ctx, Id offset) {
 }
 
 void EmitWriteSharedU8(EmitContext& ctx, Id offset, Id value) {
-    if (ctx.uses_explicit_workgroup_layout) {
+    if (ctx.profile.support_explicit_workgroup_layout) {
         const Id pointer{
             ctx.OpAccessChain(ctx.shared_u8, ctx.shared_memory_u8, ctx.u32_zero_value, offset)};
         ctx.OpStore(pointer, ctx.OpUConvert(ctx.U8, value));
@@ -123,7 +120,7 @@ void EmitWriteSharedU8(EmitContext& ctx, Id offset, Id value) {
 }
 
 void EmitWriteSharedU16(EmitContext& ctx, Id offset, Id value) {
-    if (ctx.uses_explicit_workgroup_layout) {
+    if (ctx.profile.support_explicit_workgroup_layout) {
         const Id pointer{Pointer(ctx, ctx.shared_u16, ctx.shared_memory_u16, offset, 1)};
         ctx.OpStore(pointer, ctx.OpUConvert(ctx.U16, value));
     } else {
@@ -133,7 +130,7 @@ void EmitWriteSharedU16(EmitContext& ctx, Id offset, Id value) {
 
 void EmitWriteSharedU32(EmitContext& ctx, Id offset, Id value) {
     Id pointer{};
-    if (ctx.uses_explicit_workgroup_layout) {
+    if (ctx.profile.support_explicit_workgroup_layout) {
         pointer = Pointer(ctx, ctx.shared_u32, ctx.shared_memory_u32, offset, 2);
     } else {
         const Id shift{ctx.Const(2U)};
@@ -144,7 +141,7 @@ void EmitWriteSharedU32(EmitContext& ctx, Id offset, Id value) {
 }
 
 void EmitWriteSharedU64(EmitContext& ctx, Id offset, Id value) {
-    if (ctx.uses_explicit_workgroup_layout) {
+    if (ctx.profile.support_explicit_workgroup_layout) {
         const Id pointer{Pointer(ctx, ctx.shared_u32x2, ctx.shared_memory_u32x2, offset, 3)};
         ctx.OpStore(pointer, value);
         return;
@@ -159,7 +156,7 @@ void EmitWriteSharedU64(EmitContext& ctx, Id offset, Id value) {
 }
 
 void EmitWriteSharedU128(EmitContext& ctx, Id offset, Id value) {
-    if (ctx.uses_explicit_workgroup_layout) {
+    if (ctx.profile.support_explicit_workgroup_layout) {
         const Id pointer{Pointer(ctx, ctx.shared_u32x4, ctx.shared_memory_u32x4, offset, 4)};
         ctx.OpStore(pointer, value);
         return;

src/shader_recompiler/backend/spirv/emit_spirv_warp.cpp

@@ -1,6 +1,3 @@
-// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project
-// SPDX-License-Identifier: GPL-3.0-or-later
-
 // SPDX-FileCopyrightText: Copyright 2021 yuzu Emulator Project
 // SPDX-License-Identifier: GPL-2.0-or-later
 
@@ -13,14 +10,7 @@ Id SubgroupScope(EmitContext& ctx) {
     return ctx.Const(static_cast<u32>(spv::Scope::Subgroup));
 }
 
-bool StageSupportsSubgroups(EmitContext& ctx) {
-    return ctx.profile.SupportsSubgroupStage(ctx.stage);
-}
-
 Id GetThreadId(EmitContext& ctx) {
-    if (!StageSupportsSubgroups(ctx)) {
-        return ctx.u32_zero_value;
-    }
     return ctx.OpLoad(ctx.U32[1], ctx.subgroup_local_invocation_id);
 }
 
@@ -78,9 +68,6 @@ Id GetMaxThreadId(EmitContext& ctx, Id thread_id, Id clamp, Id segmentation_mask
 }
 
 Id SelectValue(EmitContext& ctx, Id in_range, Id value, Id src_thread_id) {
-    if (!StageSupportsSubgroups(ctx)) {
-        return value;
-    }
     return ctx.OpSelect(
         ctx.U32[1], in_range,
         ctx.OpGroupNonUniformShuffle(ctx.U32[1], SubgroupScope(ctx), value, src_thread_id), value);
@@ -102,9 +89,6 @@ Id EmitLaneId(EmitContext& ctx) {
 }
 
 Id EmitVoteAll(EmitContext& ctx, Id pred) {
-    if (!StageSupportsSubgroups(ctx)) {
-        return pred;
-    }
     if (!ctx.profile.warp_size_potentially_larger_than_guest) {
         return ctx.OpGroupNonUniformAll(ctx.U1, SubgroupScope(ctx), pred);
     }
@@ -118,9 +102,6 @@ Id EmitVoteAll(EmitContext& ctx, Id pred) {
 }
 
 Id EmitVoteAny(EmitContext& ctx, Id pred) {
-    if (!StageSupportsSubgroups(ctx)) {
-        return pred;
-    }
     if (!ctx.profile.warp_size_potentially_larger_than_guest) {
         return ctx.OpGroupNonUniformAny(ctx.U1, SubgroupScope(ctx), pred);
     }
@@ -134,9 +115,6 @@ Id EmitVoteAny(EmitContext& ctx, Id pred) {
 }
 
 Id EmitVoteEqual(EmitContext& ctx, Id pred) {
-    if (!StageSupportsSubgroups(ctx)) {
-        return ctx.true_value;
-    }
     if (!ctx.profile.warp_size_potentially_larger_than_guest) {
         return ctx.OpGroupNonUniformAllEqual(ctx.U1, SubgroupScope(ctx), pred);
     }
@@ -151,9 +129,6 @@ Id EmitVoteEqual(EmitContext& ctx, Id pred) {
 }
 
 Id EmitSubgroupBallot(EmitContext& ctx, Id pred) {
-    if (!StageSupportsSubgroups(ctx)) {
-        return ctx.OpSelect(ctx.U32[1], pred, ctx.Const(1u), ctx.u32_zero_value);
-    }
     const Id ballot{ctx.OpGroupNonUniformBallot(ctx.U32[4], SubgroupScope(ctx), pred)};
     if (!ctx.profile.warp_size_potentially_larger_than_guest) {
         return ctx.OpCompositeExtract(ctx.U32[1], ballot, 0U);
@@ -162,37 +137,22 @@ Id EmitSubgroupBallot(EmitContext& ctx, Id pred) {
 }
 
 Id EmitSubgroupEqMask(EmitContext& ctx) {
-    if (!StageSupportsSubgroups(ctx)) {
-        return ctx.Const(1u);
-    }
     return LoadMask(ctx, ctx.subgroup_mask_eq);
 }
 
 Id EmitSubgroupLtMask(EmitContext& ctx) {
-    if (!StageSupportsSubgroups(ctx)) {
-        return ctx.u32_zero_value;
-    }
     return LoadMask(ctx, ctx.subgroup_mask_lt);
 }
 
 Id EmitSubgroupLeMask(EmitContext& ctx) {
-    if (!StageSupportsSubgroups(ctx)) {
-        return ctx.Const(1u);
-    }
     return LoadMask(ctx, ctx.subgroup_mask_le);
 }
 
 Id EmitSubgroupGtMask(EmitContext& ctx) {
-    if (!StageSupportsSubgroups(ctx)) {
-        return ctx.u32_zero_value;
-    }
     return LoadMask(ctx, ctx.subgroup_mask_gt);
 }
 
 Id EmitSubgroupGeMask(EmitContext& ctx) {
-    if (!StageSupportsSubgroups(ctx)) {
-        return ctx.Const(1u);
-    }
     return LoadMask(ctx, ctx.subgroup_mask_ge);
 }
 
@@ -262,7 +222,7 @@ Id EmitShuffleButterfly(EmitContext& ctx, IR::Inst* inst, Id value, Id index, Id
 
 Id EmitFSwizzleAdd(EmitContext& ctx, Id op_a, Id op_b, Id swizzle) {
     const Id three{ctx.Const(3U)};
-    Id mask{GetThreadId(ctx)};
+    Id mask{ctx.OpLoad(ctx.U32[1], ctx.subgroup_local_invocation_id)};
     mask = ctx.OpBitwiseAnd(ctx.U32[1], mask, three);
     mask = ctx.OpShiftLeftLogical(ctx.U32[1], mask, ctx.Const(1U));
     mask = ctx.OpShiftRightLogical(ctx.U32[1], swizzle, mask);

src/shader_recompiler/backend/spirv/spirv_emit_context.cpp

@@ -371,7 +371,7 @@ Id CasFunction(EmitContext& ctx, Operation operation, Id value_type) {
 Id CasLoop(EmitContext& ctx, Operation operation, Id array_pointer, Id element_pointer,
            Id value_type, Id memory_type, spv::Scope scope) {
     const bool is_shared{scope == spv::Scope::Workgroup};
-    const bool is_struct{!is_shared || ctx.uses_explicit_workgroup_layout};
+    const bool is_struct{!is_shared || ctx.profile.support_explicit_workgroup_layout};
     const Id cas_func{CasFunction(ctx, operation, value_type)};
     const Id zero{ctx.u32_zero_value};
     const Id scope_id{ctx.Const(static_cast<u32>(scope))};
@@ -620,11 +620,7 @@ void EmitContext::DefineSharedMemory(const IR::Program& program) {
 
         return std::make_tuple(variable, element_pointer, pointer);
     }};
-    uses_explicit_workgroup_layout =
-        profile.support_explicit_workgroup_layout &&
-        (!program.info.uses_int8 || profile.support_workgroup_layout_8bit_access) &&
-        (!program.info.uses_int16 || profile.support_workgroup_layout_16bit_access);
-    if (uses_explicit_workgroup_layout) {
+    if (profile.support_explicit_workgroup_layout) {
         AddExtension("SPV_KHR_workgroup_memory_explicit_layout");
         AddCapability(spv::Capability::WorkgroupMemoryExplicitLayoutKHR);
         if (program.info.uses_int8) {
@@ -942,10 +938,6 @@ void EmitContext::DefineGlobalMemoryFunctions(const Info& info) {
     if (!info.uses_global_memory || !profile.support_int64) {
         return;
     }
-    if (!profile.support_descriptor_aliasing) {
-        DefineGlobalMemoryFunctionsU32Fallback(info);
-        return;
-    }
     using DefPtr = Id StorageDefinitions::*;
     const Id zero{u32_zero_value};
     const auto define_body{[&](DefPtr ssbo_member, Id addr, Id element_pointer, u32 shift,
@@ -1023,111 +1015,6 @@ void EmitContext::DefineGlobalMemoryFunctions(const Info& info) {
         define(&StorageDefinitions::U32x4, storage_types.U32x4, U32[4], sizeof(u32[4]));
 }
 
-void EmitContext::DefineGlobalMemoryFunctionsU32Fallback(const Info& info) {
-    const Id zero{u32_zero_value};
-    const auto define_body{[&](Id addr, u32 num_words, auto&& callback) {
-        AddLabel();
-        const size_t num_buffers{info.storage_buffers_descriptors.size()};
-        for (size_t index = 0; index < num_buffers; ++index) {
-            if (!info.nvn_buffer_used[index]) {
-                continue;
-            }
-            const auto& ssbo{info.storage_buffers_descriptors[index]};
-            const u32 addr_word{ssbo.cbuf_offset / 4};
-            const u32 addr_lo_comp{addr_word % 4};
-            const Id cbuf{cbufs[ssbo.cbuf_index].U32x4};
-            const Id addr_vec_pointer{
-                OpAccessChain(uniform_types.U32x4, cbuf, zero, Const(addr_word / 4))};
-            const Id addr_vec{OpLoad(U32[4], addr_vec_pointer)};
-            const Id addr_lo{OpCompositeExtract(U32[1], addr_vec, addr_lo_comp)};
-            const Id addr_hi{OpCompositeExtract(U32[1], addr_vec, addr_lo_comp + 1U)};
-            const Id unaligned_addr{
-                OpBitcast(U64, OpCompositeConstruct(U32[2], addr_lo, addr_hi))};
-
-            const u64 ssbo_align_mask{~(profile.min_ssbo_alignment - 1U)};
-            const Id ssbo_addr{OpBitwiseAnd(U64, unaligned_addr, Constant(U64, ssbo_align_mask))};
-
-            const u32 size_word{addr_word + 2};
-            Id size_vec{addr_vec};
-            if (size_word / 4 != addr_word / 4) {
-                const Id size_vec_pointer{
-                    OpAccessChain(uniform_types.U32x4, cbuf, zero, Const(size_word / 4))};
-                size_vec = OpLoad(U32[4], size_vec_pointer);
-            }
-            const Id ssbo_size{
-                OpUConvert(U64, OpCompositeExtract(U32[1], size_vec, size_word % 4))};
-            const Id ssbo_end{OpIAdd(U64, ssbo_addr, ssbo_size)};
-            const Id cond{OpLogicalAnd(U1, OpUGreaterThanEqual(U1, addr, ssbo_addr),
-                                       OpULessThan(U1, addr, ssbo_end))};
-            const Id then_label{OpLabel()};
-            const Id else_label{OpLabel()};
-            OpSelectionMerge(else_label, spv::SelectionControlMask::MaskNone);
-            OpBranchConditional(cond, then_label, else_label);
-            AddLabel(then_label);
-            const Id ssbo_id{ssbos[index].U32};
-            const Id ssbo_offset{OpUConvert(U32[1], OpISub(U64, addr, ssbo_addr))};
-            const Id base_word{OpShiftRightLogical(U32[1], ssbo_offset, Const(2U))};
-            std::array<Id, 4> word_pointers{};
-            for (u32 word = 0; word < num_words; ++word) {
-                const Id word_index{word == 0 ? base_word
-                                              : OpIAdd(U32[1], base_word, Const(word))};
-                word_pointers[word] =
-                    OpAccessChain(storage_types.U32.element, ssbo_id, zero, word_index);
-            }
-            callback(word_pointers);
-            AddLabel(else_label);
-        }
-    }};
-    const auto define_load{[&](Id type, u32 num_words) {
-        const Id function_type{TypeFunction(type, U64)};
-        const Id func_id{OpFunction(type, spv::FunctionControlMask::MaskNone, function_type)};
-        const Id addr{OpFunctionParameter(U64)};
-        define_body(addr, num_words, [&](const std::array<Id, 4>& pointers) {
-            std::array<Id, 4> words{};
-            for (u32 word = 0; word < num_words; ++word) {
-                words[word] = OpLoad(U32[1], pointers[word]);
-            }
-            switch (num_words) {
-            case 1:
-                OpReturnValue(words[0]);
-                break;
-            case 2:
-                OpReturnValue(OpCompositeConstruct(type, words[0], words[1]));
-                break;
-            default:
-                OpReturnValue(
-                    OpCompositeConstruct(type, words[0], words[1], words[2], words[3]));
-                break;
-            }
-        });
-        OpReturnValue(ConstantNull(type));
-        OpFunctionEnd();
-        return func_id;
-    }};
-    const auto define_write{[&](Id type, u32 num_words) {
-        const Id function_type{TypeFunction(void_id, U64, type)};
-        const Id func_id{OpFunction(void_id, spv::FunctionControlMask::MaskNone, function_type)};
-        const Id addr{OpFunctionParameter(U64)};
-        const Id data{OpFunctionParameter(type)};
-        define_body(addr, num_words, [&](const std::array<Id, 4>& pointers) {
-            for (u32 word = 0; word < num_words; ++word) {
-                const Id value{num_words == 1 ? data : OpCompositeExtract(U32[1], data, word)};
-                OpStore(pointers[word], value);
-            }
-            OpReturn();
-        });
-        OpReturn();
-        OpFunctionEnd();
-        return func_id;
-    }};
-    load_global_func_u32 = define_load(U32[1], 1);
-    load_global_func_u32x2 = define_load(U32[2], 2);
-    load_global_func_u32x4 = define_load(U32[4], 4);
-    write_global_func_u32 = define_write(U32[1], 1);
-    write_global_func_u32x2 = define_write(U32[2], 2);
-    write_global_func_u32x4 = define_write(U32[4], 4);
-}
-
 void EmitContext::DefineRescalingInput(const Info& info) {
     if (!info.uses_rescaling_uniform) {
         return;
@@ -1551,7 +1438,7 @@ void EmitContext::DefineInputs(const IR::Program& program) {
     if (info.uses_is_helper_invocation) {
         is_helper_invocation = DefineInput(*this, U1, false, spv::BuiltIn::HelperInvocation);
     }
-    if (info.uses_subgroup_mask && profile.SupportsSubgroupStage(stage)) {
+    if (info.uses_subgroup_mask) {
         subgroup_mask_eq = DefineInput(*this, U32[4], false, spv::BuiltIn::SubgroupEqMaskKHR);
         subgroup_mask_lt = DefineInput(*this, U32[4], false, spv::BuiltIn::SubgroupLtMaskKHR);
         subgroup_mask_le = DefineInput(*this, U32[4], false, spv::BuiltIn::SubgroupLeMaskKHR);
@@ -1565,10 +1452,9 @@ void EmitContext::DefineInputs(const IR::Program& program) {
             Decorate(subgroup_mask_ge, spv::Decoration::Flat);
         }
     }
-    if ((info.uses_fswzadd || info.uses_subgroup_invocation_id || info.uses_subgroup_shuffles ||
-         (profile.warp_size_potentially_larger_than_guest &&
-          (info.uses_subgroup_vote || info.uses_subgroup_mask))) &&
-        profile.SupportsSubgroupStage(stage)) {
+    if (info.uses_fswzadd || info.uses_subgroup_invocation_id || info.uses_subgroup_shuffles ||
+        (profile.warp_size_potentially_larger_than_guest &&
+         (info.uses_subgroup_vote || info.uses_subgroup_mask))) {
         AddCapability(spv::Capability::GroupNonUniform);
         subgroup_local_invocation_id =
             DefineInput(*this, U32[1], false, spv::BuiltIn::SubgroupLocalInvocationId);

src/shader_recompiler/backend/spirv/spirv_emit_context.h

@@ -310,10 +310,6 @@ public:
 
     Id local_memory{};
 
-    /// True when this shader's shared memory uses SPV_KHR_workgroup_memory_explicit_layout.
-    /// False when the host lacks the extension or a width this shader accesses natively.
-    bool uses_explicit_workgroup_layout{};
-
     Id shared_memory_u8{};
     Id shared_memory_u16{};
     Id shared_memory_u32{};
@@ -391,7 +387,6 @@ private:
     void DefineAttributeMemAccess(const Info& info);
     void DefineWriteStorageCasLoopFunction(const Info& info);
     void DefineGlobalMemoryFunctions(const Info& info);
-    void DefineGlobalMemoryFunctionsU32Fallback(const Info& info);
     void DefineRescalingInput(const Info& info);
     void DefineRescalingInputPushConstant();
     void DefineRescalingInputUniformConstant();

src/shader_recompiler/profile.h

@@ -10,8 +10,6 @@
 
 namespace Shader {
 
-enum class Stage : u32;
-
 struct Profile {
     u32 supported_spirv{0x00010000};
     bool unified_descriptor_binding{};
@@ -31,16 +29,12 @@ struct Profile {
     bool support_fp32_signed_zero_nan_preserve{};
     bool support_fp64_signed_zero_nan_preserve{};
     bool support_explicit_workgroup_layout{};
-    bool support_workgroup_layout_8bit_access{};
-    bool support_workgroup_layout_16bit_access{};
     bool support_vote{};
-    u32 supported_subgroup_stages{0x7F};
     bool support_viewport_index_layer_non_geometry{};
     bool support_viewport_mask{};
     bool support_typeless_image_loads{};
     bool support_demote_to_helper_invocation{};
     bool support_int64_atomics{};
-    bool support_shared_int64_atomics{};
     bool support_derivative_control{};
     bool support_geometry_shader_passthrough{};
     bool support_native_ndc{};
@@ -99,10 +93,6 @@ struct Profile {
 
     u64 min_ssbo_alignment{};
     u32 max_user_clip_distances{};
-
-    bool SupportsSubgroupStage(Stage stage) const {
-        return (supported_subgroup_stages & (1u << static_cast<u32>(stage))) != 0;
-    }
 };
 
 } // namespace Shader

src/video_core/host_shaders/block_linear_unswizzle_2d.comp

@@ -11,9 +11,8 @@
 #define BEGIN_PUSH_CONSTANTS layout(push_constant) uniform PushConstants {
 #define END_PUSH_CONSTANTS };
 #define UNIFORM(n)
-#define BINDING_SWIZZLE_BUFFER 0
-#define BINDING_INPUT_BUFFER 1
-#define BINDING_OUTPUT_IMAGE 2
+#define BINDING_INPUT_BUFFER 0
+#define BINDING_OUTPUT_IMAGE 1
 
 #else // ^^^ Vulkan ^^^ // vvv OpenGL vvv
 
@@ -26,8 +25,7 @@
 #define BEGIN_PUSH_CONSTANTS
 #define END_PUSH_CONSTANTS
 #define UNIFORM(n) layout (location = n) uniform
-#define BINDING_SWIZZLE_BUFFER 0
-#define BINDING_INPUT_BUFFER 1
+#define BINDING_INPUT_BUFFER 0
 #define BINDING_OUTPUT_IMAGE 0
 
 #endif
@@ -43,10 +41,6 @@ UNIFORM(6) uint block_height;
 UNIFORM(7) uint block_height_mask;
 END_PUSH_CONSTANTS
 
-layout(binding = BINDING_SWIZZLE_BUFFER, std430) readonly buffer SwizzleTable {
-    uint swizzle_table[];
-};
-
 #if HAS_EXTENDED_TYPES
 layout(binding = BINDING_INPUT_BUFFER, std430) buffer InputBufferU8 { uint8_t u8data[]; };
 layout(binding = BINDING_INPUT_BUFFER, std430) buffer InputBufferU16 { uint16_t u16data[]; };
@@ -71,9 +65,19 @@ const uint GOB_SIZE_SHIFT = GOB_SIZE_X_SHIFT + GOB_SIZE_Y_SHIFT + GOB_SIZE_Z_SHI
 
 const uvec2 SWIZZLE_MASK = uvec2(GOB_SIZE_X - 1, GOB_SIZE_Y - 1);
 
+uint SwizzleTable(uint pos) {
+    const uint t[8] = uint[](
+        0x12100200, 0x13110301, 0x16140604, 0x17150705,
+        0x1a180a08, 0x1b190b09, 0x1e1c0e0c, 0x1f1d0f0d
+    );
+    const uint i = pos >> 4;
+    const uint h = (t[i / 4] >> ((i % 4) * 8)) & 0xff;
+    return (h << 4) | (pos & 0xf);
+}
+
 uint SwizzleOffset(uvec2 pos) {
     pos = pos & SWIZZLE_MASK;
-    return swizzle_table[pos.y * 64 + pos.x];
+    return SwizzleTable(pos.y * 64 + pos.x);
 }
 
 uvec4 ReadTexel(uint offset) {

src/video_core/host_shaders/block_linear_unswizzle_3d.comp

@@ -11,9 +11,8 @@
 #define BEGIN_PUSH_CONSTANTS layout(push_constant) uniform PushConstants {
 #define END_PUSH_CONSTANTS };
 #define UNIFORM(n)
-#define BINDING_SWIZZLE_BUFFER 0
-#define BINDING_INPUT_BUFFER 1
-#define BINDING_OUTPUT_IMAGE 2
+#define BINDING_INPUT_BUFFER 0
+#define BINDING_OUTPUT_IMAGE 1
 
 #else // ^^^ Vulkan ^^^ // vvv OpenGL vvv
 
@@ -26,8 +25,7 @@
 #define BEGIN_PUSH_CONSTANTS
 #define END_PUSH_CONSTANTS
 #define UNIFORM(n) layout (location = n) uniform
-#define BINDING_SWIZZLE_BUFFER 0
-#define BINDING_INPUT_BUFFER 1
+#define BINDING_INPUT_BUFFER 0
 #define BINDING_OUTPUT_IMAGE 0
 
 #endif
@@ -45,10 +43,6 @@ UNIFORM(8) uint block_depth;
 UNIFORM(9) uint block_depth_mask;
 END_PUSH_CONSTANTS
 
-layout(binding = BINDING_SWIZZLE_BUFFER, std430) readonly buffer SwizzleTable {
-    uint swizzle_table[];
-};
-
 #if HAS_EXTENDED_TYPES
 layout(binding = BINDING_INPUT_BUFFER, std430) buffer InputBufferU8 { uint8_t u8data[]; };
 layout(binding = BINDING_INPUT_BUFFER, std430) buffer InputBufferU16 { uint16_t u16data[]; };
@@ -73,9 +67,19 @@ const uint GOB_SIZE_SHIFT = GOB_SIZE_X_SHIFT + GOB_SIZE_Y_SHIFT + GOB_SIZE_Z_SHI
 
 const uvec2 SWIZZLE_MASK = uvec2(GOB_SIZE_X - 1, GOB_SIZE_Y - 1);
 
+uint SwizzleTable(uint pos) {
+    const uint t[8] = uint[](
+        0x12100200, 0x13110301, 0x16140604, 0x17150705,
+        0x1a180a08, 0x1b190b09, 0x1e1c0e0c, 0x1f1d0f0d
+    );
+    const uint i = pos >> 4;
+    const uint h = (t[i / 4] >> ((i % 4) * 8)) & 0xff;
+    return (h << 4) | (pos & 0xf);
+}
+
 uint SwizzleOffset(uvec2 pos) {
     pos = pos & SWIZZLE_MASK;
-    return swizzle_table[pos.y * 64 + pos.x];
+    return SwizzleTable(pos.y * 64 + pos.x);
 }
 
 uvec4 ReadTexel(uint offset) {

src/video_core/host_shaders/block_linear_unswizzle_3d_bcn.comp

@@ -10,9 +10,8 @@
     #define BEGIN_PUSH_CONSTANTS layout(push_constant) uniform PushConstants {
     #define END_PUSH_CONSTANTS };
     #define UNIFORM(n)
-    #define BINDING_SWIZZLE_BUFFER 0
-    #define BINDING_INPUT_BUFFER   1
-    #define BINDING_OUTPUT_BUFFER  2
+    #define BINDING_INPUT_BUFFER   0
+    #define BINDING_OUTPUT_BUFFER  1
 #else
     #extension GL_NV_gpu_shader5 : enable
     #ifdef GL_NV_gpu_shader5
@@ -23,7 +22,6 @@
     #define BEGIN_PUSH_CONSTANTS
     #define END_PUSH_CONSTANTS
     #define UNIFORM(n) layout(location = n) uniform
-    #define BINDING_SWIZZLE_BUFFER 0
     #define BINDING_INPUT_BUFFER   1
     #define BINDING_OUTPUT_BUFFER  0
 #endif
@@ -66,13 +64,9 @@ END_PUSH_CONSTANTS
 #endif
 
 // --- Buffers ---
-layout(binding = BINDING_SWIZZLE_BUFFER, std430) readonly buffer SwizzleTable {
-    uint swizzle_table[];
-};
-
 #if HAS_EXTENDED_TYPES
-    layout(binding = BINDING_INPUT_BUFFER, std430) buffer InputBufferU8   { uint8_t  u8data[];  };
-    layout(binding = BINDING_INPUT_BUFFER, std430) buffer InputBufferU16  { uint16_t u16data[]; };
+layout(binding = BINDING_INPUT_BUFFER, std430) buffer InputBufferU8   { uint8_t  u8data[];  };
+layout(binding = BINDING_INPUT_BUFFER, std430) buffer InputBufferU16  { uint16_t u16data[]; };
 #endif
 layout(binding = BINDING_INPUT_BUFFER, std430) buffer InputBufferU32  { uint   u32data[];  };
 layout(binding = BINDING_INPUT_BUFFER, std430) buffer InputBufferU64  { uvec2  u64data[];  };
@@ -96,10 +90,20 @@ const uint GOB_SIZE_Z_SHIFT = 0;
 const uint GOB_SIZE_SHIFT   = GOB_SIZE_X_SHIFT + GOB_SIZE_Y_SHIFT + GOB_SIZE_Z_SHIFT;
 const uvec2 SWIZZLE_MASK = uvec2(GOB_SIZE_X - 1u, GOB_SIZE_Y - 1u);
 
+uint SwizzleTable(uint pos) {
+    const uint t[8] = uint[](
+        0x12100200, 0x13110301, 0x16140604, 0x17150705,
+        0x1a180a08, 0x1b190b09, 0x1e1c0e0c, 0x1f1d0f0d
+    );
+    const uint i = pos >> 4;
+    const uint h = (t[i / 4] >> ((i % 4) * 8)) & 0xff;
+    return (h << 4) | (pos & 0xf);
+}
+
 // --- Helpers ---
 uint SwizzleOffset(uvec2 pos) {
     pos &= SWIZZLE_MASK;
-    return swizzle_table[pos.y * 64u + pos.x];
+    return SwizzleTable(pos.y * 64u + pos.x);
 }
 
 uvec4 ReadTexel(uint offset) {

src/video_core/renderer_opengl/util_shaders.cpp

@@ -1,3 +1,6 @@
+// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project
+// SPDX-License-Identifier: GPL-3.0-or-later
+
 // SPDX-FileCopyrightText: Copyright 2020 yuzu Emulator Project
 // SPDX-License-Identifier: GPL-2.0-or-later
 
@@ -56,10 +59,8 @@ UtilShaders::UtilShaders(ProgramManager& program_manager_)
       copy_bc4_program(MakeProgram(OPENGL_COPY_BC4_COMP)),
       convert_s8d24_program(MakeProgram(OPENGL_CONVERT_S8D24_COMP)),
       convert_ms_to_nonms_program(MakeProgram(CONVERT_MSAA_TO_NON_MSAA_COMP)),
-      convert_nonms_to_ms_program(MakeProgram(CONVERT_NON_MSAA_TO_MSAA_COMP)) {
-    const auto swizzle_table = Tegra::Texture::MakeSwizzleTable();
-    swizzle_table_buffer.Create();
-    glNamedBufferStorage(swizzle_table_buffer.handle, sizeof(swizzle_table), &swizzle_table, 0);
+      convert_nonms_to_ms_program(MakeProgram(CONVERT_NON_MSAA_TO_MSAA_COMP))
+{
 }
 
 UtilShaders::~UtilShaders() = default;
@@ -116,13 +117,11 @@ void UtilShaders::ASTCDecode(Image& image, const StagingBufferMap& map,
 void UtilShaders::BlockLinearUpload2D(Image& image, const StagingBufferMap& map,
                                       std::span<const SwizzleParameters> swizzles) {
     static constexpr Extent3D WORKGROUP_SIZE{32, 32, 1};
-    static constexpr GLuint BINDING_SWIZZLE_BUFFER = 0;
-    static constexpr GLuint BINDING_INPUT_BUFFER = 1;
+    static constexpr GLuint BINDING_INPUT_BUFFER = 0;
     static constexpr GLuint BINDING_OUTPUT_IMAGE = 0;
 
     program_manager.BindComputeProgram(block_linear_unswizzle_2d_program.handle);
     glFlushMappedNamedBufferRange(map.buffer, map.offset, image.guest_size_bytes);
-    glBindBufferBase(GL_SHADER_STORAGE_BUFFER, BINDING_SWIZZLE_BUFFER, swizzle_table_buffer.handle);
 
     const GLenum store_format = StoreFormat(BytesPerBlock(image.info.format));
     for (const SwizzleParameters& swizzle : swizzles) {
@@ -153,14 +152,11 @@ void UtilShaders::BlockLinearUpload2D(Image& image, const StagingBufferMap& map,
 void UtilShaders::BlockLinearUpload3D(Image& image, const StagingBufferMap& map,
                                       std::span<const SwizzleParameters> swizzles) {
     static constexpr Extent3D WORKGROUP_SIZE{16, 8, 8};
-
-    static constexpr GLuint BINDING_SWIZZLE_BUFFER = 0;
-    static constexpr GLuint BINDING_INPUT_BUFFER = 1;
+    static constexpr GLuint BINDING_INPUT_BUFFER = 0;
     static constexpr GLuint BINDING_OUTPUT_IMAGE = 0;
 
     glFlushMappedNamedBufferRange(map.buffer, map.offset, image.guest_size_bytes);
     program_manager.BindComputeProgram(block_linear_unswizzle_3d_program.handle);
-    glBindBufferBase(GL_SHADER_STORAGE_BUFFER, BINDING_SWIZZLE_BUFFER, swizzle_table_buffer.handle);
 
     const GLenum store_format = StoreFormat(BytesPerBlock(image.info.format));
     for (const SwizzleParameters& swizzle : swizzles) {

src/video_core/renderer_opengl/util_shaders.h

@@ -1,3 +1,6 @@
+// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project
+// SPDX-License-Identifier: GPL-3.0-or-later
+
 // SPDX-FileCopyrightText: Copyright 2020 yuzu Emulator Project
 // SPDX-License-Identifier: GPL-2.0-or-later
 
@@ -45,9 +48,6 @@ public:
 
 private:
     ProgramManager& program_manager;
-
-    OGLBuffer swizzle_table_buffer;
-
     OGLProgram astc_decoder_program;
     OGLProgram block_linear_unswizzle_2d_program;
     OGLProgram block_linear_unswizzle_3d_program;

src/video_core/renderer_vulkan/renderer_vulkan.cpp

@@ -169,6 +169,7 @@ try
 }
 
 RendererVulkan::~RendererVulkan() {
+    scheduler.WaitWorker();
     scheduler.RegisterOnSubmit([] {});
     void(device.GetLogical().WaitIdle());
 }

src/video_core/renderer_vulkan/vk_compute_pass.cpp

@@ -25,6 +25,9 @@
 #include "video_core/host_shaders/vulkan_quad_indexed_comp_spv.h"
 #include "video_core/host_shaders/vulkan_uint8_comp_spv.h"
 #include "video_core/host_shaders/block_linear_unswizzle_3d_bcn_comp_spv.h"
+#include "video_core/host_shaders/block_linear_unswizzle_2d_comp_spv.h"
+#include "video_core/host_shaders/block_linear_unswizzle_3d_comp_spv.h"
+#include "video_core/host_shaders/pitch_unswizzle_comp_spv.h"
 #include "video_core/renderer_vulkan/vk_compute_pass.h"
 #include "video_core/renderer_vulkan/vk_descriptor_pool.h"
 #include "video_core/renderer_vulkan/vk_scheduler.h"
@@ -232,6 +235,26 @@ struct QueriesPrefixScanPushConstants {
 struct ConditionalRenderingResolvePushConstants {
     u32 compare_to_zero;
 };
+
+struct BlockLinear3DImagePushConstants {
+    alignas(16) std::array<u32, 3> origin;
+    alignas(16) std::array<s32, 3> destination;
+    u32 bytes_per_block_log2;
+    u32 slice_size;
+    u32 block_size;
+    u32 x_shift;
+    u32 block_height;
+    u32 block_height_mask;
+    u32 block_depth;
+    u32 block_depth_mask;
+};
+
+struct PitchUnswizzlePushConstants {
+    std::array<u32, 2> origin;
+    std::array<s32, 2> destination;
+    u32 bytes_per_block;
+    u32 pitch;
+};
 } // Anonymous namespace
 
 ComputePass::ComputePass(const Device& device_, Scheduler& scheduler, DescriptorPool& descriptor_pool,
@@ -653,71 +676,311 @@ void ASTCDecoderPass::Assemble(Image& image, const StagingBufferRef& map,
     scheduler.Finish();
 }
 
-constexpr u32 BL3D_BINDING_SWIZZLE_TABLE = 0;
-constexpr u32 BL3D_BINDING_INPUT_BUFFER  = 1;
-constexpr u32 BL3D_BINDING_OUTPUT_BUFFER = 2;
+BlockLinearUnswizzleImage2DPass::BlockLinearUnswizzleImage2DPass(
+    const Device& device_, Scheduler& scheduler_, DescriptorPool& descriptor_pool_,
+    StagingBufferPool& staging_buffer_pool_,
+    ComputePassDescriptorQueue& compute_pass_descriptor_queue_)
+    : ComputePass(device_, scheduler_, descriptor_pool_, ASTC_DESCRIPTOR_SET_BINDINGS,
+                  ASTC_PASS_DESCRIPTOR_UPDATE_TEMPLATE_ENTRY, ASTC_BANK_INFO,
+                  COMPUTE_PUSH_CONSTANT_RANGE<sizeof(BlockLinearSwizzle2DParams)>,
+                  BLOCK_LINEAR_UNSWIZZLE_2D_COMP_SPV),
+      scheduler{scheduler_}, staging_buffer_pool{staging_buffer_pool_},
+      compute_pass_descriptor_queue{compute_pass_descriptor_queue_} {}
 
-constexpr std::array<VkDescriptorSetLayoutBinding, 3> BL3D_DESCRIPTOR_SET_BINDINGS{{
-    {
-        .binding = BL3D_BINDING_SWIZZLE_TABLE,
-        .descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_BUFFER, // swizzle_table[]
-        .descriptorCount = 1,
-        .stageFlags = VK_SHADER_STAGE_COMPUTE_BIT,
-        .pImmutableSamplers = nullptr,
-    },
-    {
-        .binding = BL3D_BINDING_INPUT_BUFFER,
-        .descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_BUFFER, // block-linear input
-        .descriptorCount = 1,
-        .stageFlags = VK_SHADER_STAGE_COMPUTE_BIT,
-        .pImmutableSamplers = nullptr,
-    },
-    {
-        .binding = BL3D_BINDING_OUTPUT_BUFFER,
-        .descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_BUFFER,
-        .descriptorCount = 1,
-        .stageFlags = VK_SHADER_STAGE_COMPUTE_BIT,
-        .pImmutableSamplers = nullptr,
-    },
-}};
+BlockLinearUnswizzleImage2DPass::~BlockLinearUnswizzleImage2DPass() = default;
 
-constexpr DescriptorBankInfo BL3D_BANK_INFO{
-    .uniform_buffers = 0,
-    .storage_buffers = 3,
-    .texture_buffers = 0,
-    .image_buffers = 0,
-    .textures = 0,
-    .images = 0,
-    .score = 3,
-};
+void BlockLinearUnswizzleImage2DPass::Unswizzle(
+    Image& image, const StagingBufferRef& map,
+    std::span<const VideoCommon::SwizzleParameters> swizzles) {
+    using namespace VideoCommon::Accelerated;
+    scheduler.RequestOutsideRenderPassOperationContext();
+    const VkPipeline vk_pipeline = *pipeline;
+    const VkImageAspectFlags aspect_mask = image.AspectMask();
+    const VkImage vk_image = image.Handle();
+    const bool is_initialized = image.ExchangeInitialization();
+    scheduler.Record([vk_pipeline, vk_image, aspect_mask,
+                      is_initialized](vk::CommandBuffer cmdbuf) {
+        const VkImageMemoryBarrier image_barrier{
+            .sType = VK_STRUCTURE_TYPE_IMAGE_MEMORY_BARRIER,
+            .pNext = nullptr,
+            .srcAccessMask = static_cast<VkAccessFlags>(is_initialized ? VK_ACCESS_SHADER_WRITE_BIT
+                                                                       : VK_ACCESS_NONE),
+            .dstAccessMask = VK_ACCESS_SHADER_READ_BIT | VK_ACCESS_SHADER_WRITE_BIT,
+            .oldLayout = is_initialized ? VK_IMAGE_LAYOUT_GENERAL : VK_IMAGE_LAYOUT_UNDEFINED,
+            .newLayout = VK_IMAGE_LAYOUT_GENERAL,
+            .srcQueueFamilyIndex = VK_QUEUE_FAMILY_IGNORED,
+            .dstQueueFamilyIndex = VK_QUEUE_FAMILY_IGNORED,
+            .image = vk_image,
+            .subresourceRange{
+                .aspectMask = aspect_mask,
+                .baseMipLevel = 0,
+                .levelCount = VK_REMAINING_MIP_LEVELS,
+                .baseArrayLayer = 0,
+                .layerCount = VK_REMAINING_ARRAY_LAYERS,
+            },
+        };
+        cmdbuf.PipelineBarrier(is_initialized ? vk::PIPELINE_STAGE_GRAPHICS_COMPUTE_TRANSFER
+                              : VkPipelineStageFlags(VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT),
+                       VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT, 0, image_barrier);
+        cmdbuf.BindPipeline(VK_PIPELINE_BIND_POINT_COMPUTE, vk_pipeline);
+    });
+    for (const VideoCommon::SwizzleParameters& swizzle : swizzles) {
+        const size_t input_offset = swizzle.buffer_offset + map.offset;
+        const u32 num_dispatches_x = Common::DivCeil(swizzle.num_tiles.width, 32U);
+        const u32 num_dispatches_y = Common::DivCeil(swizzle.num_tiles.height, 32U);
+        const u32 num_dispatches_z = image.info.resources.layers;
 
-constexpr std::array<VkDescriptorUpdateTemplateEntry, 3>
-    BL3D_DESCRIPTOR_UPDATE_TEMPLATE_ENTRY{{
-        {
-            .dstBinding = BL3D_BINDING_SWIZZLE_TABLE,
-            .dstArrayElement = 0,
-            .descriptorCount = 1,
-            .descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_BUFFER,
-            .offset = BL3D_BINDING_SWIZZLE_TABLE * sizeof(DescriptorUpdateEntry),
-            .stride = sizeof(DescriptorUpdateEntry),
-        },
-        {
-            .dstBinding = BL3D_BINDING_INPUT_BUFFER,
-            .dstArrayElement = 0,
-            .descriptorCount = 1,
-            .descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_BUFFER,
-            .offset = BL3D_BINDING_INPUT_BUFFER * sizeof(DescriptorUpdateEntry),
-            .stride = sizeof(DescriptorUpdateEntry),
-        },
-        {
-            .dstBinding = BL3D_BINDING_OUTPUT_BUFFER,
-            .dstArrayElement = 0,
-            .descriptorCount = 1,
-            .descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_BUFFER,
-            .offset = BL3D_BINDING_OUTPUT_BUFFER * sizeof(DescriptorUpdateEntry),
-            .stride = sizeof(DescriptorUpdateEntry),
-        }
-    }};
+        compute_pass_descriptor_queue.Acquire(scheduler, 2);
+        compute_pass_descriptor_queue.AddBuffer(map.buffer, input_offset,
+                                                image.guest_size_bytes - swizzle.buffer_offset);
+        compute_pass_descriptor_queue.AddImage(image.StorageImageView(swizzle.level));
+        const void* const descriptor_data{compute_pass_descriptor_queue.UpdateData()};
+
+        const auto params = MakeBlockLinearSwizzle2DParams(swizzle, image.info);
+        scheduler.Record([this, num_dispatches_x, num_dispatches_y, num_dispatches_z, params,
+                          descriptor_data](vk::CommandBuffer cmdbuf) {
+            const VkDescriptorSet set = descriptor_allocator.Commit();
+            device.GetLogical().UpdateDescriptorSet(set, *descriptor_template, descriptor_data);
+            cmdbuf.BindDescriptorSets(VK_PIPELINE_BIND_POINT_COMPUTE, *layout, 0, set, {});
+            cmdbuf.PushConstants(*layout, VK_SHADER_STAGE_COMPUTE_BIT, params);
+            cmdbuf.Dispatch(num_dispatches_x, num_dispatches_y, num_dispatches_z);
+        });
+    }
+    scheduler.Record([vk_image, aspect_mask](vk::CommandBuffer cmdbuf) {
+        const VkImageMemoryBarrier image_barrier{
+            .sType = VK_STRUCTURE_TYPE_IMAGE_MEMORY_BARRIER,
+            .pNext = nullptr,
+            .srcAccessMask = VK_ACCESS_SHADER_WRITE_BIT,
+            .dstAccessMask = VK_ACCESS_SHADER_READ_BIT | VK_ACCESS_SHADER_WRITE_BIT |
+                             VK_ACCESS_TRANSFER_READ_BIT | VK_ACCESS_TRANSFER_WRITE_BIT,
+            .oldLayout = VK_IMAGE_LAYOUT_GENERAL,
+            .newLayout = VK_IMAGE_LAYOUT_GENERAL,
+            .srcQueueFamilyIndex = VK_QUEUE_FAMILY_IGNORED,
+            .dstQueueFamilyIndex = VK_QUEUE_FAMILY_IGNORED,
+            .image = vk_image,
+            .subresourceRange{
+                .aspectMask = aspect_mask,
+                .baseMipLevel = 0,
+                .levelCount = VK_REMAINING_MIP_LEVELS,
+                .baseArrayLayer = 0,
+                .layerCount = VK_REMAINING_ARRAY_LAYERS,
+            },
+        };
+        cmdbuf.PipelineBarrier(VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT,
+                       vk::PIPELINE_STAGE_GRAPHICS_COMPUTE_TRANSFER, 0, image_barrier);
+    });
+    scheduler.Finish();
+}
+
+BlockLinearUnswizzleImage3DPass::BlockLinearUnswizzleImage3DPass(
+    const Device& device_, Scheduler& scheduler_, DescriptorPool& descriptor_pool_,
+    StagingBufferPool& staging_buffer_pool_,
+    ComputePassDescriptorQueue& compute_pass_descriptor_queue_)
+    : ComputePass(device_, scheduler_, descriptor_pool_, ASTC_DESCRIPTOR_SET_BINDINGS,
+                  ASTC_PASS_DESCRIPTOR_UPDATE_TEMPLATE_ENTRY, ASTC_BANK_INFO,
+                  COMPUTE_PUSH_CONSTANT_RANGE<sizeof(BlockLinear3DImagePushConstants)>,
+                  BLOCK_LINEAR_UNSWIZZLE_3D_COMP_SPV),
+      scheduler{scheduler_}, staging_buffer_pool{staging_buffer_pool_},
+      compute_pass_descriptor_queue{compute_pass_descriptor_queue_} {}
+
+BlockLinearUnswizzleImage3DPass::~BlockLinearUnswizzleImage3DPass() = default;
+
+void BlockLinearUnswizzleImage3DPass::Unswizzle(
+    Image& image, const StagingBufferRef& map,
+    std::span<const VideoCommon::SwizzleParameters> swizzles) {
+    using namespace VideoCommon::Accelerated;
+    scheduler.RequestOutsideRenderPassOperationContext();
+    const VkPipeline vk_pipeline = *pipeline;
+    const VkImageAspectFlags aspect_mask = image.AspectMask();
+    const VkImage vk_image = image.Handle();
+    const bool is_initialized = image.ExchangeInitialization();
+    scheduler.Record([vk_pipeline, vk_image, aspect_mask,
+                      is_initialized](vk::CommandBuffer cmdbuf) {
+        const VkImageMemoryBarrier image_barrier{
+            .sType = VK_STRUCTURE_TYPE_IMAGE_MEMORY_BARRIER,
+            .pNext = nullptr,
+            .srcAccessMask = static_cast<VkAccessFlags>(is_initialized ? VK_ACCESS_SHADER_WRITE_BIT
+                                                                       : VK_ACCESS_NONE),
+            .dstAccessMask = VK_ACCESS_SHADER_READ_BIT | VK_ACCESS_SHADER_WRITE_BIT,
+            .oldLayout = is_initialized ? VK_IMAGE_LAYOUT_GENERAL : VK_IMAGE_LAYOUT_UNDEFINED,
+            .newLayout = VK_IMAGE_LAYOUT_GENERAL,
+            .srcQueueFamilyIndex = VK_QUEUE_FAMILY_IGNORED,
+            .dstQueueFamilyIndex = VK_QUEUE_FAMILY_IGNORED,
+            .image = vk_image,
+            .subresourceRange{
+                .aspectMask = aspect_mask,
+                .baseMipLevel = 0,
+                .levelCount = VK_REMAINING_MIP_LEVELS,
+                .baseArrayLayer = 0,
+                .layerCount = VK_REMAINING_ARRAY_LAYERS,
+            },
+        };
+        cmdbuf.PipelineBarrier(is_initialized ? vk::PIPELINE_STAGE_GRAPHICS_COMPUTE_TRANSFER
+                              : VkPipelineStageFlags(VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT),
+                       VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT, 0, image_barrier);
+        cmdbuf.BindPipeline(VK_PIPELINE_BIND_POINT_COMPUTE, vk_pipeline);
+    });
+    for (const VideoCommon::SwizzleParameters& swizzle : swizzles) {
+        const size_t input_offset = swizzle.buffer_offset + map.offset;
+        const u32 num_dispatches_x = Common::DivCeil(swizzle.num_tiles.width, 16U);
+        const u32 num_dispatches_y = Common::DivCeil(swizzle.num_tiles.height, 8U);
+        const u32 num_dispatches_z = Common::DivCeil(swizzle.num_tiles.depth, 8U);
+
+        compute_pass_descriptor_queue.Acquire(scheduler, 2);
+        compute_pass_descriptor_queue.AddBuffer(map.buffer, input_offset,
+                                                image.guest_size_bytes - swizzle.buffer_offset);
+        compute_pass_descriptor_queue.AddImage(image.StorageImageView(swizzle.level));
+        const void* const descriptor_data{compute_pass_descriptor_queue.UpdateData()};
+
+        const auto p = MakeBlockLinearSwizzle3DParams(swizzle, image.info);
+        const BlockLinear3DImagePushConstants params{
+            .origin = p.origin,
+            .destination = p.destination,
+            .bytes_per_block_log2 = p.bytes_per_block_log2,
+            .slice_size = p.slice_size,
+            .block_size = p.block_size,
+            .x_shift = p.x_shift,
+            .block_height = p.block_height,
+            .block_height_mask = p.block_height_mask,
+            .block_depth = p.block_depth,
+            .block_depth_mask = p.block_depth_mask,
+        };
+        scheduler.Record([this, num_dispatches_x, num_dispatches_y, num_dispatches_z, params,
+                          descriptor_data](vk::CommandBuffer cmdbuf) {
+            const VkDescriptorSet set = descriptor_allocator.Commit();
+            device.GetLogical().UpdateDescriptorSet(set, *descriptor_template, descriptor_data);
+            cmdbuf.BindDescriptorSets(VK_PIPELINE_BIND_POINT_COMPUTE, *layout, 0, set, {});
+            cmdbuf.PushConstants(*layout, VK_SHADER_STAGE_COMPUTE_BIT, params);
+            cmdbuf.Dispatch(num_dispatches_x, num_dispatches_y, num_dispatches_z);
+        });
+    }
+    scheduler.Record([vk_image, aspect_mask](vk::CommandBuffer cmdbuf) {
+        const VkImageMemoryBarrier image_barrier{
+            .sType = VK_STRUCTURE_TYPE_IMAGE_MEMORY_BARRIER,
+            .pNext = nullptr,
+            .srcAccessMask = VK_ACCESS_SHADER_WRITE_BIT,
+            .dstAccessMask = VK_ACCESS_SHADER_READ_BIT | VK_ACCESS_SHADER_WRITE_BIT |
+                             VK_ACCESS_TRANSFER_READ_BIT | VK_ACCESS_TRANSFER_WRITE_BIT,
+            .oldLayout = VK_IMAGE_LAYOUT_GENERAL,
+            .newLayout = VK_IMAGE_LAYOUT_GENERAL,
+            .srcQueueFamilyIndex = VK_QUEUE_FAMILY_IGNORED,
+            .dstQueueFamilyIndex = VK_QUEUE_FAMILY_IGNORED,
+            .image = vk_image,
+            .subresourceRange{
+                .aspectMask = aspect_mask,
+                .baseMipLevel = 0,
+                .levelCount = VK_REMAINING_MIP_LEVELS,
+                .baseArrayLayer = 0,
+                .layerCount = VK_REMAINING_ARRAY_LAYERS,
+            },
+        };
+        cmdbuf.PipelineBarrier(VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT,
+                       vk::PIPELINE_STAGE_GRAPHICS_COMPUTE_TRANSFER, 0, image_barrier);
+    });
+    scheduler.Finish();
+}
+
+PitchUnswizzlePass::PitchUnswizzlePass(const Device& device_, Scheduler& scheduler_,
+                                       DescriptorPool& descriptor_pool_,
+                                       StagingBufferPool& staging_buffer_pool_,
+                                       ComputePassDescriptorQueue& compute_pass_descriptor_queue_)
+    : ComputePass(device_, scheduler_, descriptor_pool_, ASTC_DESCRIPTOR_SET_BINDINGS,
+                  ASTC_PASS_DESCRIPTOR_UPDATE_TEMPLATE_ENTRY, ASTC_BANK_INFO,
+                  COMPUTE_PUSH_CONSTANT_RANGE<sizeof(PitchUnswizzlePushConstants)>,
+                  PITCH_UNSWIZZLE_COMP_SPV),
+      scheduler{scheduler_}, staging_buffer_pool{staging_buffer_pool_},
+      compute_pass_descriptor_queue{compute_pass_descriptor_queue_} {}
+
+PitchUnswizzlePass::~PitchUnswizzlePass() = default;
+
+void PitchUnswizzlePass::Unswizzle(Image& image, const StagingBufferRef& map,
+                                   std::span<const VideoCommon::SwizzleParameters> swizzles) {
+    scheduler.RequestOutsideRenderPassOperationContext();
+    const VkPipeline vk_pipeline = *pipeline;
+    const VkImageAspectFlags aspect_mask = image.AspectMask();
+    const VkImage vk_image = image.Handle();
+    const bool is_initialized = image.ExchangeInitialization();
+    scheduler.Record([vk_pipeline, vk_image, aspect_mask,
+                      is_initialized](vk::CommandBuffer cmdbuf) {
+        const VkImageMemoryBarrier image_barrier{
+            .sType = VK_STRUCTURE_TYPE_IMAGE_MEMORY_BARRIER,
+            .pNext = nullptr,
+            .srcAccessMask = static_cast<VkAccessFlags>(is_initialized ? VK_ACCESS_SHADER_WRITE_BIT
+                                                                       : VK_ACCESS_NONE),
+            .dstAccessMask = VK_ACCESS_SHADER_READ_BIT | VK_ACCESS_SHADER_WRITE_BIT,
+            .oldLayout = is_initialized ? VK_IMAGE_LAYOUT_GENERAL : VK_IMAGE_LAYOUT_UNDEFINED,
+            .newLayout = VK_IMAGE_LAYOUT_GENERAL,
+            .srcQueueFamilyIndex = VK_QUEUE_FAMILY_IGNORED,
+            .dstQueueFamilyIndex = VK_QUEUE_FAMILY_IGNORED,
+            .image = vk_image,
+            .subresourceRange{
+                .aspectMask = aspect_mask,
+                .baseMipLevel = 0,
+                .levelCount = VK_REMAINING_MIP_LEVELS,
+                .baseArrayLayer = 0,
+                .layerCount = VK_REMAINING_ARRAY_LAYERS,
+            },
+        };
+        cmdbuf.PipelineBarrier(is_initialized ? vk::PIPELINE_STAGE_GRAPHICS_COMPUTE_TRANSFER
+                              : VkPipelineStageFlags(VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT),
+                       VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT, 0, image_barrier);
+        cmdbuf.BindPipeline(VK_PIPELINE_BIND_POINT_COMPUTE, vk_pipeline);
+    });
+    const u32 bytes_per_block = VideoCore::Surface::BytesPerBlock(image.info.format);
+    for (const VideoCommon::SwizzleParameters& swizzle : swizzles) {
+        const size_t input_offset = swizzle.buffer_offset + map.offset;
+        const u32 num_dispatches_x = Common::DivCeil(swizzle.num_tiles.width, 32U);
+        const u32 num_dispatches_y = Common::DivCeil(swizzle.num_tiles.height, 32U);
+
+        compute_pass_descriptor_queue.Acquire(scheduler, 2);
+        compute_pass_descriptor_queue.AddBuffer(map.buffer, input_offset,
+                                                image.guest_size_bytes - swizzle.buffer_offset);
+        compute_pass_descriptor_queue.AddImage(image.StorageImageView(swizzle.level));
+        const void* const descriptor_data{compute_pass_descriptor_queue.UpdateData()};
+
+        const PitchUnswizzlePushConstants params{
+            .origin = {0, 0},
+            .destination = {0, 0},
+            .bytes_per_block = bytes_per_block,
+            .pitch = image.info.pitch,
+        };
+        scheduler.Record([this, num_dispatches_x, num_dispatches_y, params,
+                          descriptor_data](vk::CommandBuffer cmdbuf) {
+            const VkDescriptorSet set = descriptor_allocator.Commit();
+            device.GetLogical().UpdateDescriptorSet(set, *descriptor_template, descriptor_data);
+            cmdbuf.BindDescriptorSets(VK_PIPELINE_BIND_POINT_COMPUTE, *layout, 0, set, {});
+            cmdbuf.PushConstants(*layout, VK_SHADER_STAGE_COMPUTE_BIT, params);
+            cmdbuf.Dispatch(num_dispatches_x, num_dispatches_y, 1);
+        });
+    }
+    scheduler.Record([vk_image, aspect_mask](vk::CommandBuffer cmdbuf) {
+        const VkImageMemoryBarrier image_barrier{
+            .sType = VK_STRUCTURE_TYPE_IMAGE_MEMORY_BARRIER,
+            .pNext = nullptr,
+            .srcAccessMask = VK_ACCESS_SHADER_WRITE_BIT,
+            .dstAccessMask = VK_ACCESS_SHADER_READ_BIT | VK_ACCESS_SHADER_WRITE_BIT |
+                             VK_ACCESS_TRANSFER_READ_BIT | VK_ACCESS_TRANSFER_WRITE_BIT,
+            .oldLayout = VK_IMAGE_LAYOUT_GENERAL,
+            .newLayout = VK_IMAGE_LAYOUT_GENERAL,
+            .srcQueueFamilyIndex = VK_QUEUE_FAMILY_IGNORED,
+            .dstQueueFamilyIndex = VK_QUEUE_FAMILY_IGNORED,
+            .image = vk_image,
+            .subresourceRange{
+                .aspectMask = aspect_mask,
+                .baseMipLevel = 0,
+                .levelCount = VK_REMAINING_MIP_LEVELS,
+                .baseArrayLayer = 0,
+                .layerCount = VK_REMAINING_ARRAY_LAYERS,
+            },
+        };
+        cmdbuf.PipelineBarrier(VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT,
+                       vk::PIPELINE_STAGE_GRAPHICS_COMPUTE_TRANSFER, 0, image_barrier);
+    });
+    scheduler.Finish();
+}
+
+constexpr u32 BL3D_BINDING_INPUT_BUFFER  = 0;
+constexpr u32 BL3D_BINDING_OUTPUT_BUFFER = 1;
 
 struct alignas(16) BlockLinearUnswizzle3DPushConstants {
     u32 blocks_dim[3];           // Offset 0
@@ -745,11 +1008,50 @@ BlockLinearUnswizzle3DPass::BlockLinearUnswizzle3DPass(
     DescriptorPool& descriptor_pool_,
     StagingBufferPool& staging_buffer_pool_,
     ComputePassDescriptorQueue& compute_pass_descriptor_queue_)
-    : ComputePass(
-          device_, scheduler_, descriptor_pool_,
-          BL3D_DESCRIPTOR_SET_BINDINGS,
-          BL3D_DESCRIPTOR_UPDATE_TEMPLATE_ENTRY,
-          BL3D_BANK_INFO,
+    : ComputePass(device_, scheduler_, descriptor_pool_,
+        std::array<VkDescriptorSetLayoutBinding, 2>{{
+    {
+        .binding = BL3D_BINDING_INPUT_BUFFER,
+        .descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_BUFFER, // block-linear input
+        .descriptorCount = 1,
+        .stageFlags = VK_SHADER_STAGE_COMPUTE_BIT,
+        .pImmutableSamplers = nullptr,
+    },
+    {
+        .binding = BL3D_BINDING_OUTPUT_BUFFER,
+        .descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_BUFFER,
+        .descriptorCount = 1,
+        .stageFlags = VK_SHADER_STAGE_COMPUTE_BIT,
+        .pImmutableSamplers = nullptr,
+    },
+        }},
+        std::array<VkDescriptorUpdateTemplateEntry, 2>{{
+        {
+            .dstBinding = BL3D_BINDING_INPUT_BUFFER,
+            .dstArrayElement = 0,
+            .descriptorCount = 1,
+            .descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_BUFFER,
+            .offset = BL3D_BINDING_INPUT_BUFFER * sizeof(DescriptorUpdateEntry),
+            .stride = sizeof(DescriptorUpdateEntry),
+        },
+        {
+            .dstBinding = BL3D_BINDING_OUTPUT_BUFFER,
+            .dstArrayElement = 0,
+            .descriptorCount = 1,
+            .descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_BUFFER,
+            .offset = BL3D_BINDING_OUTPUT_BUFFER * sizeof(DescriptorUpdateEntry),
+            .stride = sizeof(DescriptorUpdateEntry),
+        }
+        }},
+        DescriptorBankInfo{
+            .uniform_buffers = 0,
+            .storage_buffers = 2,
+            .texture_buffers = 0,
+            .image_buffers = 0,
+            .textures = 0,
+            .images = 0,
+            .score = 2,
+        },
           COMPUTE_PUSH_CONSTANT_RANGE<sizeof(BlockLinearUnswizzle3DPushConstants)>,
           BLOCK_LINEAR_UNSWIZZLE_3D_BCN_COMP_SPV),
       scheduler{scheduler_},
@@ -822,8 +1124,6 @@ void BlockLinearUnswizzle3DPass::UnswizzleChunk(
     pc.blocks_dim[2] = z_count; // Only process the count
 
     compute_pass_descriptor_queue.Acquire(scheduler, 3);
-    compute_pass_descriptor_queue.AddBuffer(*image.runtime->swizzle_table_buffer, 0,
-                                           image.runtime->swizzle_table_size);
     compute_pass_descriptor_queue.AddBuffer(swizzled.buffer,
                                            sw.buffer_offset + swizzled.offset,
                                            image.guest_size_bytes - sw.buffer_offset);
@@ -859,6 +1159,23 @@ void BlockLinearUnswizzle3DPass::UnswizzleChunk(
             return;
         }
 
+        if (!is_first_chunk) {
+            const VkBufferMemoryBarrier reuse_barrier{
+                .sType = VK_STRUCTURE_TYPE_BUFFER_MEMORY_BARRIER,
+                .pNext = nullptr,
+                .srcAccessMask = VK_ACCESS_TRANSFER_READ_BIT,
+                .dstAccessMask = VK_ACCESS_SHADER_WRITE_BIT,
+                .srcQueueFamilyIndex = VK_QUEUE_FAMILY_IGNORED,
+                .dstQueueFamilyIndex = VK_QUEUE_FAMILY_IGNORED,
+                .buffer = out_buffer,
+                .offset = 0,
+                .size = VK_WHOLE_SIZE,
+            };
+            cmdbuf.PipelineBarrier(VK_PIPELINE_STAGE_TRANSFER_BIT,
+                                   VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT, 0, nullptr,
+                                   reuse_barrier, nullptr);
+        }
+
         device.GetLogical().UpdateDescriptorSet(set, *descriptor_template, descriptor_data);
         cmdbuf.BindPipeline(VK_PIPELINE_BIND_POINT_COMPUTE, *pipeline);
         cmdbuf.BindDescriptorSets(VK_PIPELINE_BIND_POINT_COMPUTE, *layout, 0, set, {});

src/video_core/renderer_vulkan/vk_compute_pass.h

@@ -25,6 +25,7 @@ struct SwizzleParameters;
 
 namespace Vulkan {
 
+using VideoCommon::Accelerated::BlockLinearSwizzle2DParams;
 using VideoCommon::Accelerated::BlockLinearSwizzle3DParams;
 
 class Device;
@@ -164,6 +165,56 @@ private:
     ComputePassDescriptorQueue& compute_pass_descriptor_queue;
 };
 
+class BlockLinearUnswizzleImage2DPass final : public ComputePass {
+public:
+    explicit BlockLinearUnswizzleImage2DPass(const Device& device_, Scheduler& scheduler_,
+                                             DescriptorPool& descriptor_pool_,
+                                             StagingBufferPool& staging_buffer_pool_,
+                                             ComputePassDescriptorQueue& compute_pass_descriptor_queue_);
+    ~BlockLinearUnswizzleImage2DPass();
+
+    void Unswizzle(Image& image, const StagingBufferRef& map,
+                   std::span<const VideoCommon::SwizzleParameters> swizzles);
+
+private:
+    Scheduler& scheduler;
+    StagingBufferPool& staging_buffer_pool;
+    ComputePassDescriptorQueue& compute_pass_descriptor_queue;
+};
+
+class BlockLinearUnswizzleImage3DPass final : public ComputePass {
+public:
+    explicit BlockLinearUnswizzleImage3DPass(const Device& device_, Scheduler& scheduler_,
+                                             DescriptorPool& descriptor_pool_,
+                                             StagingBufferPool& staging_buffer_pool_,
+                                             ComputePassDescriptorQueue& compute_pass_descriptor_queue_);
+    ~BlockLinearUnswizzleImage3DPass();
+
+    void Unswizzle(Image& image, const StagingBufferRef& map,
+                   std::span<const VideoCommon::SwizzleParameters> swizzles);
+
+private:
+    Scheduler& scheduler;
+    StagingBufferPool& staging_buffer_pool;
+    ComputePassDescriptorQueue& compute_pass_descriptor_queue;
+};
+
+class PitchUnswizzlePass final : public ComputePass {
+public:
+    explicit PitchUnswizzlePass(const Device& device_, Scheduler& scheduler_,
+                                DescriptorPool& descriptor_pool_,
+                                StagingBufferPool& staging_buffer_pool_,
+                                ComputePassDescriptorQueue& compute_pass_descriptor_queue_);
+    ~PitchUnswizzlePass();
+
+    void Unswizzle(Image& image, const StagingBufferRef& map,
+                   std::span<const VideoCommon::SwizzleParameters> swizzles);
+
+private:
+    Scheduler& scheduler;
+    StagingBufferPool& staging_buffer_pool;
+    ComputePassDescriptorQueue& compute_pass_descriptor_queue;
+};
 
 class MSAACopyPass final : public ComputePass {
 public:

src/video_core/renderer_vulkan/vk_pipeline_cache.cpp

@@ -378,20 +378,6 @@ PipelineCache::PipelineCache(Tegra::MaxwellDeviceMemoryManager& device_memory_,
       serialization_thread(1, "VkPipelineSerialization") {
     const auto& float_control{device.FloatControlProperties()};
     const VkDriverId driver_id{device.GetDriverID()};
-    const VkShaderStageFlags subgroup_stages{device.GetSubgroupSupportedStages()};
-    const auto subgroup_stage_bit{[subgroup_stages](VkShaderStageFlags flag, Shader::Stage stage) {
-        return (subgroup_stages & flag) != 0 ? (1u << static_cast<u32>(stage)) : 0u;
-    }};
-    const u32 supported_subgroup_stages{
-        subgroup_stage_bit(VK_SHADER_STAGE_VERTEX_BIT, Shader::Stage::VertexA) |
-        subgroup_stage_bit(VK_SHADER_STAGE_VERTEX_BIT, Shader::Stage::VertexB) |
-        subgroup_stage_bit(VK_SHADER_STAGE_TESSELLATION_CONTROL_BIT,
-                           Shader::Stage::TessellationControl) |
-        subgroup_stage_bit(VK_SHADER_STAGE_TESSELLATION_EVALUATION_BIT,
-                           Shader::Stage::TessellationEval) |
-        subgroup_stage_bit(VK_SHADER_STAGE_GEOMETRY_BIT, Shader::Stage::Geometry) |
-        subgroup_stage_bit(VK_SHADER_STAGE_FRAGMENT_BIT, Shader::Stage::Fragment) |
-        subgroup_stage_bit(VK_SHADER_STAGE_COMPUTE_BIT, Shader::Stage::Compute)};
     profile = Shader::Profile{
         .supported_spirv = device.SupportedSpirvVersion(),
         .unified_descriptor_binding = true,
@@ -416,12 +402,7 @@ PipelineCache::PipelineCache(Tegra::MaxwellDeviceMemoryManager& device_memory_,
         .support_fp64_signed_zero_nan_preserve =
             float_control.shaderSignedZeroInfNanPreserveFloat64 != VK_FALSE,
         .support_explicit_workgroup_layout = device.IsKhrWorkgroupMemoryExplicitLayoutSupported(),
-        .support_workgroup_layout_8bit_access =
-            device.IsWorkgroupMemoryExplicitLayout8BitSupported(),
-        .support_workgroup_layout_16bit_access =
-            device.IsWorkgroupMemoryExplicitLayout16BitSupported(),
         .support_vote = device.IsSubgroupFeatureSupported(VK_SUBGROUP_FEATURE_VOTE_BIT),
-        .supported_subgroup_stages = supported_subgroup_stages,
         .support_viewport_index_layer_non_geometry =
             device.IsExtShaderViewportIndexLayerSupported(),
         .support_viewport_mask = device.IsNvViewportArray2Supported(),
@@ -429,7 +410,6 @@ PipelineCache::PipelineCache(Tegra::MaxwellDeviceMemoryManager& device_memory_,
         .support_demote_to_helper_invocation =
             device.IsExtShaderDemoteToHelperInvocationSupported(),
         .support_int64_atomics = device.IsExtShaderAtomicInt64Supported(),
-        .support_shared_int64_atomics = device.IsSharedInt64AtomicsSupported(),
         .support_derivative_control = true,
         .support_geometry_shader_passthrough = device.IsNvGeometryShaderPassthroughSupported(),
         .support_native_ndc = device.IsExtDepthClipControlSupported(),
@@ -453,8 +433,7 @@ PipelineCache::PipelineCache(Tegra::MaxwellDeviceMemoryManager& device_memory_,
         .has_broken_spirv_position_input = driver_id == false,
         .has_broken_unsigned_image_offsets = false,
         .has_broken_signed_operations = false,
-        .has_broken_fp16_float_controls = driver_id == VK_DRIVER_ID_NVIDIA_PROPRIETARY ||
-                                          driver_id == VK_DRIVER_ID_QUALCOMM_PROPRIETARY,
+        .has_broken_fp16_float_controls = driver_id == VK_DRIVER_ID_NVIDIA_PROPRIETARY,
         .ignore_nan_fp_comparisons = false,
         .has_broken_spirv_subgroup_mask_vector_extract_dynamic = false,
         .has_broken_robust =
@@ -925,8 +904,12 @@ std::unique_ptr<ComputePipeline> PipelineCache::CreateComputePipeline(
     }
 
     auto program{TranslateProgram(pools.inst, pools.block, env, cfg, host_info)};
+    const VkDriverIdKHR driver_id = device.GetDriverID();
+    const bool needs_shared_mem_clamp =
+        driver_id == VK_DRIVER_ID_QUALCOMM_PROPRIETARY ||
+        driver_id == VK_DRIVER_ID_ARM_PROPRIETARY;
     const u32 max_shared_memory = device.GetMaxComputeSharedMemorySize();
-    if (program.shared_memory_size > max_shared_memory) {
+    if (needs_shared_mem_clamp && program.shared_memory_size > max_shared_memory) {
         LOG_WARNING(Render_Vulkan,
                     "Compute shader 0x{:016x} requests {}KB shared memory but device max is {}KB - clamping",
                     key.unique_hash,

src/video_core/renderer_vulkan/vk_rasterizer.cpp

@@ -1255,18 +1255,6 @@ void RasterizerVulkan::UpdateDepthBias(Tegra::Engines::Maxwell3D::Regs& regs) {
         }
     }
 
-    const bool is_float_depth =
-        regs.zeta.format == Tegra::DepthFormat::Z32_FLOAT ||
-        regs.zeta.format == Tegra::DepthFormat::Z32_FLOAT_X24S8_UINT;
-    if (is_float_depth && units != 0.0f && !device.IsExtDepthBiasControlSupported()) {
-        static bool logged_float_bias_warning = false;
-        if (!logged_float_bias_warning) {
-            logged_float_bias_warning = true;
-            LOG_WARNING(Render_Vulkan,
-                        "Depth bias on a float depth target without VK_EXT_depth_bias_control");
-        }
-    }
-
     scheduler.Record([constant = units, clamp = regs.depth_bias_clamp,
                       factor = regs.slope_scale_depth_bias, this](vk::CommandBuffer cmdbuf) {
         if (device.IsExtDepthBiasControlSupported()) {

src/video_core/renderer_vulkan/vk_texture_cache.cpp

@@ -195,8 +195,42 @@ constexpr VkBorderColor ConvertBorderColor(const std::array<float, 4>& color) {
     return allocator.CreateImage(image_ci);
 }
 
+[[nodiscard]] VkFormat UnswizzleStorageFormat(u32 bytes_per_block) {
+    switch (bytes_per_block) {
+    case 1:
+        return VK_FORMAT_R8_UINT;
+    case 2:
+        return VK_FORMAT_R16_UINT;
+    case 4:
+        return VK_FORMAT_R32_UINT;
+    case 8:
+        return VK_FORMAT_R32G32_UINT;
+    case 16:
+        return VK_FORMAT_R32G32B32A32_UINT;
+    default:
+        ASSERT_MSG(false, "Invalid bytes_per_block={} for accelerated unswizzle", bytes_per_block);
+        return VK_FORMAT_R32_UINT;
+    }
+}
+
+[[nodiscard]] bool IsUnswizzleStorageFormatSupported(const Device& device, u32 bytes_per_block) {
+    switch (bytes_per_block) {
+    case 1:
+        return device.IsStorageBuffer8BitAccessSupported();
+    case 2:
+        return device.IsStorageBuffer16BitAccessSupported();
+    case 4:
+    case 8:
+    case 16:
+        return true;
+    default:
+        return false;
+    }
+}
+
 [[nodiscard]] vk::ImageView MakeStorageView(const vk::Device& device, u32 level, VkImage image,
-                                            VkFormat format) {
+                                            VkFormat format,
+                                            VkImageViewType view_type = VK_IMAGE_VIEW_TYPE_2D_ARRAY) {
     static constexpr VkImageViewUsageCreateInfo storage_image_view_usage_create_info{
         .sType = VK_STRUCTURE_TYPE_IMAGE_VIEW_USAGE_CREATE_INFO,
         .pNext = nullptr,
@@ -207,7 +241,7 @@ constexpr VkBorderColor ConvertBorderColor(const std::array<float, 4>& color) {
         .pNext = &storage_image_view_usage_create_info,
         .flags = 0,
         .image = image,
-        .viewType = VK_IMAGE_VIEW_TYPE_2D_ARRAY,
+        .viewType = view_type,
         .format = format,
         .components{
             .r = VK_COMPONENT_SWIZZLE_IDENTITY,
@@ -887,6 +921,12 @@ TextureCacheRuntime::TextureCacheRuntime(const Device& device_, Scheduler& sched
     if (device.IsStorageImageMultisampleSupported()) {
         msaa_copy_pass.emplace(device, scheduler, descriptor_pool, staging_buffer_pool, compute_pass_descriptor_queue);
     }
+    bl_unswizzle_2d_pass.emplace(device, scheduler, descriptor_pool, staging_buffer_pool,
+                                 compute_pass_descriptor_queue);
+    bl_unswizzle_3d_pass.emplace(device, scheduler, descriptor_pool, staging_buffer_pool,
+                                 compute_pass_descriptor_queue);
+    pitch_unswizzle_pass.emplace(device, scheduler, descriptor_pool, staging_buffer_pool,
+                                 compute_pass_descriptor_queue);
     if (!device.IsKhrImageFormatListSupported()) {
         return;
     }
@@ -894,6 +934,11 @@ TextureCacheRuntime::TextureCacheRuntime(const Device& device_, Scheduler& sched
         const auto image_format = static_cast<PixelFormat>(index_a);
         if (IsPixelFormatASTC(image_format) && !device.IsOptimalAstcSupported()) {
             view_formats[index_a].push_back(VK_FORMAT_A8B8G8R8_UNORM_PACK32);
+        } else if (!IsPixelFormatASTC(image_format) && !IsPixelFormatBCn(image_format)) {
+            const u32 bpp = VideoCore::Surface::BytesPerBlock(image_format);
+            if (IsUnswizzleStorageFormatSupported(device, bpp)) {
+                view_formats[index_a].push_back(UnswizzleStorageFormat(bpp));
+            }
         }
         for (size_t index_b = 0; index_b < VideoCore::Surface::MaxPixelFormat; index_b++) {
             const auto view_format = static_cast<PixelFormat>(index_b);
@@ -909,40 +954,6 @@ TextureCacheRuntime::TextureCacheRuntime(const Device& device_, Scheduler& sched
         bl3d_unswizzle_pass.emplace(device, scheduler, descriptor_pool,
                                    staging_buffer_pool, compute_pass_descriptor_queue);
     }
-
-    // --- Create swizzle table buffer ---
-    {
-        auto table = Tegra::Texture::MakeSwizzleTable();
-
-        swizzle_table_size = static_cast<VkDeviceSize>(table.size() * sizeof(table[0]));
-
-        auto staging = staging_buffer_pool.Request(swizzle_table_size, MemoryUsage::Upload);
-        std::memcpy(staging.mapped_span.data(), table.data(), static_cast<size_t>(swizzle_table_size));
-
-        VkBufferCreateInfo ci{
-            .sType = VK_STRUCTURE_TYPE_BUFFER_CREATE_INFO,
-            .size = swizzle_table_size,
-            .usage = VK_BUFFER_USAGE_STORAGE_BUFFER_BIT |
-                     VK_BUFFER_USAGE_TRANSFER_DST_BIT |
-                     VK_BUFFER_USAGE_TRANSFER_SRC_BIT,
-            .sharingMode = VK_SHARING_MODE_EXCLUSIVE,
-        };
-        swizzle_table_buffer = memory_allocator.CreateBuffer(ci, MemoryUsage::DeviceLocal);
-
-        scheduler.RequestOutsideRenderPassOperationContext();
-        scheduler.Record([staging_buf = staging.buffer,
-                          dst_buf = *swizzle_table_buffer,
-                          size = swizzle_table_size,
-                          src_off = staging.offset](vk::CommandBuffer cmdbuf) {
-
-            const VkBufferCopy region{
-                .srcOffset = src_off,
-                .dstOffset = 0,
-                .size = size,
-            };
-            cmdbuf.CopyBuffer(staging_buf, dst_buf, region);
-        });
-    }
 }
 
 void TextureCacheRuntime::Finish() {
@@ -1614,6 +1625,16 @@ Image::Image(TextureCacheRuntime& runtime_, const ImageInfo& info_, GPUVAddr gpu
         flags |= VideoCommon::ImageFlagBits::Converted;
         flags |= VideoCommon::ImageFlagBits::CostlyLoad;
     }
+    if (!IsPixelFormatASTC(info.format) && !IsPixelFormatBCn(info.format) &&
+        VideoCore::Surface::GetFormatType(info.format) ==
+            VideoCore::Surface::SurfaceType::ColorTexture &&
+        (info.type == ImageType::e2D || info.type == ImageType::e3D ||
+         info.type == ImageType::Linear)) {
+        if (IsUnswizzleStorageFormatSupported(runtime->device,
+                                              VideoCore::Surface::BytesPerBlock(info.format))) {
+            flags |= VideoCommon::ImageFlagBits::AcceleratedUpload;
+        }
+    }
     if (runtime->device.HasDebuggingToolAttached()) {
         original_image.SetObjectNameEXT(VideoCommon::Name(*this).c_str());
     }
@@ -1627,6 +1648,19 @@ Image::Image(TextureCacheRuntime& runtime_, const ImageInfo& info_, GPUVAddr gpu
             storage_image_views[level] =
                 MakeStorageView(device, level, *original_image, VK_FORMAT_A8B8G8R8_UNORM_PACK32);
         }
+    } else if (True(flags & VideoCommon::ImageFlagBits::AcceleratedUpload)) {
+        const auto& device = runtime->device.GetLogical();
+        const VkFormat storage_format =
+            UnswizzleStorageFormat(VideoCore::Surface::BytesPerBlock(info.format));
+        const VkImageViewType storage_view_type = info.type == ImageType::e3D
+                                                       ? VK_IMAGE_VIEW_TYPE_3D
+                                                   : info.type == ImageType::Linear
+                                                       ? VK_IMAGE_VIEW_TYPE_2D
+                                                       : VK_IMAGE_VIEW_TYPE_2D_ARRAY;
+        for (s32 level = 0; level < info.resources.levels; ++level) {
+            storage_image_views[level] =
+                MakeStorageView(device, level, *original_image, storage_format, storage_view_type);
+        }
     }
 }
 
@@ -2482,21 +2516,24 @@ void TextureCacheRuntime::AccelerateImageUpload(
         return astc_decoder_pass->Assemble(image, map, swizzles);
     }
 
-    if (!Settings::values.gpu_unswizzle_enabled.GetValue() || !bl3d_unswizzle_pass) {
-        if (IsPixelFormatBCn(image.info.format) && image.info.type == ImageType::e3D) {
-            ASSERT_MSG(false, "GPU unswizzle is disabled for BCn 3D texture");
+    if (IsPixelFormatBCn(image.info.format)) {
+        if (Settings::values.gpu_unswizzle_enabled.GetValue() && bl3d_unswizzle_pass &&
+            image.info.type == ImageType::e3D && image.info.resources.levels == 1 &&
+            image.info.resources.layers == 1) {
+            return bl3d_unswizzle_pass->Unswizzle(image, map, swizzles, z_start, z_count);
         }
-        ASSERT(false);
+        ASSERT(false && "GPU unswizzle is disabled for BCn 3D texture");
         return;
     }
 
-    if (bl3d_unswizzle_pass &&
-        IsPixelFormatBCn(image.info.format) &&
-        image.info.type == ImageType::e3D &&
-        image.info.resources.levels == 1 &&
-        image.info.resources.layers == 1) {
-
-        return bl3d_unswizzle_pass->Unswizzle(image, map, swizzles, z_start, z_count);
+    if (image.info.type == ImageType::e2D) {
+        return bl_unswizzle_2d_pass->Unswizzle(image, map, swizzles);
+    }
+    if (image.info.type == ImageType::e3D) {
+        return bl_unswizzle_3d_pass->Unswizzle(image, map, swizzles);
+    }
+    if (image.info.type == ImageType::Linear) {
+        return pitch_unswizzle_pass->Unswizzle(image, map, swizzles);
     }
 
     ASSERT(false);

src/video_core/renderer_vulkan/vk_texture_cache.h

@@ -1,4 +1,4 @@
-// SPDX-FileCopyrightText: Copyright 2025 Eden Emulator Project
+// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project
 // SPDX-License-Identifier: GPL-3.0-or-later
 
 // SPDX-FileCopyrightText: Copyright 2019 yuzu Emulator Project
@@ -130,9 +130,9 @@ public:
     std::optional<ASTCDecoderPass> astc_decoder_pass;
 
     std::optional<BlockLinearUnswizzle3DPass> bl3d_unswizzle_pass;
-    vk::Buffer swizzle_table_buffer;
-    VkDeviceSize swizzle_table_size = 0;
-
+    std::optional<BlockLinearUnswizzleImage2DPass> bl_unswizzle_2d_pass;
+    std::optional<BlockLinearUnswizzleImage3DPass> bl_unswizzle_3d_pass;
+    std::optional<PitchUnswizzlePass> pitch_unswizzle_pass;
     std::optional<MSAACopyPass> msaa_copy_pass;
     const Settings::ResolutionScalingInfo& resolution;
     std::array<std::vector<VkFormat>, VideoCore::Surface::MaxPixelFormat> view_formats;

src/video_core/texture_cache/texture_cache.h

@@ -1915,16 +1915,13 @@ void TextureCache<P>::TrimInactiveSamplers(size_t budget) {
         ankerl::unordered_dense::set<SamplerId> active_sampler_ids;
         for (auto const& e : channel_state->sampler_ids)
             active_sampler_ids.insert(e.second);
-        if constexpr (requires { runtime.Finish(); }) {
-            runtime.Finish();
-        }
         // Elements in the map must be necesarily valid
         size_t removed = 0;
         for (auto it = channel_state->samplers.begin(); it != channel_state->samplers.end();) {
             const SamplerId sampler_id = it->second;
             if (!sampler_id || sampler_id == CORRUPT_ID) {
                 it = channel_state->samplers.erase(it);
-            } else if (active_sampler_ids.contains(sampler_id)) {
+            } else if (std::ranges::find(active_sampler_ids, sampler_id) != active_sampler_ids.end()) {
                 ++it;
             } else {
                 slot_samplers.erase(sampler_id);

src/video_core/textures/decoders.h

@@ -1,3 +1,6 @@
+// SPDX-FileCopyrightText: Copyright 2026 Eden Emulator Project
+// SPDX-License-Identifier: GPL-3.0-or-later
+
 // SPDX-FileCopyrightText: Copyright 2018 yuzu Emulator Project
 // SPDX-License-Identifier: GPL-2.0-or-later
 
@@ -23,24 +26,6 @@ constexpr u32 GOB_SIZE_SHIFT = GOB_SIZE_X_SHIFT + GOB_SIZE_Y_SHIFT + GOB_SIZE_Z_
 constexpr u32 SWIZZLE_X_BITS = 0b100101111;
 constexpr u32 SWIZZLE_Y_BITS = 0b011010000;
 
-using SwizzleTable = std::array<std::array<u32, GOB_SIZE_X>, GOB_SIZE_Y>;
-
-/**
- * This table represents the internal swizzle of a gob, in format 16 bytes x 2 sector packing.
- * Calculates the offset of an (x, y) position within a swizzled texture.
- * Taken from the Tegra X1 Technical Reference Manual. pages 1187-1188
- */
-constexpr SwizzleTable MakeSwizzleTable() {
-    SwizzleTable table{};
-    for (u32 y = 0; y < table.size(); ++y) {
-        for (u32 x = 0; x < table[0].size(); ++x) {
-            table[y][x] = ((x % 64) / 32) * 256 + ((y % 8) / 2) * 64 + ((x % 32) / 16) * 32 +
-                          (y % 2) * 16 + (x % 16);
-        }
-    }
-    return table;
-}
-
 /// Unswizzles a block linear texture into linear memory.
 void UnswizzleTexture(std::span<u8> output, std::span<const u8> input, u32 bytes_per_pixel,
                       u32 width, u32 height, u32 depth, u32 block_height, u32 block_depth,

src/video_core/vulkan_common/vulkan_device.cpp

@@ -501,6 +501,14 @@ Device::Device(VkInstance instance_, vk::PhysicalDevice physical_, VkSurfaceKHR
         LOG_WARNING(Render_Vulkan,
                     "Qualcomm drivers have slow push descriptor implementation");
         RemoveExtension(extensions.push_descriptor, VK_KHR_PUSH_DESCRIPTOR_EXTENSION_NAME);
+        LOG_WARNING(Render_Vulkan,
+                    "Disabling shader float controls and 64-bit integer features on Qualcomm proprietary drivers");
+        RemoveExtension(extensions.shader_float_controls, VK_KHR_SHADER_FLOAT_CONTROLS_EXTENSION_NAME);
+        RemoveExtensionFeature(extensions.shader_atomic_int64, features.shader_atomic_int64,
+                               VK_KHR_SHADER_ATOMIC_INT64_EXTENSION_NAME);
+        features.shader_atomic_int64.shaderBufferInt64Atomics = false;
+        features.shader_atomic_int64.shaderSharedInt64Atomics = false;
+        features.features.shaderInt64 = false;
 
 #if defined(__ANDROID__) && defined(ARCHITECTURE_arm64)
         // BCn patching only safe on Android 9+ (API 28+). Older versions crash on driver load.
@@ -553,6 +561,7 @@ Device::Device(VkInstance instance_, vk::PhysicalDevice physical_, VkSurfaceKHR
             features.shader_float16_int8.shaderFloat16 = false;
         }
 
+        // Mali/ NVIDIA proprietary drivers: Shader stencil export not supported
         // Use hardware depth/stencil blits instead when available
         if (!extensions.shader_stencil_export) {
             LOG_INFO(Render_Vulkan,
@@ -565,8 +574,8 @@ Device::Device(VkInstance instance_, vk::PhysicalDevice physical_, VkSurfaceKHR
 
             if (!is_blit_depth24_stencil8_supported && !is_blit_depth32_stencil8_supported) {
                 LOG_WARNING(Render_Vulkan,
-                            "Neither shader export nor hardware blits available for "
-                            "depth/stencil.");
+                            "NVIDIA: Neither shader export nor hardware blits available for "
+                            "depth/stencil. Performance may be degraded.");
             }
         }
     }
@@ -644,13 +653,21 @@ Device::Device(VkInstance instance_, vk::PhysicalDevice physical_, VkSurfaceKHR
 
     if (is_turnip || is_qualcomm) {
         LOG_WARNING(Render_Vulkan, "Driver requires higher-than-reported binding limits");
-        properties.properties.limits.maxVertexInputBindings =
-            (std::max)(properties.properties.limits.maxVertexInputBindings, 32U);
+        properties.properties.limits.maxVertexInputBindings = 32;
     }
 
     const auto dyna_state = Settings::values.dyna_state.GetValue();
+
+    // Base dynamic states (VIEWPORT, SCISSOR, DEPTH_BIAS, etc.) are ALWAYS active in vk_graphics_pipeline.cpp
+    // This slider controls EXTENDED dynamic states with accumulative levels per Vulkan specs:
+    //   Level 0 = Core Dynamic States only (Vulkan 1.0)
+    //   Level 1 = Core + VK_EXT_extended_dynamic_state
+    //   Level 2 = Core + VK_EXT_extended_dynamic_state + VK_EXT_extended_dynamic_state2
+    //   Level 3 = Core + VK_EXT_extended_dynamic_state + VK_EXT_extended_dynamic_state2 + VK_EXT_extended_dynamic_state3
+
     switch (dyna_state) {
     case Settings::ExtendedDynamicState::Disabled:
+        // Level 0: Disable all extended dynamic state extensions
         RemoveExtensionFeature(extensions.extended_dynamic_state, features.extended_dynamic_state,
                               VK_EXT_EXTENDED_DYNAMIC_STATE_EXTENSION_NAME);
         RemoveExtensionFeature(extensions.extended_dynamic_state2, features.extended_dynamic_state2,
@@ -661,6 +678,7 @@ Device::Device(VkInstance instance_, vk::PhysicalDevice physical_, VkSurfaceKHR
         dynamic_state3_enables = false;
         break;
     case Settings::ExtendedDynamicState::EDS1:
+        // Level 1: Enable EDS1, disable EDS2 and EDS3
         RemoveExtensionFeature(extensions.extended_dynamic_state2, features.extended_dynamic_state2,
                               VK_EXT_EXTENDED_DYNAMIC_STATE_2_EXTENSION_NAME);
         RemoveExtensionFeature(extensions.extended_dynamic_state3, features.extended_dynamic_state3,
@@ -669,6 +687,7 @@ Device::Device(VkInstance instance_, vk::PhysicalDevice physical_, VkSurfaceKHR
         dynamic_state3_enables = false;
         break;
     case Settings::ExtendedDynamicState::EDS2:
+        // Level 2: Enable EDS1 + EDS2, disable EDS3
         RemoveExtensionFeature(extensions.extended_dynamic_state3, features.extended_dynamic_state3,
                               VK_EXT_EXTENDED_DYNAMIC_STATE_3_EXTENSION_NAME);
         dynamic_state3_blending = false;
@@ -676,9 +695,12 @@ Device::Device(VkInstance instance_, vk::PhysicalDevice physical_, VkSurfaceKHR
         break;
     case Settings::ExtendedDynamicState::EDS3:
     default:
+        // Level 3: Enable all (EDS1 + EDS2 + EDS3)
         break;
     }
 
+    // VK_EXT_vertex_input_dynamic_state is independent from EDS
+    // It can be enabled even without extended_dynamic_state
     if (!Settings::values.vertex_input_dynamic_state.GetValue()) {
         RemoveExtensionFeature(extensions.vertex_input_dynamic_state, features.vertex_input_dynamic_state, VK_EXT_VERTEX_INPUT_DYNAMIC_STATE_EXTENSION_NAME);
     }
@@ -1260,7 +1282,8 @@ void Device::RemoveUnsuitableExtensions() {
                                        VK_EXT_IMAGE_ROBUSTNESS_EXTENSION_NAME);
 
     // VK_KHR_shader_atomic_int64
-    extensions.shader_atomic_int64 = features.shader_atomic_int64.shaderBufferInt64Atomics;
+    extensions.shader_atomic_int64 = features.shader_atomic_int64.shaderBufferInt64Atomics &&
+                                     features.shader_atomic_int64.shaderSharedInt64Atomics;
     RemoveExtensionFeatureIfUnsuitable(extensions.shader_atomic_int64, features.shader_atomic_int64,
                                        VK_KHR_SHADER_ATOMIC_INT64_EXTENSION_NAME);
 
@@ -1309,7 +1332,10 @@ void Device::RemoveUnsuitableExtensions() {
 
     // VK_KHR_workgroup_memory_explicit_layout
     extensions.workgroup_memory_explicit_layout =
+        features.features.shaderInt16 &&
         features.workgroup_memory_explicit_layout.workgroupMemoryExplicitLayout &&
+        features.workgroup_memory_explicit_layout.workgroupMemoryExplicitLayout8BitAccess &&
+        features.workgroup_memory_explicit_layout.workgroupMemoryExplicitLayout16BitAccess &&
         features.workgroup_memory_explicit_layout.workgroupMemoryExplicitLayoutScalarBlockLayout;
     RemoveExtensionFeatureIfUnsuitable(extensions.workgroup_memory_explicit_layout,
                                        features.workgroup_memory_explicit_layout,

src/video_core/vulkan_common/vulkan_device.h

@@ -403,11 +403,6 @@ FN_MAX_LIMIT_LIST
         return properties.subgroup_properties.supportedOperations & feature;
     }
 
-    /// Returns the shader stages that support subgroup operations.
-    VkShaderStageFlags GetSubgroupSupportedStages() const {
-        return properties.subgroup_properties.supportedStages;
-    }
-
     /// Returns the maximum number of push descriptors.
     u32 MaxPushDescriptors() const {
         return properties.push_descriptor.maxPushDescriptors;
@@ -488,18 +483,6 @@ FN_MAX_LIMIT_LIST
         return extensions.workgroup_memory_explicit_layout;
     }
 
-    /// Returns true if the device supports 8-bit accesses to workgroup explicit layout memory.
-    bool IsWorkgroupMemoryExplicitLayout8BitSupported() const {
-        return extensions.workgroup_memory_explicit_layout &&
-               features.workgroup_memory_explicit_layout.workgroupMemoryExplicitLayout8BitAccess;
-    }
-
-    /// Returns true if the device supports 16-bit accesses to workgroup explicit layout memory.
-    bool IsWorkgroupMemoryExplicitLayout16BitSupported() const {
-        return extensions.workgroup_memory_explicit_layout && features.features.shaderInt16 &&
-               features.workgroup_memory_explicit_layout.workgroupMemoryExplicitLayout16BitAccess;
-    }
-
     /// Returns true if the device supports VK_KHR_image_format_list.
     bool IsKhrImageFormatListSupported() const {
         return extensions.image_format_list || instance_version >= VK_API_VERSION_1_2;
@@ -728,16 +711,9 @@ FN_MAX_LIMIT_LIST
                features.provoking_vertex.transformFeedbackPreservesProvokingVertex;
     }
 
-    /// Returns true if the device supports int64 atomics on storage buffers.
+    /// Returns true if the device supports VK_KHR_shader_atomic_int64.
     bool IsExtShaderAtomicInt64Supported() const {
-        return extensions.shader_atomic_int64 &&
-               features.shader_atomic_int64.shaderBufferInt64Atomics;
-    }
-
-    /// Returns true if the device supports int64 atomics on workgroup (shared) memory.
-    bool IsSharedInt64AtomicsSupported() const {
-        return extensions.shader_atomic_int64 &&
-               features.shader_atomic_int64.shaderSharedInt64Atomics;
+        return extensions.shader_atomic_int64;
     }
 
     bool IsExtConditionalRendering() const {
@@ -912,6 +888,16 @@ FN_MAX_LIMIT_LIST
                features.bit16_storage.storageBuffer16BitAccess;
     }
 
+    /// Returns true if the device supports reading 8-bit values from a storage buffer.
+    bool IsStorageBuffer8BitAccessSupported() const {
+        return features.bit8_storage.storageBuffer8BitAccess;
+    }
+
+    /// Returns true if the device supports reading 16-bit values from a storage buffer.
+    bool IsStorageBuffer16BitAccessSupported() const {
+        return features.bit16_storage.storageBuffer16BitAccess;
+    }
+
     [[nodiscard]] static constexpr bool CheckBrokenCompute(VkDriverId driver_id,
                                                            u32 driver_version) {
         if (driver_id == VK_DRIVER_ID_INTEL_PROPRIETARY_WINDOWS) {