eden/src/core/arm/nce at bccc46a32599cae419bf094e27840a6f5e4256c4 - eden

mirror of https://git.eden-emu.dev/eden-emu/eden.git synced 2026-08-21 07:18:33 +00:00

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MrPurple666 e3c942b209 [NCE] Fix cache invalidation and signal interrupt race condition (#3063 )

Inspired by PR #3047

This should theoretically fix 3 bugs in NCE:

  - **Bug 1**: `ClearInstructionCache()` now properly invalidates L1 instruction cache using IC IALLU instead of only using memory barriers
  - **Bug 2**: `InvalidateCacheRange()` implements proper range-based cache invalidation instead of always flushing entire L1 cache
  - **Bug 3**: `SignalInterrupt()` adds acquire fence to guarantee memory visibility of the `is_running` flag, preventing lost signals

Reviewed-on: https://git.eden-emu.dev/eden-emu/eden/pulls/3063
Reviewed-by: CamilleLaVey <camillelavey99@gmail.com>
Reviewed-by: Caio Oliveira <caiooliveirafarias0@gmail.com>
Co-authored-by: MrPurple666 <antoniosacramento666usa@gmail.com>
Co-committed-by: MrPurple666 <antoniosacramento666usa@gmail.com>

2025-12-04 07:25:21 +01:00

arm_nce_asm_definitions.h

nce: implement instruction emulation for misaligned memory accesses

2023-12-10 18:23:42 -05:00

arm_nce.cpp

[NCE] Fix cache invalidation and signal interrupt race condition (#3063 )

2025-12-04 07:25:21 +01:00

arm_nce.h

nce: implement instruction emulation for misaligned memory accesses

2023-12-10 18:23:42 -05:00

arm_nce.s

nce: implement instruction emulation for misaligned memory accesses